2024-03-10 07:57:51 +00:00
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From 419d22eeba6b335ba58d8dd9d064b871a37cb1fb Mon Sep 17 00:00:00 2001
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2023-12-18 12:33:45 +00:00
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From: Nikita Travkin <nikita@trvn.ru>
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Date: Thu, 7 Sep 2023 15:02:37 +0500
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2024-03-10 07:57:51 +00:00
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Subject: [PATCH 3/8] arm64: dts: qcom: sc7180: Add ADSP
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2023-12-18 12:33:45 +00:00
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sc7180 has an ADSP remoteproc that exclusively controls the audio
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hardware on devices that use Qualcomm firmware.
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Add it along with the relevant audio services.
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Signed-off-by: Nikita Travkin <nikita@trvn.ru>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Link: https://lore.kernel.org/r/20230907-sc7180-adsp-rproc-v3-4-6515c3fbe0a3@trvn.ru
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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arch/arm64/boot/dts/qcom/sc7180.dtsi | 122 +++++++++++++++++++++++++++
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1 file changed, 122 insertions(+)
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diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
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2024-03-10 07:57:51 +00:00
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index db5d04181ac4..3683419ee8f5 100644
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2023-12-18 12:33:45 +00:00
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--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
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+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
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2024-03-10 07:57:51 +00:00
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@@ -20,6 +20,8 @@
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2023-12-18 12:33:45 +00:00
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#include <dt-bindings/reset/qcom,sdm845-aoss.h>
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#include <dt-bindings/reset/qcom,sdm845-pdc.h>
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#include <dt-bindings/soc/qcom,rpmh-rsc.h>
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+#include <dt-bindings/soc/qcom,apr.h>
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+#include <dt-bindings/sound/qcom,q6afe.h>
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#include <dt-bindings/thermal/thermal.h>
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/ {
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2024-03-10 07:57:51 +00:00
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@@ -3781,6 +3783,126 @@ wifi: wifi@18800000 {
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2023-12-18 12:33:45 +00:00
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status = "disabled";
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};
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+ remoteproc_adsp: remoteproc@62400000 {
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+ compatible = "qcom,sc7180-adsp-pas";
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+ reg = <0 0x62400000 0 0x100>;
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+
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+ interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
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+ <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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+ <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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+ <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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+ <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
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+ interrupt-names = "wdog",
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+ "fatal",
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+ "ready",
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+ "handover",
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+ "stop-ack";
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+
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+ clocks = <&rpmhcc RPMH_CXO_CLK>;
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+ clock-names = "xo";
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+
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+ power-domains = <&rpmhpd SC7180_LCX>,
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+ <&rpmhpd SC7180_LMX>;
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+ power-domain-names = "lcx", "lmx";
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+
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+ qcom,qmp = <&aoss_qmp>;
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+ qcom,smem-states = <&adsp_smp2p_out 0>;
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+ qcom,smem-state-names = "stop";
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+
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+ status = "disabled";
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+
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+ glink-edge {
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+ interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
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+ label = "lpass";
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+ qcom,remote-pid = <2>;
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+ mboxes = <&apss_shared 8>;
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+
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+ apr {
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+ compatible = "qcom,apr-v2";
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+ qcom,glink-channels = "apr_audio_svc";
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+ qcom,domain = <APR_DOMAIN_ADSP>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ service@3 {
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+ compatible = "qcom,q6core";
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+ reg = <APR_SVC_ADSP_CORE>;
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+ qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
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+ };
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+
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+ q6afe: service@4 {
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+ compatible = "qcom,q6afe";
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+ reg = <APR_SVC_AFE>;
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+ qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
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+
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+ q6afedai: dais {
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+ compatible = "qcom,q6afe-dais";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ #sound-dai-cells = <1>;
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+ };
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+
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+ q6afecc: clock-controller {
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+ compatible = "qcom,q6afe-clocks";
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+ #clock-cells = <2>;
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+ };
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+ };
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+
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+ q6asm: service@7 {
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+ compatible = "qcom,q6asm";
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+ reg = <APR_SVC_ASM>;
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+ qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
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+
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+ q6asmdai: dais {
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+ compatible = "qcom,q6asm-dais";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ #sound-dai-cells = <1>;
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+ iommus = <&apps_smmu 0x1001 0x0>;
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+ };
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+ };
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+
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+ q6adm: service@8 {
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+ compatible = "qcom,q6adm";
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+ reg = <APR_SVC_ADM>;
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+ qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
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+
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+ q6routing: routing {
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+ compatible = "qcom,q6adm-routing";
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+ #sound-dai-cells = <0>;
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+ };
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+ };
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+ };
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+
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+ fastrpc {
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+ compatible = "qcom,fastrpc";
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+ qcom,glink-channels = "fastrpcglink-apps-dsp";
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+ label = "adsp";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ compute-cb@3 {
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+ compatible = "qcom,fastrpc-compute-cb";
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+ reg = <3>;
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+ iommus = <&apps_smmu 0x1003 0x0>;
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+ };
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+
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+ compute-cb@4 {
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+ compatible = "qcom,fastrpc-compute-cb";
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+ reg = <4>;
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+ iommus = <&apps_smmu 0x1004 0x0>;
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+ };
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+
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+ compute-cb@5 {
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+ compatible = "qcom,fastrpc-compute-cb";
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+ reg = <5>;
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+ iommus = <&apps_smmu 0x1005 0x0>;
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+ qcom,nsessions = <5>;
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+ };
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+ };
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+ };
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+ };
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+
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lpasscc: clock-controller@62d00000 {
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compatible = "qcom,sc7180-lpasscorecc";
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reg = <0 0x62d00000 0 0x50000>,
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--
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2024-03-10 07:57:51 +00:00
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2.43.2
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2023-12-18 12:33:45 +00:00
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