The PD policy would take 5-7s to enter PD disabled state (send
50 times caps, the more bytes of caps cmd, the more time it
takes), So we ough to pick usb notify to PD startup state for
better user experience.
Change-Id: I3b2dc1c5df31296520685ba57e892a30ef3c28aa
Signed-off-by: zain wang <wzz@rock-chips.com>
In the spec:
The tTypeCSendSourceCap is defined from 100ms to 200ms.
The nCapsCount is defined 50.
Change-Id: I09bcdb7a83c353ab099d51228cf8ca13e562d839
Signed-off-by: zain wang <wzz@rock-chips.com>
As the PD spec, we ough to tell policy engine if the cable
support PD, some state would run depend on this value.
Change-Id: Ied725ecb53f71a5e367b1ca91acd7f23372c54a1
Signed-off-by: zain wang <wzz@rock-chips.com>
Refer dwc2 databook and programming, the controller automatic
receive SETUP packet to the receive FIFO and respond to Host
ACK whether ep enabled or not. The core internally set the IN
NAK and OUT NAK bits when SETUP packet was received in order
to software process SETUP packet and transition to the next
stage.
If software has not enabled ep before the Host send the SETUP
packet, set enable ep and cnak at the same time the Host send
DATA OUT packet. Then dwc2 controller write the setup data to
the memory and disable ep, respond ACK to the Host DATA OUT
packet. The Host transition to the status stage, but we lost
the DATA OUT packet. So don't set cnak when setup stage, the
dwc2 controller respond NAK to the Host DATA OUT packet, the
Host resend ping packet and DATA OUT packet.
TEST=set gadget work as usb audio and connect to ubuntu(rk3036)
Change-Id: Id791c44baf3d363a975ceaeb7d1c879c9703ce1d
Signed-off-by: Feng Mingli <fml@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
when using upstream u-boot load kernel, reserves memory from early
allocator will fail if memory node is not specified.
===============================
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0xf00
[ 0.000000] Initializing cgroup subsys cpuset
[ 0.000000] Initializing cgroup subsys cpu
[ 0.000000] Initializing cgroup subsys cpuacctdd
...
[ 0.000000] earlycon: Early serial console at MMIO32 0x11030000 (options '')
[ 0.000000] bootconsole [uart0] enabled
[ 0.000000] cma: Failed to reserve 16 MiB
[ 0.000000] Memory policy: Data cache writealloc
This patch fix it.
Change-Id: I6a3c6b1e210bbc9a5240503ab7bf5ddab89910ba
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This patch fixes the following DTC warnings:
"Node /memory has a reg or ranges property, but no unit name"
Change-Id: I140cef24b80e4ff0b9fbe6f0e07221fba1da72f0
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 09fbc4a08e)
init irq later than workqueue_struct and delayed_work to
avoid NULL ponint
Change-Id: I715296a715cb07149a6dce236a3b8ccafe00622e
Signed-off-by: chenjh <chenjh@rock-chips.com>
Add dfi and dmc nodes in the device tree for the ARM64 rk3368 SoC.
To support ddr frequency scaling function, we need enable dmc and
dfi nodes.
Change-Id: I155b838a8773ff1842058bebb1ed2747ca8e2e0b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
rk818's input charge voltage limit function doesn't works well. If software
set input current over than charger's max support value, rk818 may cause
charger over current protect which means disconnecting.
To solve this problem, we need to detect vbus voltage by TS2 pin, if vbus
is upper than 4.4v, we can safely adjust input current step by step from
low to high until meeting the target input current value.
Change-Id: I01d63974f251ad8ef0037158b66f4b85d3928baf
Signed-off-by: chenjh <chenjh@rock-chips.com>
due to playback and capture will call startup at the same time
when voip call, but hdmi_codec driver only support playback
[ 51.134149] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[ 51.134179] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[ 51.134197] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22
[ 51.143250] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[ 51.143277] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[ 51.143294] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22
[ 51.157546] hdmi-audio-codec hdmi-audio-codec.6.auto: hdmi_codec_startup()
[ 51.157584] hdmi-audio-codec hdmi-audio-codec.6.auto: Only one simultaneous stream supported!
[ 51.157603] hdmi-audio-codec hdmi-audio-codec.6.auto: ASoC: can't open codec i2s-hifi: -22
Change-Id: I970695dbe19f070579aacd044e6a01c44e687a2e
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
This patch adds port configuration for usb2 phy1 port1 of rk322x
SoC. For the current rockchip inno usb2 phy driver framework, it
can only support usb2 phy which comprises with one otg-port and
one host-port.
However, rk322x SoC usb2 phy1 comprises with two host-ports, so
we use otg id index for phy1 port1 configuration, and make phy1
port1 work the same as otg-port host mode.
Change-Id: Iaa10c2438c6b7b052c7f3830252ba4ebd91ff23f
Signed-off-by: William Wu <william.wu@rock-chips.com>
We see the cpu of thread_info was changed by unknown reason sometimes,
which cause rq spinlock deadlock while schedule. Until we found the
root cause, we have to add this workaround.
Change-Id: Ib943ccb47a57fe4b267a1da853366363cd7f1f52
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
1. add unify params for ddr frequency scanning.
2. add dram side and phy side odt disable frequency configurate
independent.
Change-Id: Ied97dbee8d30a1a6e95d4c252986121092c484d8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
If i2c driver adds a shutdown callback function, the callback will be
executed before cpu's shutdown callback when reboot system, it will
fail to scale voltage like the following.
rk3x-i2c ff650000.i2c: Access denied - device already shutdown
rk3x-i2c ff650000.i2c: Access denied - device already shutdown
rk3x-i2c ff650000.i2c: Access denied - device already shutdown
rk3x-i2c ff650000.i2c: Access denied - device already shutdown
cpu cpu4: _set_opp_voltage: failed to set voltage
(950000 950000 1350000 mV):-5
So add a reboot notifier to limit frequency before i2c's shutdown callback,
and the cpu's shutdown callback will do nothing.
Change-Id: Ic5bb21b511c6f799dc62fd9db237d90522b7d4ee
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Actually there is no need to use two loops.
Change-Id: Ieafdc265307e21fc7195f3d80b42483a2d53d413
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
We weren't giving enough time for DMC to change frequencies
when the CPU was running slow.
Change-Id: I84e1a4ad7b5ccddafb0016f3d5d6eef147a58591
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
To protect against races with concurrent CPU online/offline, call
get_online_cpus() before change frequency.
Change-Id: I5b97cd7eff6a1c4828ab30bc165fb2aa8b460bb3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
gpio is not connected by default and we suggest cru mode as the default
shut mode.
Change-Id: I74593092b145e51e5f5b52ab028e650b7fe67f5e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
update freq of tsadc's working clock as 32768 hz, if not set, tsadc
will work at a default frequence.
Change-Id: I04f3ee230819af1fce44518b5cbee7700c4d67fd
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
The userspace might need some sort of cache coherency management e.g. when CPU
and GPU domains are being accessed through dma-buf at the same time. To
circumvent this problem there are begin/end coherency markers, that forward
directly to existing dma-buf device drivers vfunc hooks. Userspace can make use
of those markers through the DMA_BUF_IOCTL_SYNC ioctl. The sequence would be
used like following:
- mmap dma-buf fd
- for each drawing/upload cycle in CPU 1. SYNC_START ioctl, 2. read/write
to mmap area 3. SYNC_END ioctl. This can be repeated as often as you
want (with the new data being consumed by the GPU or say scanout device)
- munmap once you don't need the buffer any more
BackPort:
upstream kernel change dma-buf api with the commit(831e9da
dma-buf: Remove range-based flush), avoid effect too much to
current kernel, Just compatible dma-buf api to current version.
v2 (Tiago): Fix header file type names (u64 -> __u64)
v3 (Tiago): Add documentation. Use enum dma_buf_sync_flags to the begin/end
dma-buf functions. Check for overflows in start/length.
v4 (Tiago): use 2d regions for sync.
v5 (Tiago): forget about 2d regions (v4); use _IOW in DMA_BUF_IOCTL_SYNC and
remove range information from struct dma_buf_sync.
v6 (Tiago): use __u64 structured padded flags instead enum. Adjust
documentation about the recommendation on using sync ioctls.
v7 (Tiago): Alex' nit on flags definition and being even more wording in the
doc about sync usage.
v9 (Tiago): remove useless is_dma_buf_file check. Fix sync.flags conditionals
and its mask order check. Add <linux/types.h> include in dma-buf.h.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455228291-29640-1-git-send-email-tiago.vignatti@intel.com
(cherry picked from commit c11e391da2)
Change-Id: I92916babe7fb0ab3bf3ce9dc966408f2e05fe83d
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
to slove the display shaking, when uboot logo display to kernel show.
Change-Id: I5856581fabd0171be09993878ffb4ef1af0fb204
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
'nsec_ctx->mon_lr' is not the fiq break point's PC, because it will
be override as 'sip_fiq_debugger_uart_irq_tf_cb' for optee-os to
jump to fiq_debugger handler. As 'nsec_ctx->und_lr' is not used for
kernel, optee-os uses it to deliver fiq break point's PC.
Change-Id: I5a831638e8228766d03d92674e3e29facdd116f8
Signed-off-by: chenjh <chenjh@rock-chips.com>
