Add cec-notifier interface that hdmi can call it when
HPD is occurred.
Change-Id: I0087a879bf3ba65e300c3db3a67ddaa7e22f16ad
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
1. when doing vpu_reset and now a ioctl to get reg come,
maybe cause dead lock.
2. remove unused code in try_set_reg function
Change-Id: Ied1f3b606767faa4ccdb9926679df765af258795
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
to Improve signal compatibility disable scamble when tmdsclk less than
340Mhz by default. and can enable it by define "scramble-low-rates;"
in dts file.
Change-Id: I0bd5d8e2ea4df065d84018615d4c39cac7ac441a
Signed-off-by: xuhuicong <xhc@rock-chips.com>
implement shutdown to make sure display will be closed
when box product power off.
Change-Id: I860a768a061082bf35bcd53c7dde153e6109f42d
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
we must make sure the pre overlay is configed at frame start time,
so we set frame effect for interlace mode.
Change-Id: Id85da3afe850d01d985573df9ac37d4b67ef8ddd
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
If it supports "remotectl parse" after system resume,
the remotectl driver would pass pwrkey code to atf.
So we don't need do it again.
Change-Id: Ia73a4fe314e476d551113b111df4bc42b7867ee0
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
there are maximum TMDS clock limit, when the clock is out of range
reducing frequency by set color format to yuv420 and/or set color
depth to 8bit
Change-Id: I8b79de97329561bf0399d05c0264a5c818f844fc
Signed-off-by: xuhuicong <xhc@rock-chips.com>
This is for IC design not reasonable, when enable preoverlay and only
enable win0 for yuv format, the win0 no display area will be considered
as yuv domain black color, this lead to the no display area display
pink color.
Change-Id: I46a860c3753af2aa2a0900db0d48832e1624c948
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
when enable hdr2sdr on rk3328, vop can't support
per-pixel alpha * global alpha, so we must back to gpu,
but gpu can't support hdr2sdr, so gpu output hdr UI(rgbx),
vop will do:
UI(rgbx) -> yuv -> rgb ->hdr2sdr -> overlay -> output.
Change-Id: I69fdfacbf13e755b6fa8b1570c74da027bab52fb
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
when pd power on/off, the qos regs need to save and restore.
Change-Id: I55739fb8f2b452702bdbdc974bd588bbc05848d7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Last_status is used to calculate dmc's power in thermal control.
If last_status is neithor inited nor kept updated, the power model will
get the wrong status and then the wrong power. And dmc gets wrong
cooling state at last.
Meanwhile this issue reports the warning "core: dev_pm_opp_get_voltage
: Invalid parameters"
Change-Id: Ic371796ad94fd6dab376fefbea91adff0068d26b
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
The vpu qos registers need to save and restore when reset.
Change-Id: I649cf4a360842ad1abb06c35a6fd8d3868fbf706
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The rkvdec and vpu qos registers need to save and restore when reset.
Change-Id: If0fbee0aed9227cfd795c5f439cfb8c3b2f0ccaf
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This bit enables the automatic mechanism to stop providing clock in
the clock lane when time allows.
Change-Id: Ia3d85589f54adcf6206ee7ded32624b8e92936af
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
use framework internal dynamic power calc function. Do not use
global data, rk_dmcfreq.
Change-Id: I1f46b2471b5d25a9233724fdd61efe63ea13b860
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
