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852,148 commits

Author SHA1 Message Date
Tao Huang
949d4b715c Revert "PM / devfreq: Add new device link for sysfs"
This reverts commit 32948d8b86.

See commit a8b1fa6c47 ("Revert "PM / devfreq: Modify the device name as devfreq(X) for sysfs"")

Conflicts:
	drivers/devfreq/devfreq.c

Change-Id: If4fec73bb1cf38afffd4699dfe25b8c32ea7472f
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-03-21 15:55:11 +08:00
Elaine Zhang
93993a9497 soc: rockchip: power-domain: export pd on/off and pd status
Some special applications of video may require:
rockchip_pmu_pd_on(dev)---> force power on pd
rockchip_pmu_pd_off(dev)---> force power down pd
rockchip_pmu_pd_is_on(dev)---> pd status

Change-Id: I264d76559aef0b0540130bf29a4635a3f5380a7c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-03-20 14:04:48 +08:00
Shunhua Lan
175ac072b6 ASoC: rt5640: enable MICBIAS1 when recording from mic
Change-Id: I7dd50309618835f712f85408e2281f7bd5e8b6b1
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
2020-03-19 19:10:27 +08:00
Elaine Zhang
4a90327b81 arm64: dts: rockchip: Improve the aclk_cci frequency for rk3399
The initialization frequency of cci was adjusted from 300M to 600M.

Change-Id: I36ea20ec84c97f893894687ce4eb7bd021d372a0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2020-03-19 17:36:15 +08:00
Wyon Bi
f2534b7494 phy/rockchip: Add support for INNOSILICON LVDS/TTL PHY
Innosilicon LVDS/TTL PHY implements LVDS TIA/EIA protocol.
Normally, Innosilicon LVDS/TTL PHY contains four 7-bit
parallel-load serial-out shift registers, a 7X clock PLL,
and five Low-Voltage Differential Signaling (LVDS) line drivers
in a single integrated circuit. These functions allow 28 bits
of single-ended LVTTL data to be synchronously transmitted over
five balanced-pair conductors for receipt by a compatible receiver.

In addition, Innosilicon LVDS/TTL PHY could extend from 4 lanes
to N lanes (N is required by the customer). Therefore, the TTL
lines extend respectively.

Change-Id: Ib48537c49dec919e2ed5bc6347217fe83be07371
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2020-03-18 16:59:05 +08:00
Zhihuan He
3faae53fc3 arm64: dts: rockchip: modify rk3368-808-evb vop dclk mode
modify vop-dclk-mode to 1 for rk3368-808-evb to fix
screen display glitter.

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Ib13304b5e97626e76dafad91ba296f37b9b3159a
2020-03-18 15:50:06 +08:00
Tao Huang
76bc7af016 soc: rockchip: rk_fiq_debugger: lock console in debug_port_init()
debug_port_init() may called when earlycon is used, which may block
kernel init. Use console_lock()/console_unlock() to avoid the race.

Change-Id: I711c038f31141cb5225624e2a9d746bd4de232e4
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-03-18 14:29:06 +08:00
Tao Huang
c71894c3cf ARM: Make pgtbl macro more robust
arch/arm/kernel/head.S:181: Error: invalid constant (608000) after fixup

Change-Id: I883614c9f413227240f32ac0b12f418365dbcfe1
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-03-18 11:56:28 +08:00
Liang Chen
02e1d7f418 cpufreq: interactive: fix: slack timer may be modified before start
cpufreq_interactive_idle_end() may modify slack timer before the timer
is started, so hold the icpu->enable_sem lock when start slack timer
to avoid cpufreq_interactive_idle_end() modify the slack timer.

[ 3.661627] Call trace:
[ 3.664080] add_timer_on+0x1f8/0x200
[ 3.667744] slack_timer_resched+0x9c/0xf8
[ 3.671850] cpufreq_interactive_start+0xa8/0x140
[ 3.676560] cpufreq_start_governor+0x4c/0x98
[ 3.680921] cpufreq_set_policy+0x274/0x290
[ 3.685112] cpufreq_init_policy+0x6c/0xc0
[ 3.689219] cpufreq_online+0x510/0x6a8
[ 3.693062] cpufreq_add_dev+0x78/0x88
[ 3.696822] subsys_interface_register+0xb4/0x128
[ 3.701530] cpufreq_register_driver+0x168/0x1e8
[ 3.706153] dt_cpufreq_probe+0xb0/0x150
[ 3.710081] platform_drv_probe+0x50/0xa8
[ 3.714092] really_probe+0x1f8/0x298
[ 3.717755] driver_probe_device+0x58/0x100
[ 3.721946] __device_attach_driver+0x90/0xe0
[ 3.726304] bus_for_each_drv+0x70/0xc8
[ 3.730146] __device_attach+0xdc/0x138
[ 3.733988] device_initial_probe+0x10/0x18
[ 3.738178] bus_probe_device+0x94/0xa0
[ 3.742023] device_add+0x5e0/0x6d0
[ 3.745519] platform_device_add+0x10c/0x258
[ 3.749795] platform_device_register_full+0x100/0x130
[ 3.754939] rockchip_cpufreq_driver_init+0x30c/0x3c0
[ 3.759996] do_one_initcall+0x48/0x240
[ 3.763841] kernel_init_freeable+0x210/0x37c
[ 3.768203] kernel_init+0x10/0x108
[ 3.771698] ret_from_fork+0x10/0x18

Change-Id: Ie5d67721def448b7bbf9e3b9a6d60341eb0b8a0b
Signed-off-by: Liang Chen <cl@rock-chips.com>
2020-03-17 09:46:49 +08:00
Yifeng Zhao
027b359f38 drivers: rknand: optimize reading speed
There is a big delay between DMA transmission completed and waiting for
interruption, which results in the degradation of read performance.

It is modified to use usleep_range delay without interruption, and
the read performance is improved by 40%.

Change-Id: Ia9b92382d7a1a4fbd157dace2067c7dd15cb69ca
Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
2020-03-16 18:31:33 +08:00
Jianing Ren
1c9abe11af ARM: dts: rockchip: add otg-bvalid interrupt for rk3288
Change-Id: Id652b5ba4c16f8a53cc5bee9cd50fecfacff45c1
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2020-03-16 16:42:56 +08:00
Jianing Ren
d694ac5b08 phy: phy-rockchip-usb: add charge detection for rk3288
Change-Id: I89a2a1868ebf5fcdf09f594f6a9840c97809b3b9
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2020-03-16 16:42:41 +08:00
Tao Huang
15c47a6102 mm: slub: Fix compilation warnings when !SLUB_SYSFS and SLUB_DEBUG=y
mm/slub.c:4459:13: warning: unused function 'validate_slab_cache' [-Wunused-function]
mm/slub.c:4618:12: warning: unused function 'list_locations' [-Wunused-function]

Fixes: d2014f8b68 ("mm: slub: Add SLUB_SYSFS")
Change-Id: Ic933970940a11d1d7dce418f3e49797688998ede
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-03-16 11:47:19 +08:00
Jianhui Wang
ada5e4edb5 ARM: dts: rockchip: add adc key config for rk3288-evb board
Change-Id: Iab3c08291e6c13be9a66276c72b631c050d0df88
Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
2020-03-16 10:40:14 +08:00
Finley Xiao
9c60c6aa41 nvmem: rockchip-otp: Sync with upstream
Change-Id: I6d97becdeec650edddcd5ece6fe9d2e2b335e66b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2020-03-13 15:52:34 +08:00
William Wu
7df2653064 usb: dwc3: core: support type-c data role swap dynamically
This patch supports fusb302 to do data role swap for
Type-C Dongle with PD adapter.

The test case is:

 - Use a Type-C Dongle (PD adapter & USB & HDMI)
 - Plug a PD adapter into Type-C Dongle first, then
   connect the Dongle with RK3399 Type-C0 port.
 - Check if Type-C Dongle can fetch 5V with the following log:
   "fusb302 4-0022: PD connected as UFP, fetching 5V"
 - Wait for the data role swap completion (hundreds of
   milliseconds), then check if the Type-C USB can work
   in DFP mode.

Without this patch, the DWC3 can't switch to DFP mode
after the data role swap completion. It's because that
when the fusb302 do data role swap, it only sends extcon
notifier with EXTCON_USB true or EXTCON_USB_HOST true.
Generally, the sequence of the extcon notifier sent from
fusb302 is:

- send "EXTCON_USB = true" and "EXTCON_USB_HOST=false"
  to DWC3 driver, then DWC3 switch to UFP, and set the
  connected flag to true.

- After swap completion, send "EXTCON_USB = false" and
  "EXTCON_USB_HOST = true" to DWC3 driver. Because the
  connected flag is true, the DWC3 is unable to switch
  to DFP mode.

This patch forces DWC3 to do disconnection if it detects
the connected flag is true and the DWC3 mode is UFP.

This patch can also fix a bug if we use command to force
DWC3 mode to DFP (host mode) when the DWC3 is working on
UFP mode and connecting to USB Host.

Change-Id: I5b3a17957ef720eb90664186033ef91269ecbc38
Signed-off-by: William Wu <william.wu@rock-chips.com>
2020-03-13 15:46:01 +08:00
Bartosz Golaszewski
a3dbb3d1ce UPSTREAM: drivers: provide devm_platform_ioremap_resource()
There are currently 1200+ instances of using platform_get_resource()
and devm_ioremap_resource() together in the kernel tree.

This patch wraps these two calls in a single helper. Thanks to that
we don't have to declare a local variable for struct resource * and can
omit the redundant argument for resource type. We also have one
function call less.

Change-Id: Ibca8e80bb3724ee7dcfb1754ae93dbe6220bf556
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
(cherry picked from commit 7945f929f1)
2020-03-13 10:28:04 +08:00
Frank Wang
0af98cc1ba usb: dwc2: fix otg host fail after system resume
Fix commit 079b3c7cdb ("usb: dwc2: make hcd into L3 power
off state when suspend").

This fixes otg-host restore failed after system resume for
dwc2 related interrupts were not enabled when no gadget had
been bounded before.

Change-Id: Iceac66acf063c6226dcafb2086149122511ab5c1
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2020-03-12 18:38:48 +08:00
Frank Wang
eef525a1f0 usb: dwc2: amend phy operation process
Refer to lowlevel mechanism of dwc2, amend the PHY operation
process in case of unbalance for power on and off as well.

This patch fix unbalanced phy power management if otg cable
plug in between the completion of dwc2 probe and udc_start.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Ic0c2811ed84f8f46e99e03eff44c9d20a791e05f
2020-03-12 18:38:48 +08:00
Nickey Yang
c4cf9286aa drm/rockchip: dsi: update GRF_REG_FIELD
update this for support some GRF's register offset over 0x10000

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I8427e17fafa537980f2233483c23e8f3511fd9e9
2020-03-12 15:08:27 +08:00
Sugar Zhang
86d27c996d dt-bindings: sound: rockchip: Add binding for Audio PWM
Change-Id: Ia7d8bf6e697fbb9ff7de9c0572f9c679136be47c
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2020-03-12 10:11:48 +08:00
Sugar Zhang
1ad2703ce0 ASoC: rockchip: Add support for Audio PWM
The Audio PWM provides an easy and cheap solution for audio playback
in low quality. it acts as a digital-to-analog converter(DAC), which
converts the digital audio PCM data to the analog PWM signals.

Change-Id: I50ca4aebf4fc5c92ff07d2aa53e9d33b91035e46
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2020-03-12 10:11:00 +08:00
Sugar Zhang
c8c52ddc10 ASoC: rockchip: i2s-tdm: Simplify macro code
Change-Id: I1d18b18f878dea44428c374727fe6e03df09973b
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2020-03-12 08:59:38 +08:00
David Wu
6b1b956d81 ARM: dts: rockchip: Reduce the time of phy reset for rk3288-evb
It is too long to reset the time with 1000ms, which
would make the system init and resume slowly, 50ms
is enough.

Change-Id: Ifba39f401d14e161dd3d49e1b20ae102569ebb58
Signed-off-by: David Wu <david.wu@rock-chips.com>
2020-03-11 10:26:11 +08:00
Longjian Lin
6a040c72dc ARM: dts: rockchip: add uart0 cts control for rk3288-evb
Change-Id: I74c6cc8c6ba6725d66a836598c55561273b0ea85
Signed-off-by: Longjian Lin <llj@rock-chips.com>
2020-03-11 10:25:36 +08:00
Jianqun Xu
79d804defc video/rockchip: mpp: fix reg_id to int from u32
VPU without hardware id register will be set with -1 for reg_id,
so fix the reg_id from u32 to int.

Change-Id: Ic3cf15f223610428f77fd5e3291e74974a2a7981
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-11 09:06:54 +08:00
Johnson Ding
a0bff8819f arm64: dts: rockchip: rk3368 add clk_cabac for hevc
Change-Id: If02b0458e0b96230b47a4ba32add8c8c2748bd89
Signed-off-by: Johnson Ding <johnson.ding@rock-chips.com>
2020-03-10 19:16:18 +08:00
Jianqun Xu
8eacce33f0 pinctrl/rockchip: set mask_cache directly after write
The flag IRQ_GC_INIT_MASK_CACHE indicates to initialize the mask_cache
by reading mask reg. The gpio controllers on rockchip SoCs need enable
pclk_gpio before read/write controllers.

The irq_enable in irq_chip will be called during irq request, but the
virq needs to be get before irq request, so it causes an read without
pclk of gpio.

This patch removes flag IRQ_GC_INIT_MASK_CACHE, set mask_cache of chip
after direct setting.

Change-Id: I8e1dcf649bb8021b90ffd08bc9b44ad71232d4da
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-10 17:39:56 +08:00
Jianqun Xu
e55b428d85 video/rockchip: mpp: rkvdec fix smatch warning
[smatch] drivers/video/rockchip/mpp/mpp_rkvdec.c:1239 rkvdec_devfreq_init() warn: passing zero to 'PTR_ERR'

Change-Id: Ie3777be55262034274beaa377c25febb36e83e64
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-10 16:08:24 +08:00
Jianqun Xu
73da7c8a6b video/rockchip: mpp: read hwid with power on
Change-Id: I0da57743a92999efb9e0ebc503dc626d1ece6535
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-10 14:56:19 +08:00
Jianhui Wang
07827a3510 ARM: dts: rockchip: rk3288 support mpp
The defaultly vpu clock rate 600MHz makes reboot failure,
patch has assigned clock rates for vpu.

Change-Id: I986295b4dda6f99e524dcebeaa00128af87d51bf
Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-10 11:11:59 +08:00
Liang Chen
3be6453a90 kthread: do not preempt current task if it is going to call schedule()
when we create a kthread with ktrhead_create_on_cpu(),the child thread
entry is ktread.c:ktrhead() which will be preempted by the parent after
call complete(done) while schedule() is not called yet,then the parent
will call wait_task_inactive(child) but the child is still on the runqueue,
so the parent will schedule_hrtimeout() for 1 jiffy,it will waste a lot of
time,especially on startup.

  parent                             child
ktrhead_create_on_cpu()
  wait_fo_completion(&done) -----> ktread.c:ktrhead()
                             |----- complete(done);--wakeup and preempted by parent
 kthread_bind() <------------|  |-> schedule();--dequeue here
  wait_task_inactive(child)     |
   schedule_hrtimeout(1 jiffy) -|

So we hope the child just wakeup parent but not preempted by parent, and the
child is going to call schedule() soon,then the parent will not call
schedule_hrtimeout(1 jiffy) as the child is already dequeue.

The same issue for ktrhead_park()&&kthread_parkme().
This patch can save 120ms on rk312x startup with CONFIG_HZ=300.

Change-Id: I2ae4edb538ea6f55cf5b8f8b5dc6311d1811a4ae
Signed-off-by: Liang Chen <cl@rock-chips.com>
2020-03-09 16:51:17 +08:00
Jianqun Xu
b1ae882b40 pinctrl/rockchip: get virq by irq_find_mapping
The rockchip pinctrl creates an irq domain by irq_domain_add_linear,
but it not means all pins' irq are in linear.

Such as rk808 interrupt, it defines in node:
	rk808 {
		interrupt-parent = <&gpio1>;
		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
	}

then i2c core driver will get virq by
	irq = of_irq_get(dev->of_node, 0);
		->irq_create_of_mapping(&oirq);

finally the rk808 irq is mapping in DOMAIN_BUS_WIRED irq domain.

It's better to get virq by irq_find_mapping.

Change-Id: Ib416ace5c2212c9a704b01e78f77d3425dc8d21b
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-09 15:21:48 +08:00
Jianqun Xu
fdf97ec8a2 pinctrl/rockchip: not need to create irq mapping for all pins
It takes time to create irq mapping for all pins in probe, remove
it since the mapping will be created in gpio_to_irq.

Change-Id: Idec03ea43711335190cf440fa30f9f4c654e4540
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-09 15:21:48 +08:00
Jianqun Xu
64c332acf2 pinctrl/rockchip: enable clock for gpio_to_irq
Since all pins have been created mapping in probe, the create
mapping operation in gpio_to_irq will never happen, the issue
is hidened.

The patch add clk_enable/disable for gpio_to_irq.

Change-Id: I50c945f95f9f66ed3ab83a8c332893151272e9f6
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-09 15:21:48 +08:00
Tao Huang
735784e0ea ARM: rockchip_defconfig: update by savedefconfig
Reorder some configs.

Change-Id: Ibdd8c5225932d1418de3a108819a1bc9ad550bd8
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-03-05 19:37:05 +08:00
Tao Huang
1cd75a53e9 arm64: rockchip_defconfig: update by savedefconfig
Reorder some configs.

Change-Id: Ibe56218d9577c73a9f97a7c2e7aa4ff2c6a4a67b
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-03-05 19:37:05 +08:00
WeiYong Bi
f8090e57cc phy: Add support for INNO MIPI D-PHY
The INNO MIPI D-PHY is built in witch a standard digital interface
to talk to any third part Host controller.That is part of Rockchip SoCs,
like rk3368.

Change-Id: I9806882e0e3fb6b20348015d0f34923d1bc46b89
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2020-03-05 19:37:05 +08:00
Ziyuan Xu
90b0a9600d Revert "clk: rockchip: fix wrong mmc phase shift for rk3328"
This reverts commit 4ef2449889.

The description for CRU_EMMC/SDMMC/SDIO_CON[0/1] is jumble on
chapters, make it clear that the correct shift is 1 that from
IC engineer.

Change-Id: I48dce293ec6ef82a5c78db38efc083227776ea99
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2020-03-05 19:35:44 +08:00
Jianhui Wang
2cfeb140f4 arm: dts: rk3288-evb-android-rk808-edp: fix sensor layout
Change-Id: Ie4d19e6e0e39c2fceb8bae99b8c72199a4410a46
Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
2020-03-05 19:32:44 +08:00
Jianqun Xu
ac76d80e1d arm64: dts: rockchip: add rk3399-sapphire-excavator-edp-avb.dtb
Change-Id: I43be2a2bb9fee1fe2c9c60397d8daeadfa044e8f
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2020-03-05 19:31:12 +08:00
Li Huang
d9a506de89 ARM: dts: rockchip: 3288-android enable rga
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: Ibb97bc1147c1b6c8f5bd3722265546950258eb9f
2020-03-05 14:08:18 +08:00
Bian Jin chen
07b65d7918 ARM: dts: rockchip: enable rng for rk3288-android
Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
Change-Id: I22f2c683f5a1cbc34c0636cc95709b69ccc08c63
2020-03-04 19:01:01 +08:00
Wang Panzhenzhuan
5c46471281 arm: dts: rk3288-evb-android-rk808-edp: add camera configs
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: If6b2fac5efdbdfaa530fd1f69e967bc252670ac0
2020-03-04 11:35:31 +08:00
Jacob Chen
a5ab7a2f7b FROMLIST: ARM: dts: rockchip: add rx0 mipi-phy for rk3288
It's a Designware MIPI D-PHY, used by ISP in rk3288.

(am from https://patchwork.kernel.org/patch/10119093/)
Change-Id: Ib3386c9c8b58242a2a09bcd3bc7bd66589053a9b
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2020-03-04 11:35:15 +08:00
Wang Panzhenzhuan
3ad93913eb ARM: rockchip_defconfig: rk3288 evb board: enable ov13850 & vcm149c & sgm3784
ov13850 camera module used by rk3288 evb board

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I23ad3dcb06a9f5c748a9399f5d4e9e9b1936ca52
2020-03-04 11:34:52 +08:00
Wang Panzhenzhuan
55481078e5 media: i2c: ov13850 add power gpio support
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Ic7e707ab75e55843a348f51480a4964a888f7c55
2020-03-04 11:34:41 +08:00
Bian Jin chen
4a6058b7e5 ARM: config: rockchip_defconfig: enable CONFIG_OVERLAY_FS.
Android 10 use overlayfs to update logical partitions,
enabling this config to support adb debugging.

Test: adb root; adb remount; adb push some_file /somewhere.

Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>
Change-Id: Ic6d90915a88208b82f771db203521e628a74fc2d
2020-03-04 11:29:50 +08:00
Jianhui Wang
b1c20f0a91 drivers: input: sensor: add mpu6050 sensor support
Change-Id: Ieb3644db6b80f7ca241fe47fa7c1966cc490dce6
Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
2020-03-03 15:26:31 +08:00
Jianhui Wang
751d452440 ARM: dts: rockchip: rk3288-evb-android-rk808-edp add mpu6050 sensor support
Change-Id: I3dc9c9e867a7cef1527af01e845019da85ff9e46
Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
2020-03-03 15:13:13 +08:00