50227e1cae
Remove the rest of the references to drm_i915_private_t. No functional changes. Signed-off-by: Jani Nikula <jani.nikula@intel.com> [danvet: Drop hunk in i915_cmd_parser.c] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
118 lines
3.5 KiB
C
118 lines
3.5 KiB
C
/*
|
|
* Copyright © 2008 Intel Corporation
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice (including the next
|
|
* paragraph) shall be included in all copies or substantial portions of the
|
|
* Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
|
* IN THE SOFTWARE.
|
|
*
|
|
* Authors:
|
|
* Keith Packard <keithp@keithp.com>
|
|
*
|
|
*/
|
|
|
|
#include <drm/drmP.h>
|
|
#include <drm/i915_drm.h>
|
|
#include "i915_drv.h"
|
|
|
|
#if WATCH_LISTS
|
|
int
|
|
i915_verify_lists(struct drm_device *dev)
|
|
{
|
|
static int warned;
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
struct drm_i915_gem_object *obj;
|
|
int err = 0;
|
|
|
|
if (warned)
|
|
return 0;
|
|
|
|
list_for_each_entry(obj, &dev_priv->render_ring.active_list, list) {
|
|
if (obj->base.dev != dev ||
|
|
!atomic_read(&obj->base.refcount.refcount)) {
|
|
DRM_ERROR("freed render active %p\n", obj);
|
|
err++;
|
|
break;
|
|
} else if (!obj->active ||
|
|
(obj->base.read_domains & I915_GEM_GPU_DOMAINS) == 0) {
|
|
DRM_ERROR("invalid render active %p (a %d r %x)\n",
|
|
obj,
|
|
obj->active,
|
|
obj->base.read_domains);
|
|
err++;
|
|
} else if (obj->base.write_domain && list_empty(&obj->gpu_write_list)) {
|
|
DRM_ERROR("invalid render active %p (w %x, gwl %d)\n",
|
|
obj,
|
|
obj->base.write_domain,
|
|
!list_empty(&obj->gpu_write_list));
|
|
err++;
|
|
}
|
|
}
|
|
|
|
list_for_each_entry(obj, &dev_priv->mm.flushing_list, list) {
|
|
if (obj->base.dev != dev ||
|
|
!atomic_read(&obj->base.refcount.refcount)) {
|
|
DRM_ERROR("freed flushing %p\n", obj);
|
|
err++;
|
|
break;
|
|
} else if (!obj->active ||
|
|
(obj->base.write_domain & I915_GEM_GPU_DOMAINS) == 0 ||
|
|
list_empty(&obj->gpu_write_list)) {
|
|
DRM_ERROR("invalid flushing %p (a %d w %x gwl %d)\n",
|
|
obj,
|
|
obj->active,
|
|
obj->base.write_domain,
|
|
!list_empty(&obj->gpu_write_list));
|
|
err++;
|
|
}
|
|
}
|
|
|
|
list_for_each_entry(obj, &dev_priv->mm.gpu_write_list, gpu_write_list) {
|
|
if (obj->base.dev != dev ||
|
|
!atomic_read(&obj->base.refcount.refcount)) {
|
|
DRM_ERROR("freed gpu write %p\n", obj);
|
|
err++;
|
|
break;
|
|
} else if (!obj->active ||
|
|
(obj->base.write_domain & I915_GEM_GPU_DOMAINS) == 0) {
|
|
DRM_ERROR("invalid gpu write %p (a %d w %x)\n",
|
|
obj,
|
|
obj->active,
|
|
obj->base.write_domain);
|
|
err++;
|
|
}
|
|
}
|
|
|
|
list_for_each_entry(obj, &i915_gtt_vm->inactive_list, list) {
|
|
if (obj->base.dev != dev ||
|
|
!atomic_read(&obj->base.refcount.refcount)) {
|
|
DRM_ERROR("freed inactive %p\n", obj);
|
|
err++;
|
|
break;
|
|
} else if (obj->pin_count || obj->active ||
|
|
(obj->base.write_domain & I915_GEM_GPU_DOMAINS)) {
|
|
DRM_ERROR("invalid inactive %p (p %d a %d w %x)\n",
|
|
obj,
|
|
obj->pin_count, obj->active,
|
|
obj->base.write_domain);
|
|
err++;
|
|
}
|
|
}
|
|
|
|
return warned = err;
|
|
}
|
|
#endif /* WATCH_LIST */
|