The pxa ssp DAI acts as a user of a pxa ssp port, and needs an
appropriate 'port' phandle in DT to reference the upstream.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add a Mic Jack widget to the Tegra+RT5640 machine driver, and document
this in the DT binding. This enables the DT to include the Mic Jack in
the audio routing table, and hence enables capture of audio, in addition
to the previously-working playback.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
we defined some special properties for hardware flow control, document them
for DT-binding.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Some SGPIO PICs don't follow the standard very well and expect a certain
number of clock cycles or port frames in each SGPIO pattern. Add two
optional parameters in the DTB that can provide the number of extra
clock cycles to be sent before and after SGPIO pattern. Read those
parameters from the DTB and send the extra clock cycles.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Some board designs do not drive the SATA transmit lines within the
specification. The ECME can provide override settings, on a per board
basis, to bring the transmit lines within spec. Read those settings
from the DTB and program them in.
At the time of submission, no production hardware requires this patch.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
The Calxeda sata_highbank driver has been adding its descriptions to the
ahci driver. Separate them properly. This patch only affects
documentation and has no functional component.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
TI Palmas series Power Management IC have multiple pins which can be
configured for different functionality. This pins can be configured
for different function. Also their properties like pull up/down,
open drain enable/disable are configurable.
Add support for pincontrol driver Palmas series device like TPS65913,
TPS80036. The driver supports to be register from DT only.
Changes from V1:
- Add generic property for pins and functions in pinconf-generic.
- Add APIs to map the DT and subnode.
- Move common utils APIs to the pinctrl-utils from this file.
- Update the binding document accordingly.
Changes from V2:
- Add ack by Lee.
- Correct the binding docs.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch contains an ugly hack for looking up the the DMA request
number. The problem here is that the implementation as it stands will
allocate the DMA channel from the user of the ssp port, and hence we
cannot allocate a real channel here.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Hook up "pm_power_off" to palmas power off routine if there is DT
property "ti,system-power-controller" defined, so platform which is
powered by this regulator can be powered off properly.
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch adds clock to list of mfd cells for s2mps11 and DT documentation
for clock part.
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add Device Tree match table to xhci-plat.c. Add DT bindings document.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
All patches here have been pending on linux-usb
and sitting in linux-next for a while now.
The biggest things in this tag are:
DWC3 learned proper usage of threaded IRQ
handlers and now we spend very little time
in hardirq context.
MUSB now has proper support for BeagleBone and
Beaglebone Black.
Tegra's USB support also got quite a bit of love
and is learning to use PHY layer and generic DT
attributes.
Other than that, the usual pack of cleanups and
non-critical fixes follow.
Signed-of-by: Felipe Balbi <balbi@ti.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJSCpApAAoJEIaOsuA1yqREJl0QAJ6SY4cOVcUrk0gMcbPcU6ah
mhGJAzA5xcOrRzsrA/r9+mT4aN5zMtOmPtYNJGLgHxPxtmrkWDnUqnpUqBSCJXpt
45GZTIY/TNbe0USteVg0sGz9y8FEokpcLsXk2bBpdnpb0eCC/6UiEl4kVgvNbtTu
z8+vooY9O++Y5bcR6L5QJVBwm+YiIm/rReoLb17aYQCWVLkPvQ5J5dNdfRF/5FUS
uzA4bZdcQCaUtzAAUroIL8z8TgVFOZUCrUalRCs7fE5+7gh9+i/JlVQKMuol/3rR
1bfOdYwuG9XVu3iYKssRLSGUSUXU68ZviLBxwO24cz7EFkCxiKSF6+JT2PHrG1hj
XPxPGuKx4zqn4Lol2KdE5iban9AdgN+2JgjwZ8w9hBob+O14HfRTafKRlwBc27Mt
BiXJv+5mEVmAbi8Xya1w3J/mWHAh+Qxhi1SlPEyT5FfUG3b+2D/Kv1dgpApdVdYL
BW3CFSBgkFK8+WYGifnkNYtjj0v8z0eDaEU0cPmpy2L1pKgL3czNMNv/rgSH6r2n
ilF5kR05CkEYsP56ZpuYg0VYCkpchhW1REDwaMx/2Nt1W4GXRql15aAyN9CcS+v4
Xq0HVOSDyOV4juEryi296DDJPid6COELP8UtsKQLD+3nmifQEB58/S0NdNXJWcqs
GocgpeGXdnzyk5y14FdJ
=3NS9
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v3.12 merge window
All patches here have been pending on linux-usb
and sitting in linux-next for a while now.
The biggest things in this tag are:
DWC3 learned proper usage of threaded IRQ
handlers and now we spend very little time
in hardirq context.
MUSB now has proper support for BeagleBone and
Beaglebone Black.
Tegra's USB support also got quite a bit of love
and is learning to use PHY layer and generic DT
attributes.
Other than that, the usual pack of cleanups and
non-critical fixes follow.
Signed-of-by: Felipe Balbi <balbi@ti.com>
Conflicts:
drivers/usb/gadget/udc-core.c
drivers/usb/host/ehci-tegra.c
drivers/usb/musb/omap2430.c
drivers/usb/musb/tusb6010.c
Introduce a data structure to parameterize the driver according to SoC
generation, add Tegra30 specific code and update the device tree binding
document for Tegra30 support.
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Move the PCIe driver from arch/arm/mach-tegra into the drivers/pci/host
directory. The motivation is to collect various host controller drivers
in the same location in order to facilitate refactoring.
The Tegra PCIe driver has been largely rewritten, both in order to turn
it into a proper platform driver and to add MSI (based on code by
Krishna Kishore <kthota@nvidia.com>) as well as device tree support.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
[swarren, split DT changes into a separate patch in another branch]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Proper description for Exynos4 bindings added to Documentation/devicetree/
bindings. It adds description to use multiple TMU instances, optional voltage
supply node and optional shared register across multiple TMU's.
Acked-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Acked-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
This is based on the initial imx thermal work done by
Rob Lee <rob.lee@linaro.org> (Not sure if the email address is still
valid). Since he is no longer interested in the work and I have
rewritten a significant amount of the code, I just took the authorship
over from him.
It adds the imx thermal support using Temperature Monitor (TEMPMON)
block found on some Freescale i.MX SoCs. The driver uses syscon regmap
interface to access TEMPMON control registers and calibration data, and
supports cpufreq as the cooling device.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Exynos5420 added support for I2S TDM mode. For this, there are some
register changes in the I2S controller. This patch adds the relevant
register changes to support I2S in normal mode. This patch adds a
quirk for TDM mode and if TDM mode is present all the relevent changes
will be applied.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Samsung has different versions of I2S introduced in different
platforms. Each version has some new support added for multichannel,
secondary fifo, s/w reset control and internal mux for rclk src clk.
Each newly added change has a quirk. So this patch adds all the
required quirks as driver data and based on compatible string from
dtsi fetches the quirks.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Palmas regulator SMPS10 is splitted into two regulators SMPS10-OUT1 and
SMPS10-OUT2 to match with hw behavior. With this regulator's name got
changed in driver.
Update the DT binding document to match with driver.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Adding a simple device tree binding for the specification of key
sequences. Definition of the keys found in the sequence are located in
'include/uapi/linux/input.h'.
For the sysrq driver, holding the sequence of keys down for a specific
amount of time will reset the system.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Describe minimal DT boot machine details for DRA7xx based SoC's. DRA7xx
family is based on dual core ARM CORTEX A15 using GIC as the interrupt controller.
The PRCM and timer infrastructure is reused from OMAP5 and so are the io
descriptor tables.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Refactor so that register writes for configuration are only performed if
the device has a regmap provided and also register as a platform driver.
This allows the driver to be used to manage GPIO based control of the
device.
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The binding document says that all properties are required but in fact
almost all are optional (and should be) - update the document to reflect
this.
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
There are no software visible differences that I am aware of but in case
any are discovered allow the DTS to specify exactly which device is
present.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Document the new device tree parameters for Tegra30 USB PHY.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Exynos PCIe IP consists of Synopsys specific part and Exynos
specific part. Only core block is a Synopsys Designware part;
other parts are Exynos specific.
Also, the Synopsys Designware part can be shared with other
platforms; thus, it can be split two parts such as Synopsys
Designware part and Exynos specific part.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
The binding spec wasn't clear that the order of the phandles in the
usb-phy array has meaning. Clarify this point in the binding that
it should be <USB2-HS-PHY, USB3-SS-PHY>.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The MOXA UC-711X hardware(s) has an ethernet controller that seem
to be developed internally. The IC used is "RTL8201CP".
Since there is no public documentation, this driver is mostly the
one published by MOXA that has been heavily cleaned up / ported
from linux 2.6.9.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Pull i2c fixes from Wolfram Sang:
"Some driver bugfixes for the I2C subsystem"
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: mv64xxx: Document the newly introduced allwinner compatible
i2c: Fix Kontron PLD prescaler calculation
i2c: i2c-mxs: Use DMA mode even for small transfers
Add support for restart and poweroff functionality present on MSM chipsets
with the MPM2 ps-hold hardware.
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Anton Vorontsov <anton@enomsg.org>
A couple of fixes to bring the DT binding documentation for Palmas into
sync with the code.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSA3XHAAoJELSic+t+oim99V8P/RlIUqTKx17nWChbpbTYgysx
PNuwXp5TUjkvCmTtCy0OvdxyLoYWGR+LLzNfhYPNItLD9uXMA4Z6I+oNDb0wNxGl
XbPBN3FfZg2SEfV6gjXonXGOhLM7nT/90xwfKBHj2dmkZTCpu2BRnnm5qwgdyfKv
QZytKT3YajmcInCmaaanXznRRAqezc61audbGxbd2g0ewmMUs9NEt6UhkswluQsP
oxYOQ8RnW6jUvZ4451Z2UsYsV/oijZwrqg+gkNz1McEePPS86Yidr4flmv83gB9Y
tFMt4kzw0onHGpH2tmNsvkPkgk3DULdo1P/wiWi/Ap51/ZuhCkEPHIu1MariwEGf
thMrlGqN6FYbT4+j+MzHbF2cM/QodQuN6hqRbUSQO2hYVu8/isoh3bySQPyyK6c6
idbmdEe3oot+OWkBN7wICI0qlNZQBnAq+R/SLzrlOWtW+coGEnOwmMiM18MS9UcV
1Y/cNxS1zhXoFNoNVXjgUWdrTmxMEbVLI9Hr/5XjfBJIYR+uJOtsIPno3NuFJ7o4
4C1RSOxtLsdyP6aJ1IsozUGIRARgVsys6oVKAVW6atJDTTzOW/Qm+2uhSjbJuR5c
W1npzNKvyuFZ+rgiHJPpI+5f5TS30ct56c6UDj0c7fHlYP4PE7u3y3hsTV4DyhIK
LwUGRM9rjtnLF0jvxdac
=faDW
-----END PGP SIGNATURE-----
Merge tag 'regulator-v3.11-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator DT binding fixes from Mark Brown:
"A couple of fixes to bring the DT binding documentation for Palmas
into sync with the code"
* tag 'regulator-v3.11-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator:
regulator: palmas-pmic: doc: remove ti,tstep
regulator: palmas-pmic: doc: fix typo for sleep-mode
The pin list is the same for any board using the CODEC.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Add compatible "fsl,mpic-msi-v4.3" for MPIC v4.3. MPIC v4.3 contains
MSIIR and MSIIR1. MSIIR supports 8 MSI registers and MSIIR1 supports
16 MSI registers, but uses different IBS and SRS shift. When using
MSIR1, the interrupt number is not consecutive. It is hard to use
'msi-available-ranges' to describe the ranges of the available
interrupt, so MPIC v4.3 does not support this property.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
[scottwood@freescale.com: minor grammar fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
pinctrl bindings can benefit from generic property names that define
which pins a "pin configuration node" affects, and which mux function
to select onto those pins. Document new properties for this purpose so
that other bindings may refer to them.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reword the section of pinctrl-bindings.txt that describes generic
properties that pinctrl bindings may use. The aim is to make the text
clearer, and more explicitly call out the responsibility of individual
bindings that use the generic properties to define which of the
properties are used, and how.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
SCC (Serial Configuration Controller) is used to set initial
conditions for the test chip (TC2). Its registers are also mapped
in normal address space and used to obtain runtime information
and for power management.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>