The CG8 field of the CCM CCGR3 register is the 'mipi_core_cfg' gate clock,
according to the i.MX6q/sdl reference manuals. This clock is actually the
gate for several clocks, including the ipg clock's output. The MIPI DSI host
controller embedded in the i.MX6q/sdl SoCs takes the ipg clock as the pclk -
the APB clock signal . In order to gate/ungate the ipg clock, this patch adds
a new shared clock gate named as "mipi_ipg".
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The CG8 field of the CCM CCGR3 register is named as 'mipi_core_cfg' clock,
according to the i.MX6q/sdl reference manuals. This clock is actually the
gate for several clocks, including the hsi_tx_sel clock's output and the
video_27m clock's output. The MIPI DSI host controller embedded in the
i.MX6q/sdl SoCs uses the video_27m clock to generate PLL reference clock and
MIPI core configuration clock. In order to gate/ungate the two MIPI DSI
host controller relevant clocks, this patch adds the mipi_core_cfg clock as
a shared clock gate.
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The CG8 field of the CCM CCGR3 register is named as 'mipi_core_cfg'
clock, according to the i.MX6q/sdl reference manuals. This clock is
actually the gate for several clocks, including the hsi_tx_sel clock's
output and the video_27m clock's output. So, this patch changes the
hsi_tx clock to be a shared clock gate.
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
According to the table 33-1 in the i.MX6Q reference manual, the hdmi_isfr
clock's parent should be the video_27m clock. The i.MX6DL reference manual
has the same statement. This patch changes the hdmi_isfr clock's parent
from the pll3_pfd1_540m clock to the video_27m clock.
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch supports the video_27m clock which is a fixed factor
clock of the pll3_pfd1_540m clock.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This updates the bit sliced AES module to the latest version in the
upstream OpenSSL repository (e620e5ae37bc). This is needed to fix a
bug in the XTS decryption path, where data chunked in a certain way
could trigger the ciphertext stealing code, which is not supposed to
be active in the kernel build (The kernel implementation of XTS only
supports round multiples of the AES block size of 16 bytes, whereas
the conformant OpenSSL implementation of XTS supports inputs of
arbitrary size by applying ciphertext stealing). This is fixed in
the upstream version by adding the missing #ifndef XTS_CHAIN_TWEAK
around the offending instructions.
The upstream code also contains the change applied by Russell to
build the code unconditionally, i.e., even if __LINUX_ARM_ARCH__ < 7,
but implemented slightly differently.
Cc: stable@vger.kernel.org
Fixes: e4e7f10bfc ("ARM: add support for bit sliced AES using NEON instructions")
Reported-by: Adrian Kotelba <adrian.kotelba@gmail.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Milan Broz <gmazyland@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add a DTS file for MINIX NEO-X8, a Meson8-based digital media player.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Add pinctrl node to the DTSI file for meson8 and sub-nodes for some
standard mux configurations.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Add a node for the Ethernet controller to Meson DTS file and
enable it on the Geniatech ATV1200 board.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
This adds a node for the SPI Flash Controller to the Amlogic Meson
DTS.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Mark Brown <broonie@kernel.org>
Make sure that the Meson pinctrl driver is built whenever Meson
support is enabled.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This was incorrectly reading the irq status registers during the save
and clear, instead of the irq enable. This worked because there is only
one user for the prcm interrupts currently, namely the io-chain. Whenever
the function was called, an io-chain interrupt was both pending and
enabled.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Deasserting hardreset increases the usecount for the hwmod parent clockdomain
always, however usecount is only decreased at end in certain error cases.
This causes software supervised clockdomains to remain always on, preventing
idle. Fixed by always releasing the hwmods clockdomain parent when exiting
the function.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Carlos Hernandez <ceh@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The PHY IRQ line is connected to external IRQ8, not IRQ0. Fix DT
accordingly.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds sound card using the ak4643 codec.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Adds an entry for an R-Car Gen. 1 sound controller.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[horms: Removed undocumented "renesas,rcar_sound" compat string]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The smc91x driver traditionally gets configured at compile-time
for whichever hardware it runs on. This no longer works on
ARM as we continue to move to building all-in-one kernels.
Most ARM configurations with this driver already use run-time
configuration through DT or through platform_data, but a
few have not been converted yet.
I've checked all ARM boards that use this driver in their
legacy board files, and converted the ones that were using
compile-time configuration in smc91x.h to behave like the
other ones and provide the interrupt polarity along with
the MMIO configuration (width, stride) at platform device
creation time.
In particular, these combinations were previously selectable
in Kconfig but in fact broken:
- sa1100 assabet plus pleb
- msm combined with any other armv6/v7 platform
- pxa-idp combined with any non-DMA pxa variant
- LogicPD PXA270 combined with any other pxa
- nomadik combined with any other armv4/v5 platform,
e.g. versatile.
None of these seem critical enough to warrant a backport
to stable, but it would be nice to clean this up for good.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----
I would like the patch to get merged through netdev, after
Robert and/or Linus have verified it on at least some hardware.
There are a few other non-ARM platforms using this driver,
I could do the same patch for those if we want to take
it further.
arch/arm/mach-msm/board-halibut.c | 8 ++++-
arch/arm/mach-msm/board-qsd8x50.c | 8 ++++-
arch/arm/mach-pxa/idp.c | 5 +++
arch/arm/mach-pxa/lpd270.c | 8 ++++-
arch/arm/mach-realview/core.c | 7 ++++
arch/arm/mach-realview/realview_eb.c | 2 +-
arch/arm/mach-sa1100/neponset.c | 6 ++++
arch/arm/mach-sa1100/pleb.c | 7 ++++
drivers/net/ethernet/smsc/smc91x.c | 9 +++--
drivers/net/ethernet/smsc/smc91x.h | 114 ++----------------------------------------------------------
10 files changed, 57 insertions(+), 117 deletions(-)
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
Declare the fixed 148.5MHz pixel clocks connected to the DU clock
inputs.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Declare the fixed 148.5MHz pixel clocks connected to the DU clock
inputs.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Declare the fixed 65MHz pixel clock connected to the DU clock input.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
While the LEDs on r8a73a4/ape6evm are tied to VSUPPLY, they're driven by
an N-channel MOSFET. Hence the GPIO signal should be active high.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sets the extal clock to the frequency of the oscillator installed by
default (33 MHz).
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move the Ethernet node to the new BSC node, as its connected to the
Bus State Controller.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms: dropped compat string changes as they seem out of scope]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On Peach Pit and Pi boards, the Exynos SoC XCLKOUT pin provides
master clock (mclk) to the codec. So make it a clock consumer.
Signed-off-by: Tushar Behera <tushar.b@samsung.com>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Peach Pit and Pi boards have a WiFi module that is always powered
but needs toggling an enable pin and ungating a 32kHz reference
clock as part of their power sequencing.
Add a dev node for the SDIO slot and a MMC power sequence provider.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The Exynos5420 SoC has 3 sets of 8 pads used as data lines for the 3
MMC/SD/SDIO slots. These needs to be muxed as SD_n_DATA instead of a
GPIO or external interrupt to allow the MMC controller to communicate
with the attached cards or SDIO devices.
Which data lines needs to be muxed as SD_n_DATA depends on the bus
width used for data transfer:
* bus-width = <1> needs SD_n_DATA[0]
* bus-width = <4> needs SD_n_DATA[0-3]
* bus-width = <8> needs SD_n_DATA[0-7]
The Exynos5250-pinctrl.dtsi file that defines the groups of pins has
SD_n_DATA[0] muxed for both sdn_bus1 and sdn_bus4 so just one of them
needs to be included in the device node's pinctrl property.
But Exynos5420-pinctrl has a different definition and only includes
SD_n_DATA[1-3] for sdn_bus4. So for a bus-width = <4>, both sdn_bus1
and sdn_bus4 have to be in the dev pinctrl to mux all the needed pads.
It seems all Exynos5420 boards had just cargo cult the pinctrl lines
assuming that sdn_bus4 also included SD_n_DATA[0] and it only works
because the bootloader muxes the pads correctly. But that is not the
case for the devices not used by the bootloader such as WiFi modules.
Add sdn_bus1 too in the nodes pinctrl to not rely on the bootloader.
Suggested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
During CPU shutdown the exynos_cpu_power_down() is called after
disabling cache coherency and it uses LDREX and STREX instructions (by
calling of_machine_is_compatible() -> kobject_get() -> kref_get()).
The LDREX and STREX should not be used after disabling the cache
coherency so just use soc_is_exynos().
Fixes: adc548d77c ("ARM: EXYNOS: Use MCPM call-backs to support S2R
on exynos5420")
Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: <stable@vger.kernel.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The PM_H1940 symbol is used by two platforms: RX3715 and RX1950. However,
it is hidden inside of the the CPU_S3C2410 conditional, which is only
set by one of them, so we get a lot of randconfig warnings like
warning: (MACH_RX3715 && MACH_RX1950) selects PM_H1940 which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410)
This moves it outside of the conditional to remove the warnings.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The pm-core.h file does not include all the necessary headers,
and has a static declaration for a function that is not
defined in the same file, causing SAMSUNG_PM_DEBUG to
break on s3c24xx:
arch/arm/mach-s3c24xx/include/mach/pm-core.h:50:91: warning: 's3c_pm_show_resume_irqs' used but never defined
arch/arm/mach-s3c24xx/include/mach/pm-core.h: In function 's3c_pm_debug_init_uart':
arch/arm/mach-s3c24xx/include/mach/pm-core.h:16:34: error: 'S3C2410_CLKCON' undeclared (first use in this function)
unsigned long tmp = __raw_readl(S3C2410_CLKCON);
^
This moves the code around slightly to avoid the errors.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
We get lots of link errors based on the assumption that
any s3c24xx kernel would enable CONFIG_PM_SLEEP if it
enables CONFIG_PM. This tries to clean that up.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Both s3c2412 and s3c2416 use the s3c2412_pm_prepare code, which
depends on the common wakemask code, but only s3c2412 currently
selects the code, leading to a build error for an s3c2416-only
kernel.
arch/arm/mach-s3c24xx/built-in.o: In function `s3c2412_pm_prepare':
:(.text+0x240): undefined reference to `samsung_sync_wakemask'
arch/arm/mach-s3c24xx/built-in.o:(.data+0xeb0): undefined reference to `s3c2412_subsys'
This adds the missing select.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
smdk6410_b_pwr_5v_data is marked as __initdata, but referenced
from a structure that is not:
WARNING: arch/arm/mach-s3c64xx/built-in.o(.data+0x4c5c): Section mismatch in reference from the variable smdk6410_b_pwr_5v_data to the (unknown reference) .init.data:(unknown)
This removes the annotation to avoid an invalid pointer access
when the regulator driver accesses this variable.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
arch/arm/mach-s3c64xx/built-in.o: In function `s3c_pm_restore_core':
:(.text+0x5d0): undefined reference to `s3c_pm_do_restore_core'
:(.text+0x5d4): undefined reference to `s3c_pm_do_restore'
arch/arm/mach-s3c64xx/built-in.o: In function `s3c_pm_save_core':
:(.text+0x60c): undefined reference to `s3c_pm_do_save'
arch/arm/mach-s3c64xx/built-in.o: In function `s3c64xx_irq_pm_resume':
:(.text+0x670): undefined reference to `s3c_pm_do_restore'
arch/arm/mach-s3c64xx/built-in.o: In function `s3c64xx_irq_pm_suspend':
:(.text+0x6d8): undefined reference to `s3c_pm_do_save'
arch/arm/mach-s3c64xx/built-in.o: In function `s3c_cpu_resume':
:(.text+0x71c): undefined reference to `cpu_resume'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The SMDK6410_WM1190_EV1 and SMDK6410_WM1192_EV1 add-on
cards select MFD_WM*_I2C, but they ignore the fact that I2C
may be compiled as a loadable module.
This patch adds a dependency on I2C, which means we avoid
the build errors, but can end up in a case where the options
are hidden from the user when I2C is turned off.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The patch adds domain definition and references to it in appropriate devices.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
[mszyprow: rebased onto generic power domains dt bindings]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Mixed block needs to control hdmi clock to properly perform power on/off
operation, so add 'hdmi' clock also to mixer nodes.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds configuration of hw modules required to enable HDMI
support on Universal C210 board.
Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds nodes specific to Exynos4412 based Odroid X/X2/U2/U3
boards required for enabling HDMI display.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
TV Mixer needs both TV and LCD0 domains enabled to be fully operational.
This dependency is modelled by making TV power domains a sub-domain of
LCD0 power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds entries for HDMI, Mixer and i2c with hdmi-phy modules
found in Exynos 4210 and 4x12 SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences for devices
like TV Mixer or Camera ISP, which needs to have more than one power
domain enabled to be operational.
Based on previous work by Amit Daniel Kachhap <amit.daniel@samsung.com>.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Presented device tree bindings provide data already hardcoded in the
exynos_tmu_data.c file.
After this commit, it should be possible to reuse common thermal core
framework in Exynos SoCs.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This commit provides information about Exynos5440 device configuration.
Previously this information was available in exynos_tmu_data.c file.
Now it is available in the device tree.
Such approach allows reusing some common code for thermal.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
