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62,865 commits

Author SHA1 Message Date
Jonas Aaberg
2f73a06843 ARM: plat-nomadik: timer: Add support for periodic timers
This adds support for a periodic mode in the MTU (Nomadik)
timer clockevent driver. It also include changes needed for
deeper powerstates where MTU block gets powered off.

Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-22 15:44:10 +02:00
Jonas Aaberg
5f5663a436 ARM: ux500: Move timer code to separate file
Just split off the timer code to its own file so we have a
more fine-grained file tree.

Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-22 15:43:26 +02:00
Mattias Wallin
7ed00af7a9 ARM: ux500: add support for clocksource DBX500 PRCMU
This patch adds support for the DBX500 PRCMU clocksource
to ux500 platforms.

Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.co>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-22 15:43:20 +02:00
Mattias Wallin
cba13830d3 ARM: plat-nomadik: MTU sched_clock as an option
This patch makes it possible to configure away the sched_clock
part of the MTU timer.

Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com>
Signed-off-by: Jonas Aberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-22 15:42:33 +02:00
Linus Walleij
1bf6d2c1bb ARM: mach-ux500: unlock I&D l2x0 caches before init
Apparently U8500 U-Boot versions may leave the l2x0 locked down
before executing the kernel. Make sure we unlock it before we
initialize the l2x0. This fixes a performance problem reported
by Jan Rinze.

The l2x0 core has been modified to unlock the l2x0 by default,
but it will not touch the locking registers if the l2x0 was
already enabled, as on the ux500, so we need this quirk to
make sure it is properly turned off.

Cc: stable@kernel.org
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Adrian Bunk <adrian.bunk@movial.com>
Reported-by: Jan Rinze <janrinze@gmail.com>
Tested-by: Robert Marklund <robert.marklund@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-22 14:07:34 +02:00
srinidhi kasagar
e0628d25ce ARM: mach-ux500: enable fix for ARM errata 754322
This applies ARM errata fix 754322 for all ux500 platforms.

Cc: stable@kernel.org
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-22 14:07:20 +02:00
H Hartley Sweeten
4a4cc2b6bf crypto: aes-x86 - quiet sparse noise about symbol not declared
Include <asm/aes.h> to pick up the declarations for crypto_aes_encrypt_x86
and crypto_aes_decrypt_x86 to quiet the sparse noise:

warning: symbol 'crypto_aes_encrypt_x86' was not declared. Should it be static?
warning: symbol 'crypto_aes_decrypt_x86' was not declared. Should it be static?

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Mandeep Singh Baines <msb@chromium.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2011-09-22 21:33:01 +10:00
Jussi Kivilinna
64b94ceae8 crypto: blowfish - add x86_64 assembly implementation
Patch adds x86_64 assembly implementation of blowfish. Two set of assembler
functions are provided. First set is regular 'one-block at time'
encrypt/decrypt functions. Second is 'four-block at time' functions that
gain performance increase on out-of-order CPUs. Performance of 4-way
functions should be equal to 1-way functions with in-order CPUs.

Summary of the tcrypt benchmarks:

Blowfish assembler vs blowfish C (256bit 8kb block ECB)
encrypt: 2.2x speed
decrypt: 2.3x speed

Blowfish assembler vs blowfish C (256bit 8kb block CBC)
encrypt: 1.12x speed
decrypt: 2.5x speed

Blowfish assembler vs blowfish C (256bit 8kb block CTR)
encrypt: 2.5x speed

Full output:
http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-blowfish-asm-x86_64.txt
http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-blowfish-c-x86_64.txt

Tests were run on:
 vendor_id	: AuthenticAMD
 cpu family	: 16
 model		: 10
 model name	: AMD Phenom(tm) II X6 1055T Processor
 stepping	: 0

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2011-09-22 21:25:26 +10:00
David S. Miller
8decf86879 Merge branch 'master' of github.com:davem330/net
Conflicts:
	MAINTAINERS
	drivers/net/Kconfig
	drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
	drivers/net/ethernet/broadcom/tg3.c
	drivers/net/wireless/iwlwifi/iwl-pci.c
	drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c
	drivers/net/wireless/rt2x00/rt2800usb.c
	drivers/net/wireless/wl12xx/main.c
2011-09-22 03:23:13 -04:00
Peter Ujfalusi
d05e2ea8dc OMAP4: hwmod: enable mcpdm hwmod device.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Jorge Eduardo Candelaria
Signed-off-by: Margarita Olaya Cabrera
Signed-off-by: Liam Girdwood <lrg@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2011-09-22 09:19:15 +03:00
Peter Ujfalusi
d231f5cbac OMAP: McPDM: Convert McPDM device to omap_device
McPDM device is converted to omap device.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Jorge Eduardo Candelaria
Signed-off-by: Margarita Olaya Cabrera
Signed-off-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2011-09-22 09:19:15 +03:00
Tarun Kanti DebBarma
ab4eb8b098 ARM: OMAP: dmtimer: add error handling to export APIs
Add error handling code to export APIs.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 17:26:51 -07:00
Tarun Kanti DebBarma
b481113a8a ARM: OMAP: dmtimer: low-power mode support
Clock is enabled only when timer is started and disabled when the the timer
is stopped. Therefore before accessing registers in functions clock is enabled
and then disabled back at the end of access. Context save is done dynamically
whenever the registers are modified. Context restore is called when context is
lost.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[tony@atomide.com: updated to use revision instead of tidr]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 17:07:34 -07:00
Tony Lindgren
0dad9faeae ARM: OMAP: dmtimer: skip reserved timers
Pass the reserved flag in pdata and use it. We can
now make sys_timer_reserved static to mach-omap2/timer.c.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 16:38:51 -07:00
Tarun Kanti DebBarma
ffe07ceae1 ARM: OMAP: dmtimer: pm_runtime support
Add pm_runtime feature to dmtimer whereby *_runtime_get_sync()
is called within omap_dm_timer_enable(), pm_runtime_put()
is called in omap_dm_timer_disable(). In addition to calling
pm_runtime_enable, we are calling pm_runtime_irq_safe so that
they can be called from interrupt context.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Partha Basak <p-basak2@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 15:50:31 -07:00
Tarun Kanti DebBarma
3392cdd33a ARM: OMAP: dmtimer: switch-over to platform device driver
Register timer devices by going through hwmod database using
hwmod API. The driver probes each of the registered devices.
Functionality which are already performed by hwmod framework
are removed from timer code. New set of timers present on
OMAP4 are now supported.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
[tony@atomide.com: folded in spinlock changes, left out is_omap2]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 15:50:31 -07:00
Tarun Kanti DebBarma
df28472a1b ARM: OMAP: dmtimer: platform driver
Add dmtimer platform driver functions which include:
(1) platform driver initialization
(2) driver probe function
(3) driver remove function

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Thara Gopinath <thara@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 15:50:31 -07:00
Tarun Kanti DebBarma
c345c8b09d ARM: OMAP2+: dmtimer: convert to platform devices
Add routines to converts dmtimers to platform devices. The device data
is obtained from hwmod database of respective platform and is registered
to device model after successful binding to driver.
In addition, capability attribute of each of the timers is added in
hwmod database.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Thara Gopinath <thara@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 15:50:31 -07:00
Tarun Kanti DebBarma
97933d6ced ARM: OMAP1: dmtimer: conversion to platform devices
Convert OMAP1 dmtimers into a platform devices and then registers with
device model framework so that it can be bound to corresponding driver.

Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 15:50:31 -07:00
Tarun Kanti DebBarma
318c3e15cd ARM: OMAP2+: dmtimer: add device names to flck nodes
Add device name to OMAP2 dmtimer fclk nodes so that the fclk nodes can be
retrieved by doing a clk_get with the corresponding device pointers or
device names.

Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Thara Gopinath <thara@ti.com>
Acked-by: Cousson, Benoit <b-cousson@ti.com>
[tony@atomide.com: fixed typo in email address]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-21 15:50:31 -07:00
David S. Miller
11032c17bd sparc: Make '-p' boot option meaningful again.
If "-p" is given on the command line, clear the CON_BOOT
flag for the initial early boot PROM console.

This is necessary to try and see crash messages that occur
between the registry of the VT console and the probing of
the first framebuffer or serial console.  During this time
no console messages are emitted because the VT console
registry (even if no backend is registered to it) removes
the early console if CON_BOOT is set.

Signed-off-by: David S. Miller <davem@davemloft.net>
2011-09-21 12:48:06 -07:00
Kevin Hilman
fbe01f51a8 ARM: 7082/1: platform_device: pdev_archdata: add omap_device pointer
Add omap_device pointer to the ARM-specific arch data in the
platform_device.  This will be used to attach OMAP-specific
device-data to the platform device with device lifetime.

Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>

Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-21 10:45:59 -07:00
Ohad Ben-Cohen
c3c1250e93 hwspinlock/core/omap: fix id issues on multiple hwspinlock devices
hwspinlock devices provide system-wide hardware locks that are used
by remote processors that have no other way to achieve synchronization.

To achieve that, each physical lock must have a system-wide id number
that is agreed upon, otherwise remote processors can't possibly assume
they're using the same hardware lock.

Usually boards have a single hwspinlock device, which provides several
hwspinlocks, and in this case, they can be trivially numbered 0 to
(num-of-locks - 1).

In case boards have several hwspinlocks devices, a different base id
should be used for each hwspinlock device (they can't all use 0 as
a starting id!).

While this is certainly not common, it's just plain wrong to just
silently use 0 as a base id whenever the hwspinlock driver is probed.

This patch provides a hwspinlock_pdata structure, that boards can use
to set a different base id for each of the hwspinlock devices they may
have, and demonstrates how to use it with the omap hwspinlock driver.

While we're at it, make sure the hwspinlock core prints an explicit
error message in case an hwspinlock is registered with an id number
that already exists; this will help users catch such base id issues.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2011-09-21 19:45:32 +03:00
Kevin Hilman
2edc7ba5e8 ARM: OMAP: voltage: voltage layer present, even when CONFIG_PM=n
Even when CONFIG_PM=n, we try to scale the boot voltage to a sane,
known value using OPP table to find matching voltage based on boot
frequency.  This should be done, even when CONFIG_PM=n to avoid
mis-configured bootloaders and/or boot voltage assumptions made by
boot loaders.

Also fixes various compile problems due to depenencies between voltage
domain and powerdomain code (also present when CONFIG_PM=n).

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kevin Hilman <khilman@ti.com>
2011-09-21 09:36:21 -07:00
David Daney
0f4ccbc835 MIPS: No branches in delay slots for huge pages in handle_tlbl
For the case PM_DEFAULT_MASK == 0, we were placing a branch in the
delay slot of another branch.  This leads to undefined behavior.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2775/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:54:07 +02:00
David Daney
d968275921 MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTC
Reported-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/2753/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:54:02 +02:00
David Daney
465aaed003 MIPS: Octeon: Select CONFIG_HOLES_IN_ZONE
Current Octeon systems do in fact have holes in their memory zones.
We need to select HOLES_IN_ZONE.  If we do not, some memory
configurations will result in crashes at boot time like this:

.
.
.
CPU 6 Unable to handle kernel paging request at virtual address 0000000000700000, epc == ffffffff8118fe00, ra == ffffffff8118fe9c
Oops[#1]:
Cpu 6
.
.
.
        ...
Call Trace:
[<ffffffff8118fe00>] setup_per_zone_wmarks+0x1b0/0x338
[<ffffffff815cd738>] init_per_zone_wmark_min+0x64/0xd0
[<ffffffff81100438>] do_one_initcall+0x38/0x160
.
.
.

Reported-by: Jason Kwon <jason.kwon@ericsson.com>
Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Cc: Jason Kwon <jason.kwon@ericsson.com>
Patchwork: https://patchwork.linux-mips.org/patch/2724/
Tested-by: Guenter Roeck<guenter.roeck@ericsson.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:56 +02:00
Rafael J. Wysocki
bd7100099a MIPS: PM: Use struct syscore_ops instead of sysdevs for PM (v2)
Convert some MIPS architecture's code to using struct syscore_ops
objects for power management instead of sysdev classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Acked-and-tested-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-kernel@vger.kernel.org
Cc: "Rafael J.  Wysocki" <rjw@sisk.pl>
Patchwork: http://patchwork.linux-mips.org/patch/2431/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:51 +02:00
Yong Zhang
1eec6cd08b MIPS: Compat: Use 32-bit wrapper for compat_sys_futex.
We can't trust userspace to pass signed-extend arguments.  Not correctly
sign-extended arguments to futex-wait result in architecturally undefined
operation of 32-bit arithmetic instructions.

For example, if 'val' is too big and bit-31 is 1, the caller may enter
endless loop at:

futex_wait_setup()
{
	...

	if (uval != val) {
		queue_unlock(q, *hb);
		ret = -EWOULDBLOCK;

	...
}

Signed-off-by: Yong Zhang <yong.zhang@windriver.com>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2714/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:44 +02:00
Arnaud Lacombe
b8ecf341f1 MIPS: Do not use EXTRA_CFLAGS
Usage of these flags has been deprecated for nearly 4 years by:

    commit f77bf01425
    Author: Sam Ravnborg <sam@neptun.(none)>
    Date:   Mon Oct 15 22:25:06 2007 +0200

        kbuild: introduce ccflags-y, asflags-y and ldflags-y

Moreover, these flags (at least EXTRA_CFLAGS) have been documented for command
line use. By default, gmake(1) do not override command line setting, so this is
likely to result in build failure or unexpected behavior.

Replace their usage by Kbuild's `{as,cc,ld}flags-y'.

To: linux-kernel@vger.kernel.org
Cc: Sam Ravnborg <sam@ravnborg.org>
Patchwork: https://patchwork.linux-mips.org/patch/2710/
Cc: linux-mips@linux-mips.org
Signed-off-by: Arnaud Lacombe <lacombar@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:38 +02:00
Manuel Lauss
dd0a028183 MIPS: Alchemy: DB1200: Disable cascade IRQ in handler
Disable the cascade IRQ in the cascade handler.  This is required to
get the DB1300 working, and also gets rid of all spurious interrupts
previously observed on the DB1200; so Config[OD] can be disabled
again for better performance.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2708/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:32 +02:00
John Crispin
0596954681 MIPS: Lantiq: Fix setting the PCI bus speed on AR9
The bits used to set the PCI bus speed on AR9 are slightly different to
those used on Danube.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2614/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:18 +02:00
John Crispin
77fbdb30f0 MIPS: Lantiq: Fix external interrupt sources
The irq base offset needs to be ignored when matching irqs to external
interrupt pins. Taking the offset into account resulted in the EIU not
being brought up properly.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2616/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:12 +02:00
Ralf Baechle
d954ffe34a MIPS: tlbex: Fix build error in R3000 code.
Only some GCC versions such as gcc 4.2 notice that the variable wr in
build_r3000_tlb_modify_handler is used uninitialized.  When using one
of those GCCs the build will fail due to -Werror.  GCC 4.6 does not
warn about the uninitialized use of wr.

This issue was introduced by 7211f4d7a3dcbe57c5d396c334dca525315dceb2
[MIPS: Close races in TLB modify handlers.]

Reported-by: Ganesan Ramalingam <ganesan18@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:07 +02:00
Manuel Lauss
870168a031 MIPS: Alchemy: Include Au1100 in PM code.
The current code forgets the Au1100 when looking for the correct method to
suspend the chip.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2675/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:53:01 +02:00
Manuel Lauss
c78c488273 MIPS: Alchemy: Fix typo in MAC0 registration
Harmless typo which prints an error message although MAC0 was registered
successfully.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:52 +02:00
Ralf Baechle
a705dc7cf4 MIPS: MSP71xx: Fix build error.
CC      arch/mips/pmc-sierra/msp71xx/msp_irq.o
/home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:112:2: error: request for member ‘flags’ in something not a structure or union
/home/ralf/src/linux/linux-mips/arch/mips/pmc-sierra/msp71xx/msp_irq.c:118:2: error: request for member ‘flags’ in something not a structure or union
make[4]: *** [arch/mips/pmc-sierra/msp71xx/msp_irq.o] Error 1

caused by 57336bc1056798d89714b7fb1b1d197e6bda6819 [MIPS: Mark cascade and
low level interrupts IRQF_NO_THREAD].

Commas to separate struct initializers generally are considered useful to
enhance the compilation experience of the user.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:44 +02:00
Ralf Baechle
1f717929e9 MIPS: Handle __put_user() sleeping.
do_signal() does __put_user() which can fault, resulting in a might_sleep()
warning in down_read(&mm->mmap_sem) and a "scheduling while atomic" warning
when mmap_sem is contented. On Swarm this also results in:

WARNING: at kernel/smp.c:459 smp_call_function_many+0x148/0x398()
Modules linked in:
Call Trace:

[<ffffffff804b48a4>] dump_stack+0x1c/0x50
[<ffffffff8013dc94>] warn_slowpath_common+0x8c/0xc8
[<ffffffff8013dcfc>] warn_slowpath_null+0x2c/0x40
[<ffffffff801864a0>] smp_call_function_many+0x148/0x398
[<ffffffff80186748>] smp_call_function+0x58/0xa8
[<ffffffff80119b5c>] r4k_flush_data_cache_page+0x54/0xd8
[<ffffffff801f39bc>] handle_pte_fault+0xa9c/0xad0
[<ffffffff801f40d0>] handle_mm_fault+0x158/0x200
[<ffffffff80115548>] do_page_fault+0x218/0x3b0
[<ffffffff80102744>] ret_from_exception+0x0/0x10
[<ffffffff8010eb18>] copy_siginfo_to_user32+0x50/0x298
[<ffffffff8010edf0>] setup_rt_frame_32+0x90/0x250
[<ffffffff80106414>] do_notify_resume+0x154/0x358
[<ffffffff80102930>] work_notifysig+0xc/0x14

Fixed by enabling interrupts in do_notify_resume before delivering signals.

[ralf@linux-mips.org: Reported and original fix by tglx but I wanted to
minimize the amount of code being run with interrupts disabled so I moved
the local_irq_disable() call right into do_notify_resume.  Which is saner
than doing it in entry.S.]

Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:38 +02:00
Thomas Gleixner
0f462e3c12 MIPS: Allow forced irq threading
All low level interrupts have been marked NO_THREAD, so MIPS can enjoy
the wonderful world of forced threaded interrupt handlers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2639/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:34 +02:00
Liming Wang
5c22cd4075 MIPS: i8259: Mark cascade interrupt non-threaded
Cascade interrupts cannot be threaded.

Signed-off-by: Liming Wang <liming.wang@windriver.com>
Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1314370804-21266-1-git-send-email-liming.wang@windriver.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2770/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:28 +02:00
Wu Zhangjin
77cbece767 MIPS: Loongson: Mark cascade interrupts IRQF_NO_THREAD
There are two cascade interrupts in Loongson machines, one for bonito
northbridge, another for the 8259A controller in the southbridge. Both
want to be non threaded.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/2638/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:22 +02:00
Wu Zhangjin
5a4a4ad851 MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD
Mark interrupts with no_action handler, cascade interrupts, low level
interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them
from forced threading.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:15 +02:00
Wu Zhangjin
4d85f6afa4 MIPS: Make the die_lock be raw
On preempt-rt this lock needs to be raw, so it does not get converted
to a sleeping spinlock. Trying to sleep in a panic is not really
desireable.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2636/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:09 +02:00
Thomas Gleixner
49de830ad7 MIPS: Ftrace: Fix the CONFIG_DYNAMIC_FTRACE=n compile
arch/mips/kernel/ftrace.c: In function ‘ftrace_get_parent_ra_addr’:
arch/mips/kernel/ftrace.c:212: error: implicit declaration of function ‘in_kernel_space’
arch/mips/kernel/ftrace.c: In function ‘prepare_ftrace_return’:
arch/mips/kernel/ftrace.c:314: error: ‘MCOUNT_OFFSET_INSNS’ undeclared (first use in this function)
arch/mips/kernel/ftrace.c:314: error: (Each undeclared identifier is reported only once
arch/mips/kernel/ftrace.c:314: error: for each function it appears in.)

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2634/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:04 +02:00
Yoichi Yuasa
20ef5d3a23 MIPS: RC32434: Fix PCI build error
arch/mips/pci/pci-rc32434.c: In function 'rc32434_pci_init':
arch/mips/pci/pci-rc32434.c:217:16: error: 'rcrc32434_res_pci_io1' undeclared (first use in this function)
arch/mips/pci/pci-rc32434.c:217:16: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [arch/mips/pci/pci-rc32434.o] Error 1

This problem is included in the following commit.

  commit 28f65c11f2
  Author: Joe Perches <joe@perches.com>
  Date:   Thu Jun 9 09:13:32 2011 -0700

      treewide: Convert uses of struct resource to resource_size(ptr)

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: Joe Perches <joe@perches.com>
Patchwork: https://patchwork.linux-mips.org/patch/2654/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:51:57 +02:00
Rongjun Ying
2558bd99cb ARM: CSR: PM: add sleep entry for SiRFprimaII
This patch adds suspend-to-mem support for prima2. It will make prima2
enter DEEPSLEEP mode while accepting PM_SUSPEND_MEM command.

Signed-off-by: Rongjun Ying <rongjun.ying@csr.com>
Signed-off-by: Barry Song <baohua.song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-09-21 23:25:59 +08:00
Peter Ujfalusi
0722d055ac ASoC: tpa6130a2: Remove model_id from platform data
The model_id is no longer needed within the platform_data
for the TPA driver since the model of TPA specified
with the device name (tpa6130a2/tpa6140a2).

Also update rx51 (the only affected user) to use the device name rather
than platform data.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-09-21 16:07:45 +01:00
Barry Song
9c2a51faab ARM: CSR: PM: save/restore irq status in suspend cycle
SiRFprimaII will lose power in deepsleep mode except rtc, pmu and sdram
self-refresh. So IRQ controller will lose status in suspend cyle.
This patch saves irq mask/level registers while suspending and restore
them while resuming.

Signed-off-by: Barry Song <baohua.song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-09-21 22:52:58 +08:00
Barry Song
e5598a855b ARM: CSR: PM: save/restore timer status in suspend cycle
SiRFprimaII will lose power in deepsleep mode except rtc, pmu and sdram
self-refresh.
This patch saves timer-related registers while suspending and restore
them while resuming.

Signed-off-by: Barry Song <baohua.song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-09-21 22:50:08 +08:00
Arnd Bergmann
9be6eb412e Merge branch 'davinci/cleanup' into next/cleanup 2011-09-21 14:20:17 +00:00