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											2013-10-11 10:51:23 +02:00
										 |  |  | /*
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							|  |  |  |  *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * This program is free software; you can redistribute it and/or modify | 
					
						
							|  |  |  |  * it under the terms of the GNU General Public License as published by | 
					
						
							|  |  |  |  * the Free Software Foundation; either version 2 of the License, or | 
					
						
							|  |  |  |  * (at your option) any later version. | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | 
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							|  |  |  | #include <linux/clk-provider.h>
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							|  |  |  | #include <linux/clkdev.h>
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							|  |  |  | #include <linux/clk/at91_pmc.h>
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							|  |  |  | #include <linux/of.h>
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							|  |  |  | #include <linux/of_address.h>
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							|  |  |  | #include <linux/of_irq.h>
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							|  |  |  | #include <linux/io.h>
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							|  |  |  | #include <linux/wait.h>
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							|  |  |  | #include <linux/sched.h>
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							|  |  |  | #include <linux/interrupt.h>
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							|  |  |  | #include <linux/irq.h>
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							|  |  |  | 
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							|  |  |  | #include "pmc.h"
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							|  |  |  | 
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							|  |  |  | #define MASTER_SOURCE_MAX	4
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							|  |  |  | 
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							|  |  |  | #define MASTER_PRES_MASK	0x7
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							|  |  |  | #define MASTER_PRES_MAX		MASTER_PRES_MASK
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							|  |  |  | #define MASTER_DIV_SHIFT	8
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							|  |  |  | #define MASTER_DIV_MASK		0x3
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							|  |  |  | 
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							|  |  |  | struct clk_master_characteristics { | 
					
						
							|  |  |  | 	struct clk_range output; | 
					
						
							|  |  |  | 	u32 divisors[4]; | 
					
						
							|  |  |  | 	u8 have_div3_pres; | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | struct clk_master_layout { | 
					
						
							|  |  |  | 	u32 mask; | 
					
						
							|  |  |  | 	u8 pres_shift; | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | #define to_clk_master(hw) container_of(hw, struct clk_master, hw)
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							|  |  |  | 
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							|  |  |  | struct clk_master { | 
					
						
							|  |  |  | 	struct clk_hw hw; | 
					
						
							|  |  |  | 	struct at91_pmc *pmc; | 
					
						
							|  |  |  | 	unsigned int irq; | 
					
						
							|  |  |  | 	wait_queue_head_t wait; | 
					
						
							|  |  |  | 	const struct clk_master_layout *layout; | 
					
						
							|  |  |  | 	const struct clk_master_characteristics *characteristics; | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | static irqreturn_t clk_master_irq_handler(int irq, void *dev_id) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct clk_master *master = (struct clk_master *)dev_id; | 
					
						
							|  |  |  | 
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							|  |  |  | 	wake_up(&master->wait); | 
					
						
							|  |  |  | 	disable_irq_nosync(master->irq); | 
					
						
							|  |  |  | 
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							|  |  |  | 	return IRQ_HANDLED; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | static int clk_master_prepare(struct clk_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct clk_master *master = to_clk_master(hw); | 
					
						
							|  |  |  | 	struct at91_pmc *pmc = master->pmc; | 
					
						
							|  |  |  | 
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							|  |  |  | 	while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY)) { | 
					
						
							|  |  |  | 		enable_irq(master->irq); | 
					
						
							|  |  |  | 		wait_event(master->wait, | 
					
						
							|  |  |  | 			   pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY); | 
					
						
							|  |  |  | 	} | 
					
						
							|  |  |  | 
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							|  |  |  | 	return 0; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | static int clk_master_is_prepared(struct clk_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct clk_master *master = to_clk_master(hw); | 
					
						
							|  |  |  | 
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							|  |  |  | 	return !!(pmc_read(master->pmc, AT91_PMC_SR) & AT91_PMC_MCKRDY); | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | static unsigned long clk_master_recalc_rate(struct clk_hw *hw, | 
					
						
							|  |  |  | 					    unsigned long parent_rate) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	u8 pres; | 
					
						
							|  |  |  | 	u8 div; | 
					
						
							|  |  |  | 	unsigned long rate = parent_rate; | 
					
						
							|  |  |  | 	struct clk_master *master = to_clk_master(hw); | 
					
						
							|  |  |  | 	struct at91_pmc *pmc = master->pmc; | 
					
						
							|  |  |  | 	const struct clk_master_layout *layout = master->layout; | 
					
						
							|  |  |  | 	const struct clk_master_characteristics *characteristics = | 
					
						
							|  |  |  | 						master->characteristics; | 
					
						
							|  |  |  | 	u32 tmp; | 
					
						
							|  |  |  | 
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							|  |  |  | 	pmc_lock(pmc); | 
					
						
							|  |  |  | 	tmp = pmc_read(pmc, AT91_PMC_MCKR) & layout->mask; | 
					
						
							|  |  |  | 	pmc_unlock(pmc); | 
					
						
							|  |  |  | 
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							|  |  |  | 	pres = (tmp >> layout->pres_shift) & MASTER_PRES_MASK; | 
					
						
							|  |  |  | 	div = (tmp >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK; | 
					
						
							|  |  |  | 
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							|  |  |  | 	if (characteristics->have_div3_pres && pres == MASTER_PRES_MAX) | 
					
						
							|  |  |  | 		rate /= 3; | 
					
						
							|  |  |  | 	else | 
					
						
							|  |  |  | 		rate >>= pres; | 
					
						
							|  |  |  | 
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							|  |  |  | 	rate /= characteristics->divisors[div]; | 
					
						
							|  |  |  | 
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							|  |  |  | 	if (rate < characteristics->output.min) | 
					
						
							|  |  |  | 		pr_warn("master clk is underclocked"); | 
					
						
							|  |  |  | 	else if (rate > characteristics->output.max) | 
					
						
							|  |  |  | 		pr_warn("master clk is overclocked"); | 
					
						
							|  |  |  | 
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							|  |  |  | 	return rate; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | static u8 clk_master_get_parent(struct clk_hw *hw) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct clk_master *master = to_clk_master(hw); | 
					
						
							|  |  |  | 	struct at91_pmc *pmc = master->pmc; | 
					
						
							|  |  |  | 
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							|  |  |  | 	return pmc_read(pmc, AT91_PMC_MCKR) & AT91_PMC_CSS; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | static const struct clk_ops master_ops = { | 
					
						
							|  |  |  | 	.prepare = clk_master_prepare, | 
					
						
							|  |  |  | 	.is_prepared = clk_master_is_prepared, | 
					
						
							|  |  |  | 	.recalc_rate = clk_master_recalc_rate, | 
					
						
							|  |  |  | 	.get_parent = clk_master_get_parent, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | static struct clk * __init | 
					
						
							|  |  |  | at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq, | 
					
						
							|  |  |  | 		const char *name, int num_parents, | 
					
						
							|  |  |  | 		const char **parent_names, | 
					
						
							|  |  |  | 		const struct clk_master_layout *layout, | 
					
						
							|  |  |  | 		const struct clk_master_characteristics *characteristics) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	int ret; | 
					
						
							|  |  |  | 	struct clk_master *master; | 
					
						
							|  |  |  | 	struct clk *clk = NULL; | 
					
						
							|  |  |  | 	struct clk_init_data init; | 
					
						
							|  |  |  | 
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							|  |  |  | 	if (!pmc || !irq || !name || !num_parents || !parent_names) | 
					
						
							|  |  |  | 		return ERR_PTR(-EINVAL); | 
					
						
							|  |  |  | 
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							|  |  |  | 	master = kzalloc(sizeof(*master), GFP_KERNEL); | 
					
						
							|  |  |  | 	if (!master) | 
					
						
							|  |  |  | 		return ERR_PTR(-ENOMEM); | 
					
						
							|  |  |  | 
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							|  |  |  | 	init.name = name; | 
					
						
							|  |  |  | 	init.ops = &master_ops; | 
					
						
							|  |  |  | 	init.parent_names = parent_names; | 
					
						
							|  |  |  | 	init.num_parents = num_parents; | 
					
						
							|  |  |  | 	init.flags = 0; | 
					
						
							|  |  |  | 
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							|  |  |  | 	master->hw.init = &init; | 
					
						
							|  |  |  | 	master->layout = layout; | 
					
						
							|  |  |  | 	master->characteristics = characteristics; | 
					
						
							|  |  |  | 	master->pmc = pmc; | 
					
						
							|  |  |  | 	master->irq = irq; | 
					
						
							|  |  |  | 	init_waitqueue_head(&master->wait); | 
					
						
							|  |  |  | 	irq_set_status_flags(master->irq, IRQ_NOAUTOEN); | 
					
						
							|  |  |  | 	ret = request_irq(master->irq, clk_master_irq_handler, | 
					
						
							|  |  |  | 			  IRQF_TRIGGER_HIGH, "clk-master", master); | 
					
						
							|  |  |  | 	if (ret) | 
					
						
							|  |  |  | 		return ERR_PTR(ret); | 
					
						
							|  |  |  | 
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							|  |  |  | 	clk = clk_register(NULL, &master->hw); | 
					
						
							|  |  |  | 	if (IS_ERR(clk)) | 
					
						
							|  |  |  | 		kfree(master); | 
					
						
							|  |  |  | 
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							|  |  |  | 	return clk; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | 
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							|  |  |  | static const struct clk_master_layout at91rm9200_master_layout = { | 
					
						
							|  |  |  | 	.mask = 0x31F, | 
					
						
							|  |  |  | 	.pres_shift = 2, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | static const struct clk_master_layout at91sam9x5_master_layout = { | 
					
						
							|  |  |  | 	.mask = 0x373, | 
					
						
							|  |  |  | 	.pres_shift = 4, | 
					
						
							|  |  |  | }; | 
					
						
							|  |  |  | 
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							|  |  |  | 
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							|  |  |  | static struct clk_master_characteristics * __init | 
					
						
							|  |  |  | of_at91_clk_master_get_characteristics(struct device_node *np) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct clk_master_characteristics *characteristics; | 
					
						
							|  |  |  | 
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							|  |  |  | 	characteristics = kzalloc(sizeof(*characteristics), GFP_KERNEL); | 
					
						
							|  |  |  | 	if (!characteristics) | 
					
						
							|  |  |  | 		return NULL; | 
					
						
							|  |  |  | 
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							|  |  |  | 	if (of_at91_get_clk_range(np, "atmel,clk-output-range", &characteristics->output)) | 
					
						
							|  |  |  | 		goto out_free_characteristics; | 
					
						
							|  |  |  | 
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							|  |  |  | 	of_property_read_u32_array(np, "atmel,clk-divisors", | 
					
						
							|  |  |  | 				   characteristics->divisors, 4); | 
					
						
							|  |  |  | 
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							|  |  |  | 	characteristics->have_div3_pres = | 
					
						
							|  |  |  | 		of_property_read_bool(np, "atmel,master-clk-have-div3-pres"); | 
					
						
							|  |  |  | 
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							|  |  |  | 	return characteristics; | 
					
						
							|  |  |  | 
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							|  |  |  | out_free_characteristics: | 
					
						
							|  |  |  | 	kfree(characteristics); | 
					
						
							|  |  |  | 	return NULL; | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | static void __init | 
					
						
							|  |  |  | of_at91_clk_master_setup(struct device_node *np, struct at91_pmc *pmc, | 
					
						
							|  |  |  | 			 const struct clk_master_layout *layout) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	struct clk *clk; | 
					
						
							|  |  |  | 	int num_parents; | 
					
						
							|  |  |  | 	int i; | 
					
						
							|  |  |  | 	unsigned int irq; | 
					
						
							|  |  |  | 	const char *parent_names[MASTER_SOURCE_MAX]; | 
					
						
							|  |  |  | 	const char *name = np->name; | 
					
						
							|  |  |  | 	struct clk_master_characteristics *characteristics; | 
					
						
							|  |  |  | 
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							|  |  |  | 	num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells"); | 
					
						
							|  |  |  | 	if (num_parents <= 0 || num_parents > MASTER_SOURCE_MAX) | 
					
						
							|  |  |  | 		return; | 
					
						
							|  |  |  | 
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							|  |  |  | 	for (i = 0; i < num_parents; ++i) { | 
					
						
							|  |  |  | 		parent_names[i] = of_clk_get_parent_name(np, i); | 
					
						
							|  |  |  | 		if (!parent_names[i]) | 
					
						
							|  |  |  | 			return; | 
					
						
							|  |  |  | 	} | 
					
						
							|  |  |  | 
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							|  |  |  | 	of_property_read_string(np, "clock-output-names", &name); | 
					
						
							|  |  |  | 
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							|  |  |  | 	characteristics = of_at91_clk_master_get_characteristics(np); | 
					
						
							|  |  |  | 	if (!characteristics) | 
					
						
							|  |  |  | 		return; | 
					
						
							|  |  |  | 
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							|  |  |  | 	irq = irq_of_parse_and_map(np, 0); | 
					
						
							|  |  |  | 	if (!irq) | 
					
						
							| 
									
										
										
										
											2014-02-11 22:15:07 +09:00
										 |  |  | 		goto out_free_characteristics; | 
					
						
							| 
									
										
										
										
											2013-10-11 10:51:23 +02:00
										 |  |  | 
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							|  |  |  | 	clk = at91_clk_register_master(pmc, irq, name, num_parents, | 
					
						
							|  |  |  | 				       parent_names, layout, | 
					
						
							|  |  |  | 				       characteristics); | 
					
						
							|  |  |  | 	if (IS_ERR(clk)) | 
					
						
							|  |  |  | 		goto out_free_characteristics; | 
					
						
							|  |  |  | 
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							|  |  |  | 	of_clk_add_provider(np, of_clk_src_simple_get, clk); | 
					
						
							|  |  |  | 	return; | 
					
						
							|  |  |  | 
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							|  |  |  | out_free_characteristics: | 
					
						
							|  |  |  | 	kfree(characteristics); | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | void __init of_at91rm9200_clk_master_setup(struct device_node *np, | 
					
						
							|  |  |  | 					   struct at91_pmc *pmc) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	of_at91_clk_master_setup(np, pmc, &at91rm9200_master_layout); | 
					
						
							|  |  |  | } | 
					
						
							|  |  |  | 
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							|  |  |  | void __init of_at91sam9x5_clk_master_setup(struct device_node *np, | 
					
						
							|  |  |  | 					   struct at91_pmc *pmc) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  | 	of_at91_clk_master_setup(np, pmc, &at91sam9x5_master_layout); | 
					
						
							|  |  |  | } |