mirror of
https://gitlab.com/zephray/glider.git
synced 2025-08-01 20:13:40 +00:00
Enable power monitoring
This commit is contained in:
parent
96fceee4c2
commit
1120e9958d
24 changed files with 817 additions and 5754 deletions
2
.gitignore
vendored
2
.gitignore
vendored
|
@ -10,3 +10,5 @@ production/
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fp-info-cache
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fabrication-toolkit-options.json
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*.kicad_sch-bak
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# MCUXpresso files
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Debug/
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|
|
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@ -26,11 +26,11 @@
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|||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.661195920" name="Defaults" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Debug || true || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32H750VBTx || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../Drivers/STM32H7xx_HAL_Driver/Inc | ../Drivers/STM32H7xx_HAL_Driver/Inc/Legacy | ../Drivers/CMSIS/Device/ST/STM32H7xx/Include | ../Drivers/CMSIS/Include | ../Middlewares/ST/filex/common/inc/ | ../Middlewares/ST/filex/ports/generic/inc/ | ../Middlewares/ST/usbx/common/core/inc/ | ../Middlewares/ST/usbx/ports/generic/inc/ | ../Middlewares/ST/usbx/common/usbx_stm32_device_controllers/ | ../Middlewares/ST/usbx/common/usbx_device_classes/inc/ | ../Middlewares/ST/levelx/common/inc/ | ../Middlewares/ST/threadx/common/inc/ | ../Middlewares/ST/threadx/ports/cortex_m7/gnu/inc/ | ../Middlewares/ST/threadx/utility/low_power/ | ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS_V2 | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F || || || USE_PWR_LDO_SUPPLY | USE_HAL_DRIVER | STM32H750xx | USE_FULL_LL_DRIVER || || Drivers | Core/Startup | Middlewares | Core || || || ${workspace_loc:/${ProjName}/STM32H750VBTX_FLASH.ld} || true || NonSecure || || secure_nsclib.o || || None || || || " valueType="string"/>
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<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.1193428585" name="Cpu clock frequence" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" useByScannerDiscovery="false" value="48" valueType="string"/>
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoprintffloat.213716470" name="Use float with printf from newlib-nano (-u _printf_float)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.nanoprintffloat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.convertbinary.1776475681" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.convertbinary" value="true" valueType="boolean"/>
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.convertbinary.1776475681" name="Convert to binary file (-O binary)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.convertbinary" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.851652527" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
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<builder buildPath="${workspace_loc:/glider_ec_rtos}/Debug" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.1203074036" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
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<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1274958836" name="MCU/MPU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1793326124" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g3" valueType="enumerated"/>
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<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.1793326124" name="Debug level" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.debuglevel.value.g1" valueType="enumerated"/>
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<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.definedsymbols.1840179548" name="Define symbols (-D)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.option.definedsymbols" valueType="definedSymbols">
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<listOptionValue builtIn="false" value="DEBUG"/>
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</option>
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File diff suppressed because one or more lines are too long
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@ -61,8 +61,6 @@ extern "C" {
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/* USER CODE END EM */
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void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
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/* Exported functions prototypes ---------------------------------------------*/
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void Error_Handler(void);
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@ -53,6 +53,7 @@ void BusFault_Handler(void);
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void UsageFault_Handler(void);
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void DebugMon_Handler(void);
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void DMA1_Stream0_IRQHandler(void);
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void DMA1_Stream1_IRQHandler(void);
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void TIM2_IRQHandler(void);
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void SPI2_IRQHandler(void);
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void EXTI15_10_IRQHandler(void);
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@ -42,6 +42,7 @@
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/* Private variables ---------------------------------------------------------*/
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ADC_HandleTypeDef hadc1;
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DMA_HandleTypeDef hdma_adc1;
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DAC_HandleTypeDef hdac1;
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@ -51,8 +52,6 @@ MDMA_HandleTypeDef hmdma_quadspi_fifo_th;
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SPI_HandleTypeDef hspi2;
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DMA_HandleTypeDef hdma_spi2_tx;
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TIM_HandleTypeDef htim1;
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PCD_HandleTypeDef hpcd_USB_OTG_FS;
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SRAM_HandleTypeDef hsram1;
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@ -80,7 +79,6 @@ static void MX_FMC_Init(void);
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static void MX_I2C1_Init(void);
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static void MX_QUADSPI_Init(void);
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static void MX_SPI2_Init(void);
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static void MX_TIM1_Init(void);
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static void MX_USB_OTG_FS_PCD_Init(void);
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void StartDefaultTask(void *argument);
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@ -133,7 +131,6 @@ int main(void)
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MX_I2C1_Init();
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MX_QUADSPI_Init();
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MX_SPI2_Init();
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MX_TIM1_Init();
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MX_USB_OTG_FS_PCD_Init();
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/* USER CODE BEGIN 2 */
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NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
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@ -288,15 +285,15 @@ static void MX_ADC1_Init(void)
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hadc1.Instance = ADC1;
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hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2;
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hadc1.Init.Resolution = ADC_RESOLUTION_16B;
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hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
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hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
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hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
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hadc1.Init.LowPowerAutoWait = DISABLE;
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hadc1.Init.ContinuousConvMode = DISABLE;
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hadc1.Init.NbrOfConversion = 1;
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hadc1.Init.NbrOfConversion = 6;
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hadc1.Init.DiscontinuousConvMode = DISABLE;
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hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
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hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
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hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
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hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DMA_ONESHOT;
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hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
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hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
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hadc1.Init.OversamplingMode = DISABLE;
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@ -316,9 +313,9 @@ static void MX_ADC1_Init(void)
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/** Configure Regular Channel
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*/
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sConfig.Channel = ADC_CHANNEL_7;
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sConfig.Channel = ADC_CHANNEL_3;
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sConfig.Rank = ADC_REGULAR_RANK_1;
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sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
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sConfig.SamplingTime = ADC_SAMPLETIME_8CYCLES_5;
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sConfig.SingleDiff = ADC_SINGLE_ENDED;
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sConfig.OffsetNumber = ADC_OFFSET_NONE;
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sConfig.Offset = 0;
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@ -327,6 +324,51 @@ static void MX_ADC1_Init(void)
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{
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Error_Handler();
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}
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/** Configure Regular Channel
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*/
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sConfig.Channel = ADC_CHANNEL_4;
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sConfig.Rank = ADC_REGULAR_RANK_2;
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if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Regular Channel
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*/
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sConfig.Channel = ADC_CHANNEL_5;
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sConfig.Rank = ADC_REGULAR_RANK_3;
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if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Regular Channel
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*/
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sConfig.Channel = ADC_CHANNEL_7;
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sConfig.Rank = ADC_REGULAR_RANK_4;
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if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Regular Channel
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*/
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sConfig.Channel = ADC_CHANNEL_8;
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sConfig.Rank = ADC_REGULAR_RANK_5;
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if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Regular Channel
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*/
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sConfig.Channel = ADC_CHANNEL_9;
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sConfig.Rank = ADC_REGULAR_RANK_6;
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if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN ADC1_Init 2 */
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/* USER CODE END ADC1_Init 2 */
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@ -533,91 +575,6 @@ static void MX_SPI2_Init(void)
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}
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/**
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* @brief TIM1 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_TIM1_Init(void)
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{
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/* USER CODE BEGIN TIM1_Init 0 */
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/* USER CODE END TIM1_Init 0 */
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TIM_ClockConfigTypeDef sClockSourceConfig = {0};
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TIM_MasterConfigTypeDef sMasterConfig = {0};
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TIM_OC_InitTypeDef sConfigOC = {0};
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TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
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/* USER CODE BEGIN TIM1_Init 1 */
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/* USER CODE END TIM1_Init 1 */
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htim1.Instance = TIM1;
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htim1.Init.Prescaler = 16;
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htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
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htim1.Init.Period = 255;
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htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
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htim1.Init.RepetitionCounter = 0;
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htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
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if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
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{
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Error_Handler();
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}
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sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
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if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
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{
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Error_Handler();
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}
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sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
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sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
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sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
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if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
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{
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Error_Handler();
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}
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sConfigOC.OCMode = TIM_OCMODE_PWM1;
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sConfigOC.Pulse = 127;
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sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
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sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
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sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
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sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
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sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
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if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
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{
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Error_Handler();
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}
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sConfigOC.Pulse = 0;
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if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
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{
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Error_Handler();
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}
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sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
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sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
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sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
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sBreakDeadTimeConfig.DeadTime = 0;
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sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
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sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
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sBreakDeadTimeConfig.BreakFilter = 0;
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sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
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sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
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sBreakDeadTimeConfig.Break2Filter = 0;
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sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
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if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN TIM1_Init 2 */
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/* USER CODE END TIM1_Init 2 */
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HAL_TIM_MspPostInit(&htim1);
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}
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/**
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* @brief USB_OTG_FS Initialization Function
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* @param None
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@ -667,6 +624,9 @@ static void MX_DMA_Init(void)
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/* DMA1_Stream0_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
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/* DMA1_Stream1_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
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}
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@ -779,6 +739,12 @@ static void MX_GPIO_Init(void)
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/*Configure GPIO pin Output Level */
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HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_6, GPIO_PIN_RESET);
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/*Configure GPIO pins : PE3 PE4 */
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GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_PULLDOWN;
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HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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/*Configure GPIO pins : PA2 PA3 PA10 */
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GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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@ -23,6 +23,8 @@
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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extern DMA_HandleTypeDef hdma_adc1;
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extern MDMA_HandleTypeDef hmdma_quadspi_fifo_th;
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extern DMA_HandleTypeDef hdma_spi2_tx;
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|
@ -60,9 +62,7 @@ extern DMA_HandleTypeDef hdma_spi2_tx;
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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|
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void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
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/**
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||||
/**
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||||
* Initializes the Global MSP.
|
||||
*/
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||||
void HAL_MspInit(void)
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|
@ -145,6 +145,25 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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||||
|
||||
/* ADC1 DMA Init */
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||||
/* ADC1 Init */
|
||||
hdma_adc1.Instance = DMA1_Stream1;
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||||
hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
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hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
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||||
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
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||||
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
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||||
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
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||||
hdma_adc1.Init.Mode = DMA_NORMAL;
|
||||
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
|
||||
hdma_adc1.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
|
||||
|
||||
/* USER CODE BEGIN ADC1_MspInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspInit 1 */
|
||||
|
@ -183,6 +202,8 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
|
|||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
|
||||
|
||||
/* ADC1 DMA DeInit */
|
||||
HAL_DMA_DeInit(hadc->DMA_Handle);
|
||||
/* USER CODE BEGIN ADC1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END ADC1_MspDeInit 1 */
|
||||
|
@ -532,78 +553,6 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief TIM_Base MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(htim->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
/**TIM1 GPIO Configuration
|
||||
PE13 ------> TIM1_CH3
|
||||
PE14 ------> TIM1_CH4
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
/**
|
||||
* @brief TIM_Base MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param htim_base: TIM_Base handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
|
||||
{
|
||||
if(htim_base->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief PCD MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
|
|
|
@ -56,6 +56,7 @@
|
|||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern DMA_HandleTypeDef hdma_adc1;
|
||||
extern MDMA_HandleTypeDef hmdma_quadspi_fifo_th;
|
||||
extern QSPI_HandleTypeDef hqspi;
|
||||
extern DMA_HandleTypeDef hdma_spi2_tx;
|
||||
|
@ -179,6 +180,20 @@ void DMA1_Stream0_IRQHandler(void)
|
|||
/* USER CODE END DMA1_Stream0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles DMA1 stream1 global interrupt.
|
||||
*/
|
||||
void DMA1_Stream1_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
|
||||
|
||||
/* USER CODE END DMA1_Stream1_IRQn 0 */
|
||||
HAL_DMA_IRQHandler(&hdma_adc1);
|
||||
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
|
||||
|
||||
/* USER CODE END DMA1_Stream1_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM2 global interrupt.
|
||||
*/
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -46,18 +46,18 @@ static const uint8_t adv7611_init_1[] = {
|
|||
ADV7611_I2C_ADDR, 0x01, 0x06, // Prim_mode = 110b HDMI-GR
|
||||
ADV7611_I2C_ADDR, 0x00, 0x16, // VID-STD: UXGA (for default clock)
|
||||
ADV7611_I2C_ADDR, 0x02, 0xf2, // F8 = YUV, F2 = RGB
|
||||
ADV7611_I2C_ADDR, 0x03, 0x40, // 40 = 24bit 444 SDR
|
||||
ADV7611_I2C_ADDR, 0x04, 0x46, // P[23:16] V/R, P[15:8] Y/G, P[7:0] U/CrCb/B CLK=24MHz
|
||||
ADV7611_I2C_ADDR, 0x03, 0x60, // 40 = 24bit 444 DDR
|
||||
ADV7611_I2C_ADDR, 0x04, 0x66, // P[23:16] V/R, P[15:8] Y/G, P[7:0] U/CrCb/B CLK=24MHz
|
||||
ADV7611_I2C_ADDR, 0x05, 0x28, // Do not insert AV codes
|
||||
ADV7611_I2C_ADDR, 0x06, 0xa6, // VS OUT SEL, F/VS/HS/LLC POL
|
||||
ADV7611_I2C_ADDR, 0x0b, 0x44,
|
||||
ADV7611_I2C_ADDR, 0x0C, 0x42,
|
||||
ADV7611_I2C_ADDR, 0x0c, 0x42,
|
||||
ADV7611_I2C_ADDR, 0x15, 0x80,
|
||||
ADV7611_I2C_ADDR, 0x19, 0x8a, // Enable LLC DLL
|
||||
ADV7611_I2C_ADDR, 0x19, 0x94, // Enable LLC DLL
|
||||
ADV7611_I2C_ADDR, 0x33, 0x40,
|
||||
ADV7611_I2C_ADDR, 0x14, 0x7f,
|
||||
ADV7611_I2C_ADDR, 0x14, 0x37, // 37
|
||||
CP_I2C_ADDR, 0xba, 0x00, // Disable free run
|
||||
//HDMI_I2C_ADDR, 0xbf, 0x01, // Bypass CP
|
||||
HDMI_I2C_ADDR, 0xbf, 0x01, // Bypass CP
|
||||
CP_I2C_ADDR, 0x6c, 0x00, // ADI required setting
|
||||
KSV_I2C_ADDR, 0x40, 0x81, // DSP_Ctrl4 :00/01 : YUV or RGB; 10 : RAW8; 11 : RAW10
|
||||
HDMI_I2C_ADDR, 0x9b, 0x03, // ADI required setting
|
||||
|
@ -84,7 +84,7 @@ static const uint8_t adv7611_init_1[] = {
|
|||
HDMI_I2C_ADDR, 0x57, 0xda, // ADI required setting
|
||||
HDMI_I2C_ADDR, 0x58, 0x01, // ADI required setting
|
||||
HDMI_I2C_ADDR, 0x03, 0x98, // Set DIS_I2C_ZERO_COMPR 0x03[7]=1
|
||||
HDMI_I2C_ADDR, 0x4c, 0x44, // Set NEW_VS_PARAM 0x44[2]=1
|
||||
HDMI_I2C_ADDR, 0x4c, 0x40, // Set NEW_VS_PARAM 0x44[2]=0
|
||||
HDMI_I2C_ADDR, 0x75, 0x10,
|
||||
};
|
||||
|
||||
|
@ -131,7 +131,7 @@ uint8_t adv7611_read_reg(uint8_t addr, uint8_t reg) {
|
|||
return val;
|
||||
}
|
||||
|
||||
void adv7611_early_init() {
|
||||
void adv7611_early_init(void) {
|
||||
// Initialize IO, reset ADV7611 and allocate I2C addresses
|
||||
// So it won't conflict with other ICs
|
||||
gpio_put(DEC_RST, 1);
|
||||
|
@ -141,7 +141,7 @@ void adv7611_early_init() {
|
|||
gpio_put(DEC_RST, 1);
|
||||
}
|
||||
|
||||
void adv7611_init() {
|
||||
void adv7611_init(void) {
|
||||
adv7611_send_init_seq(adv7611_init_0, sizeof(adv7611_init_0) / 3);
|
||||
adv7611_send_init_seq(adv7611_init_1, sizeof(adv7611_init_1) / 3);
|
||||
|
||||
|
@ -152,3 +152,11 @@ void adv7611_init() {
|
|||
|
||||
syslog_printf("ADV7611 initialization done\n");
|
||||
}
|
||||
|
||||
void adv7611_powerdown(void) {
|
||||
uint8_t buf[2];
|
||||
buf[0] = 0x0c;
|
||||
buf[1] = 0x62; // Power down
|
||||
int result;
|
||||
result = pal_i2c_write_payload(ADV7611_I2C, ADV7611_I2C_ADDR, buf, 2);
|
||||
}
|
||||
|
|
|
@ -25,3 +25,4 @@
|
|||
void adv7611_early_init(void);
|
||||
void adv7611_init(void);
|
||||
uint8_t adv7611_read_reg(uint8_t addr, uint8_t reg);
|
||||
void adv7611_powerdown(void);
|
||||
|
|
|
@ -81,10 +81,8 @@ static portTASK_FUNCTION(startup_task, pvParameters) {
|
|||
edid_init();
|
||||
adv7611_early_init(); // Must be before PTN3460 to release RST and I2C bus
|
||||
ptn3460_early_init(); // Let PTN3460 starts internal bootup process
|
||||
fpga_init();
|
||||
adv7611_init();
|
||||
ptn3460_init();
|
||||
caster_init(); // must be after adv7611 as it's the clock source for CSR interface
|
||||
power_set_vcom(config.vcom); // Move out from here
|
||||
power_set_vgh(config.vgh);
|
||||
ui_init();
|
||||
|
@ -101,7 +99,7 @@ static portTASK_FUNCTION(startup_task, pvParameters) {
|
|||
NULL, UI_TASK_PRIORITY, &ui_task_handle);
|
||||
xTaskCreate(key_scan_task, "KeyScanTask", KEY_SCAN_TASK_STACK_SIZE,
|
||||
NULL, KEY_SCAN_TASK_PRIORITY, &key_scan_task_handle);
|
||||
xTaskCreate(power_monitor_task, "PowerMonitorTask", POWER_MON_TASK_STACK_SIZE,
|
||||
xTaskCreate(power_monitor_task, "PowerMonTask", POWER_MON_TASK_STACK_SIZE,
|
||||
NULL, POWER_MON_TASK_PRIORITY, &power_mon_task_handle);
|
||||
|
||||
vTaskPrioritySet(NULL, STARTUP_TASK_LOW_PRIORITY);
|
||||
|
|
|
@ -70,6 +70,7 @@
|
|||
#define FUSB302_I2C_ADDR (0x22)
|
||||
#define INA3221_0_I2C_ADDR (0x40)
|
||||
#define INA3221_1_I2C_ADDR (0x41)
|
||||
#define INA3221_2_I2C_ADDR (0x42)
|
||||
|
||||
// ADV7611 Sub addresses, make sure they don't conflict with anything else!
|
||||
#define CEC_I2C_ADDR (0x3F) // Default 0x40(0x80)
|
||||
|
|
126
fw/User/config.c
126
fw/User/config.c
|
@ -28,29 +28,123 @@ config_t config;
|
|||
|
||||
void config_init(void) {
|
||||
// Set default values
|
||||
config.pclk_hz = 162000000;
|
||||
config.hact = 1600;
|
||||
config.vact = 1200;
|
||||
config.hblk = 560;
|
||||
config.hfp = 64;
|
||||
config.hsync = 192;
|
||||
config.vblk = 50;
|
||||
config.vfp = 1;
|
||||
config.vsync = 3;
|
||||
config.size_x_mm = 270;
|
||||
config.size_y_mm = 203;
|
||||
config.mfg_week = 1;
|
||||
config.mfg_year = 0x20;
|
||||
config.tcon_vfp = 45;
|
||||
|
||||
// 1600x1200 @ 60
|
||||
// config.pclk_hz = 162000000;
|
||||
// config.hact = 1600;
|
||||
// config.vact = 1200;
|
||||
// config.hblk = 560;
|
||||
// config.hfp = 64;
|
||||
// config.hsync = 192;
|
||||
// config.vblk = 50;
|
||||
// config.vfp = 1;
|
||||
// config.vsync = 3;
|
||||
// config.tcon_vfp = 45;
|
||||
// config.tcon_vsync = 1;
|
||||
// config.tcon_vbp = 2;
|
||||
// config.tcon_vact = 1200;
|
||||
// config.tcon_hfp = 120;
|
||||
// config.tcon_hsync = 10;
|
||||
// config.tcon_hbp = 10;
|
||||
// config.tcon_hact = 400;
|
||||
|
||||
// 1600x1200 @ 75
|
||||
config.pclk_hz = 156618000;
|
||||
config.hact = 1600;
|
||||
config.vact = 1200;
|
||||
config.hblk = 80;
|
||||
config.hfp = 8;
|
||||
config.hsync = 32;
|
||||
config.vblk = 43;
|
||||
config.vfp = 29;
|
||||
config.vsync = 8;
|
||||
|
||||
config.tcon_vfp = 11;
|
||||
config.tcon_vsync = 1;
|
||||
config.tcon_vbp = 2;
|
||||
config.tcon_vact = 1200;
|
||||
config.tcon_hfp = 120;
|
||||
config.tcon_hsync = 10;
|
||||
config.tcon_hbp = 10;
|
||||
// HFP + HSYNC + HBP = Incoming HBLK / 4
|
||||
config.tcon_hfp = 16;
|
||||
config.tcon_hsync = 2;
|
||||
config.tcon_hbp = 2;
|
||||
config.tcon_hact = 400;
|
||||
config.vcom = -2.45f;
|
||||
config.vgh = 22.0f;
|
||||
|
||||
|
||||
// 1448x1072 @ 75
|
||||
// config.pclk_hz = 127320000;
|
||||
// config.hact = 1448;
|
||||
// config.vact = 1072;
|
||||
// config.hblk = 80;
|
||||
// config.hfp = 8;
|
||||
// config.hsync = 32;
|
||||
// config.vblk = 39;
|
||||
// config.vfp = 25;
|
||||
// config.vsync = 8;
|
||||
//
|
||||
// config.tcon_vfp = 11;
|
||||
// config.tcon_vsync = 1;
|
||||
// config.tcon_vbp = 2;
|
||||
// config.tcon_vact = 1072;
|
||||
// // HFP + HSYNC + HBP = Incoming HBLK / 4
|
||||
// config.tcon_hfp = 17;
|
||||
// config.tcon_hsync = 2;
|
||||
// config.tcon_hbp = 1;
|
||||
// config.tcon_hact = 362;
|
||||
|
||||
// config.pclk_hz = 72509000;
|
||||
// config.hact = 1040;
|
||||
// config.vact = 1040;
|
||||
// config.hblk = 80;
|
||||
// config.hfp = 8;
|
||||
// config.hsync = 32;
|
||||
// config.vblk = 39;
|
||||
// config.vfp = 25;
|
||||
// config.vsync = 8;
|
||||
//
|
||||
// config.tcon_vfp = 11;
|
||||
// config.tcon_vsync = 1;
|
||||
// config.tcon_vbp = 2;
|
||||
// config.tcon_vact = 1040;
|
||||
// // HFP + HSYNC + HBP = Incoming HBLK / 4
|
||||
// config.tcon_hfp = 17;
|
||||
// config.tcon_hsync = 2;
|
||||
// config.tcon_hbp = 1;
|
||||
// config.tcon_hact = 260;
|
||||
//
|
||||
// config.vcom = -2.45f;
|
||||
// config.vgh = 22.0f;
|
||||
//
|
||||
// config.mirror = 0;
|
||||
|
||||
// 2232x1680 @ 40
|
||||
// config.pclk_hz = 158873000;
|
||||
// config.hact = 2240;
|
||||
// config.vact = 1680;
|
||||
// config.hblk = 80;
|
||||
// config.hfp = 8;
|
||||
// config.hsync = 32;
|
||||
// config.vblk = 32;
|
||||
// config.vfp = 18;
|
||||
// config.vsync = 8;
|
||||
//
|
||||
// config.tcon_vfp = 12;
|
||||
// config.tcon_vsync = 1;
|
||||
// config.tcon_vbp = 1;
|
||||
// config.tcon_vact = 1680;
|
||||
// // HFP + HSYNC + HBP = Incoming HBLK / 4
|
||||
// config.tcon_hfp = 16;
|
||||
// config.tcon_hsync = 2;
|
||||
// config.tcon_hbp = 2;
|
||||
// config.tcon_hact = 560;
|
||||
//
|
||||
// config.vcom = -0.8f;
|
||||
// config.vgh = 22.0f;
|
||||
//
|
||||
// config.mirror = 1;
|
||||
}
|
||||
|
||||
void config_load(void) {
|
||||
|
@ -78,4 +172,4 @@ void config_save(void) {
|
|||
return;
|
||||
|
||||
SPIFFS_write(&spiffs_fs, f, &config, sizeof(config));
|
||||
}
|
||||
}
|
||||
|
|
|
@ -47,6 +47,7 @@ typedef struct {
|
|||
uint8_t tcon_hsync;
|
||||
uint8_t tcon_hbp;
|
||||
uint16_t tcon_hact;
|
||||
uint8_t mirror;
|
||||
} config_t;
|
||||
|
||||
extern config_t config;
|
||||
|
|
|
@ -139,19 +139,23 @@ static void fpga_wait_done(bool timeout) {
|
|||
}
|
||||
}
|
||||
|
||||
void fpga_init(void) {
|
||||
// Initialize FPGA pins
|
||||
gpio_put(FPGA_CS, 1);
|
||||
|
||||
void fpga_reset(void) {
|
||||
// FPGA Reset
|
||||
gpio_put(FPGA_PROG, 0);
|
||||
sleep_ms(2);
|
||||
gpio_put(FPGA_PROG, 1);
|
||||
sleep_ms(10);
|
||||
}
|
||||
|
||||
void fpga_init(const char *fn) {
|
||||
// Initialize FPGA pins
|
||||
gpio_put(FPGA_CS, 1);
|
||||
|
||||
fpga_reset();
|
||||
|
||||
// Load bitstream
|
||||
#if 1
|
||||
fpga_load_bitstream("fpga.bit");
|
||||
fpga_load_bitstream(fn);
|
||||
fpga_wait_done(true);
|
||||
#else
|
||||
//fpga_wait_done(false);
|
||||
|
|
|
@ -22,9 +22,10 @@
|
|||
//
|
||||
#pragma once
|
||||
|
||||
void fpga_init(void);
|
||||
void fpga_init(const char *fn);
|
||||
void fpga_reset(void);
|
||||
void fpga_suspend(void);
|
||||
void fpga_resume(void);
|
||||
uint8_t fpga_write_reg8(uint8_t addr, uint8_t val);
|
||||
void fpga_write_reg16(uint8_t addr, uint16_t val);
|
||||
void fpga_write_bulk(uint8_t addr, uint8_t *buf, int length);
|
||||
void fpga_write_bulk(uint8_t addr, uint8_t *buf, int length);
|
||||
|
|
129
fw/User/power.c
129
fw/User/power.c
|
@ -24,6 +24,15 @@
|
|||
#include "board.h"
|
||||
#include "app.h"
|
||||
|
||||
static bool adc_conv_done;
|
||||
static uint16_t adc_buffer[6];
|
||||
|
||||
static float voltages[14];
|
||||
static float currents[8];
|
||||
static float p_cur[8];
|
||||
static float p_avg[8];
|
||||
static float p_max[8];
|
||||
|
||||
void power_on(void) {
|
||||
|
||||
}
|
||||
|
@ -89,20 +98,132 @@ void power_set_vgh(float vgh) {
|
|||
}
|
||||
|
||||
void power_on_fl(void) {
|
||||
HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3);
|
||||
//HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3);
|
||||
}
|
||||
|
||||
void power_off_fl(void) {
|
||||
HAL_TIM_PWM_Stop(&htim1, TIM_CHANNEL_3);
|
||||
//HAL_TIM_PWM_Stop(&htim1, TIM_CHANNEL_3);
|
||||
}
|
||||
|
||||
void power_set_fl_brightness(uint8_t val) {
|
||||
TIM1->CCR3 = 255 - val;
|
||||
//TIM1->CCR3 = 255 - val;
|
||||
}
|
||||
|
||||
static void ina_write(uint8_t addr, uint8_t reg, uint16_t val) {
|
||||
uint8_t buf[2] = {val & 0xff, val >> 8};
|
||||
int result = pal_i2c_write_longreg(INA3221_I2C, addr, reg, buf, 2);
|
||||
if (result != 0) {
|
||||
syslog_printf("Failed writing data to INA3221\n");
|
||||
}
|
||||
}
|
||||
|
||||
static uint16_t ina_read(uint8_t addr, uint8_t reg) {
|
||||
uint8_t buf[2];
|
||||
int result = pal_i2c_read_payload(INA3221_I2C, addr, ®, 1, buf, 2);
|
||||
if (result != 0) {
|
||||
syslog_printf("Failed reading data from INA3221\n");
|
||||
}
|
||||
return ((uint16_t)buf[0] << 8) | buf[1];
|
||||
}
|
||||
|
||||
static void power_ina_init(uint8_t addr) {
|
||||
syslog_printf("INA %02x: Mfg ID = %04x, Die ID = %04x\n", addr, ina_read(addr, 0xfe), ina_read(addr, 0xff));
|
||||
}
|
||||
|
||||
float power_get_rail_voltage(power_rail_t rail) {
|
||||
return voltages[(int)rail];
|
||||
}
|
||||
|
||||
float power_get_rail_current(power_rail_t rail) {
|
||||
int ch = (int)rail;
|
||||
if (ch > 8)
|
||||
return 0.0f;
|
||||
return currents[ch];
|
||||
}
|
||||
|
||||
void power_get_rail_power(power_rail_t rail, float *cur, float *avg, float *max) {
|
||||
*cur = p_cur[(int)rail];
|
||||
*avg = p_avg[(int)rail];
|
||||
*max = p_max[(int)rail];
|
||||
}
|
||||
|
||||
// No internal reference, ref_voltage is the full level (65535) voltage / VDDA voltage
|
||||
static float convert_positive_adc_voltage(uint16_t sample, float ref_voltage) {
|
||||
return (float)sample / 65535.0f * ref_voltage * 11.0f;
|
||||
}
|
||||
|
||||
static float convert_negative_adc_voltage(uint16_t sample, float ref_voltage) {
|
||||
return convert_positive_adc_voltage(sample, ref_voltage) - ref_voltage * 10.f;
|
||||
}
|
||||
|
||||
static float convert_bus_voltage(uint16_t sample) {
|
||||
return (float)(*(int16_t *)&sample) / 1000.f;
|
||||
}
|
||||
|
||||
static float convert_shunt_current(uint16_t sample) {
|
||||
float shunt_mv = (float)(*(int16_t *)&sample) / 200.f;
|
||||
float shunt_ma = shunt_mv / 0.02f;
|
||||
return shunt_ma;
|
||||
}
|
||||
|
||||
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc) {
|
||||
adc_conv_done = true;
|
||||
HAL_ADC_Stop_DMA(hadc);
|
||||
}
|
||||
|
||||
portTASK_FUNCTION(power_monitor_task, pvParameters) {
|
||||
power_on_epd();
|
||||
HAL_StatusTypeDef result = HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET_LINEARITY, ADC_SINGLE_ENDED);
|
||||
if (result != HAL_OK) {
|
||||
syslog_printf("ADC failed to calibrate\n");
|
||||
}
|
||||
power_ina_init(INA3221_0_I2C_ADDR);
|
||||
power_ina_init(INA3221_1_I2C_ADDR);
|
||||
power_ina_init(INA3221_2_I2C_ADDR);
|
||||
adc_conv_done = true;
|
||||
const uint8_t ina_shunt_regs[] = {
|
||||
// I2C ADDR, REG NUM
|
||||
INA3221_0_I2C_ADDR, 0x01,
|
||||
INA3221_0_I2C_ADDR, 0x03,
|
||||
INA3221_0_I2C_ADDR, 0x05,
|
||||
INA3221_1_I2C_ADDR, 0x01,
|
||||
INA3221_1_I2C_ADDR, 0x03,
|
||||
INA3221_1_I2C_ADDR, 0x05,
|
||||
INA3221_2_I2C_ADDR, 0x01,
|
||||
INA3221_2_I2C_ADDR, 0x03,
|
||||
};
|
||||
const uint8_t ina_bus_regs[] = {
|
||||
// I2C ADDR, REG NUM
|
||||
INA3221_0_I2C_ADDR, 0x02,
|
||||
INA3221_0_I2C_ADDR, 0x04,
|
||||
INA3221_0_I2C_ADDR, 0x06,
|
||||
INA3221_1_I2C_ADDR, 0x02,
|
||||
INA3221_1_I2C_ADDR, 0x04,
|
||||
INA3221_1_I2C_ADDR, 0x06,
|
||||
INA3221_2_I2C_ADDR, 0x02,
|
||||
INA3221_2_I2C_ADDR, 0x04,
|
||||
};
|
||||
while (1) {
|
||||
for (int i = 0; i < 8; i++) {
|
||||
currents[i] = convert_shunt_current(ina_read(ina_shunt_regs[i * 2], ina_shunt_regs[i * 2 + 1]));
|
||||
voltages[i] = convert_bus_voltage(ina_read(ina_bus_regs[i * 2], ina_bus_regs[i * 2 + 1]));
|
||||
}
|
||||
if (adc_conv_done == true) {
|
||||
// Update numbers
|
||||
for (int i = 0; i < 3; i++) {
|
||||
voltages[8 + i] = convert_positive_adc_voltage(adc_buffer[i], voltages[RAIL_3V3]);
|
||||
}
|
||||
for (int i = 3; i < 6; i++) {
|
||||
voltages[8 + i] = convert_negative_adc_voltage(adc_buffer[i], voltages[RAIL_3V3]);
|
||||
}
|
||||
adc_conv_done = false;
|
||||
HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_buffer, 6);
|
||||
}
|
||||
// Update values
|
||||
for (int i = 0; i < 8; i++) {
|
||||
p_cur[i] = voltages[i] * currents[i];
|
||||
p_avg[i] = p_avg[i] * 0.9f + p_cur[i] * 0.1f;
|
||||
if (p_cur[i] > p_max[i]) p_max[i] = p_cur[i];
|
||||
}
|
||||
vTaskDelay(pdMS_TO_TICKS(100)); // Nothing for now
|
||||
}
|
||||
}
|
||||
|
|
|
@ -22,6 +22,25 @@
|
|||
//
|
||||
#pragma once
|
||||
|
||||
typedef enum {
|
||||
// Rails with both voltage and current monitoring
|
||||
RAIL_5VES,
|
||||
RAIL_5VEG,
|
||||
RAIL_3V3,
|
||||
RAIL_1V8VID,
|
||||
RAIL_3V3VID,
|
||||
RAIL_5V2FL,
|
||||
RAIL_1V35,
|
||||
RAIL_1V2,
|
||||
// Rails with only voltage monitoring
|
||||
RAIL_VP,
|
||||
RAIL_VGH,
|
||||
RAIL_VBUS,
|
||||
RAIL_VCOM,
|
||||
RAIL_VN,
|
||||
RAIL_VGL,
|
||||
} power_rail_t;
|
||||
|
||||
void power_off(void);
|
||||
void power_on(void);
|
||||
void power_on_epd(void);
|
||||
|
@ -31,4 +50,7 @@ void power_set_vgh(float vgh);
|
|||
void power_on_fl(void);
|
||||
void power_off_fl(void);
|
||||
void power_set_fl_brightness(uint8_t val);
|
||||
float power_get_rail_voltage(power_rail_t rail);
|
||||
float power_get_rail_current(power_rail_t rail);
|
||||
void power_get_rail_power(power_rail_t rail, float *cur, float *avg, float *max);
|
||||
portTASK_FUNCTION(power_monitor_task, pvParameters);
|
||||
|
|
|
@ -82,3 +82,7 @@ void ptn3460_set_aux_polarity(int reverse) {
|
|||
else
|
||||
ptn3460_write(0x80, 0x00); // Disable AUX reverse
|
||||
}
|
||||
|
||||
void ptn3460_powerdown(void) {
|
||||
gpio_put(DP_PDN, 0);
|
||||
}
|
||||
|
|
|
@ -67,30 +67,32 @@ typedef struct
|
|||
SHELL_FUNC( shell_help );
|
||||
SHELL_FUNC( shell_ver );
|
||||
SHELL_FUNC( shell_syslog );
|
||||
SHELL_FUNC( shell_stacks );
|
||||
SHELL_FUNC( shell_test );
|
||||
SHELL_FUNC( shell_i2c_probe );
|
||||
SHELL_FUNC( shell_fl );
|
||||
SHELL_FUNC( shell_recv );
|
||||
SHELL_FUNC( shell_send );
|
||||
SHELL_FUNC( shell_df );
|
||||
SHELL_FUNC( shell_dump );
|
||||
SHELL_FUNC( shell_fdump );
|
||||
SHELL_FUNC( shell_format );
|
||||
SHELL_FUNC( shell_rm );
|
||||
SHELL_FUNC( shell_setvolt );
|
||||
SHELL_FUNC( shell_setcfg );
|
||||
SHELL_FUNC( shell_sensor );
|
||||
|
||||
SHELL_HELP( help );
|
||||
SHELL_HELP( ver );
|
||||
SHELL_HELP( syslog );
|
||||
SHELL_HELP( stacks );
|
||||
SHELL_HELP( test );
|
||||
SHELL_HELP( i2c_probe );
|
||||
SHELL_HELP( fl );
|
||||
SHELL_HELP( recv );
|
||||
SHELL_HELP( send );
|
||||
SHELL_HELP( df );
|
||||
SHELL_HELP( dump );
|
||||
SHELL_HELP( fdump );
|
||||
SHELL_HELP( format );
|
||||
SHELL_HELP( rm );
|
||||
SHELL_HELP( setvolt );
|
||||
SHELL_HELP( setcfg );
|
||||
SHELL_HELP( sensor );
|
||||
|
||||
//static const SHELL_COMMAND shell_commands[] =
|
||||
const SHELL_COMMAND shell_commands[] =
|
||||
|
@ -98,16 +100,17 @@ const SHELL_COMMAND shell_commands[] =
|
|||
{ "help", shell_help },
|
||||
{ "ver", shell_ver },
|
||||
{ "syslog", shell_syslog },
|
||||
{ "stacks", shell_stacks },
|
||||
{ "test", shell_test },
|
||||
{ "i2c_probe", shell_i2c_probe },
|
||||
{ "fl", shell_fl },
|
||||
{ "recv", shell_recv },
|
||||
{ "send", shell_send },
|
||||
{ "df", shell_df },
|
||||
{ "dump", shell_dump },
|
||||
{ "fdump", shell_fdump },
|
||||
{ "format", shell_format },
|
||||
{ "rm", shell_rm },
|
||||
{ "setvolt", shell_setvolt },
|
||||
{ "setcfg", shell_setcfg },
|
||||
{ "sensor", shell_sensor },
|
||||
{ "exit", NULL },
|
||||
{ NULL, NULL }
|
||||
};
|
||||
|
@ -117,16 +120,17 @@ static const SHELL_HELP_DATA shell_help_data[] =
|
|||
SHELL_INFO( help ),
|
||||
SHELL_INFO( ver ),
|
||||
SHELL_INFO( syslog ),
|
||||
SHELL_INFO( stacks ),
|
||||
SHELL_INFO( test ),
|
||||
SHELL_INFO( i2c_probe ),
|
||||
SHELL_INFO( fl ),
|
||||
SHELL_INFO( recv ),
|
||||
SHELL_INFO( send ),
|
||||
SHELL_INFO( df ),
|
||||
SHELL_INFO( dump ),
|
||||
SHELL_INFO( fdump ),
|
||||
SHELL_INFO( format ),
|
||||
SHELL_INFO( rm ),
|
||||
SHELL_INFO( setvolt ),
|
||||
SHELL_INFO( setcfg ),
|
||||
SHELL_INFO( sensor ),
|
||||
{ NULL, NULL, NULL }
|
||||
};
|
||||
|
||||
|
|
|
@ -146,56 +146,62 @@ const char shell_help_summary_test[] = "Test command";
|
|||
|
||||
void shell_test(shell_context_t *ctx, int argc, char **argv ) {
|
||||
|
||||
uint8_t val;
|
||||
// uint8_t val = atoi(argv[1]);
|
||||
// uint8_t buf[2];
|
||||
// buf[0] = 0x19;
|
||||
// buf[1] = val | 0x80;
|
||||
// pal_i2c_write_payload(ADV7611_I2C, ADV7611_I2C_ADDR, buf, 2);
|
||||
|
||||
val = adv7611_read_reg(ADV7611_I2C_ADDR, 0x6a);
|
||||
if (val & 0x10)
|
||||
printf("TMDS clock detected\n");
|
||||
else
|
||||
printf("No TMDS clock detected\n");
|
||||
|
||||
uint16_t val16;
|
||||
val = adv7611_read_reg(HDMI_I2C_ADDR, 0x51); // D8-D1
|
||||
val16 = (uint16_t)val << 1;
|
||||
val = adv7611_read_reg(HDMI_I2C_ADDR, 0x52);
|
||||
val16 |= val >> 7;
|
||||
|
||||
printf("TMDS frequency %d MHz\n", val16);
|
||||
|
||||
val = adv7611_read_reg(HDMI_I2C_ADDR, 0x04);
|
||||
if (val & 0x2)
|
||||
printf("TMDS PLL locked\n");
|
||||
else
|
||||
printf("TMDS PLL not locked\n");
|
||||
|
||||
val = adv7611_read_reg(HDMI_I2C_ADDR, 0x05);
|
||||
if (val & 0x80)
|
||||
printf("HDMI mode detected\n");
|
||||
else
|
||||
printf("DVI mode detected\n");
|
||||
|
||||
val = adv7611_read_reg(HDMI_I2C_ADDR, 0x07);
|
||||
if (val & 0x20)
|
||||
printf("DE regeneration locked\n");
|
||||
else
|
||||
printf("DE regeneration not locked\n");
|
||||
|
||||
if (val & 0x80)
|
||||
printf("Vertical filter locked\n");
|
||||
else
|
||||
printf("Vertical filter not locked\n");
|
||||
|
||||
val16 = (uint16_t)adv7611_read_reg(HDMI_I2C_ADDR, 0x1e) << 8;
|
||||
val16 |= adv7611_read_reg(HDMI_I2C_ADDR, 0x1f);
|
||||
printf("Total line width: %d\n", val16);
|
||||
|
||||
val16 = (uint16_t)(adv7611_read_reg(HDMI_I2C_ADDR, 0x07) & 0x1f) << 8;
|
||||
val16 |= adv7611_read_reg(HDMI_I2C_ADDR, 0x08);
|
||||
printf("Active line width: %d\n", val16);
|
||||
|
||||
val16 = (uint16_t)(adv7611_read_reg(HDMI_I2C_ADDR, 0x09) & 0x1f) << 8;
|
||||
val16 |= adv7611_read_reg(HDMI_I2C_ADDR, 0x0a);
|
||||
printf("Active field height: %d\n", val16);
|
||||
// uint8_t val;
|
||||
//
|
||||
// val = adv7611_read_reg(ADV7611_I2C_ADDR, 0x6a);
|
||||
// if (val & 0x10)
|
||||
// printf("TMDS clock detected\n");
|
||||
// else
|
||||
// printf("No TMDS clock detected\n");
|
||||
//
|
||||
// uint16_t val16;
|
||||
// val = adv7611_read_reg(HDMI_I2C_ADDR, 0x51); // D8-D1
|
||||
// val16 = (uint16_t)val << 1;
|
||||
// val = adv7611_read_reg(HDMI_I2C_ADDR, 0x52);
|
||||
// val16 |= val >> 7;
|
||||
//
|
||||
// printf("TMDS frequency %d MHz\n", val16);
|
||||
//
|
||||
// val = adv7611_read_reg(HDMI_I2C_ADDR, 0x04);
|
||||
// if (val & 0x2)
|
||||
// printf("TMDS PLL locked\n");
|
||||
// else
|
||||
// printf("TMDS PLL not locked\n");
|
||||
//
|
||||
// val = adv7611_read_reg(HDMI_I2C_ADDR, 0x05);
|
||||
// if (val & 0x80)
|
||||
// printf("HDMI mode detected\n");
|
||||
// else
|
||||
// printf("DVI mode detected\n");
|
||||
//
|
||||
// val = adv7611_read_reg(HDMI_I2C_ADDR, 0x07);
|
||||
// if (val & 0x20)
|
||||
// printf("DE regeneration locked\n");
|
||||
// else
|
||||
// printf("DE regeneration not locked\n");
|
||||
//
|
||||
// if (val & 0x80)
|
||||
// printf("Vertical filter locked\n");
|
||||
// else
|
||||
// printf("Vertical filter not locked\n");
|
||||
//
|
||||
// val16 = (uint16_t)adv7611_read_reg(HDMI_I2C_ADDR, 0x1e) << 8;
|
||||
// val16 |= adv7611_read_reg(HDMI_I2C_ADDR, 0x1f);
|
||||
// printf("Total line width: %d\n", val16);
|
||||
//
|
||||
// val16 = (uint16_t)(adv7611_read_reg(HDMI_I2C_ADDR, 0x07) & 0x1f) << 8;
|
||||
// val16 |= adv7611_read_reg(HDMI_I2C_ADDR, 0x08);
|
||||
// printf("Active line width: %d\n", val16);
|
||||
//
|
||||
// val16 = (uint16_t)(adv7611_read_reg(HDMI_I2C_ADDR, 0x09) & 0x1f) << 8;
|
||||
// val16 |= adv7611_read_reg(HDMI_I2C_ADDR, 0x0a);
|
||||
// printf("Active field height: %d\n", val16);
|
||||
}
|
||||
|
||||
/***********************************************************************
|
||||
|
@ -236,30 +242,30 @@ void shell_i2c_probe(shell_context_t *ctx, int argc, char **argv)
|
|||
}
|
||||
|
||||
|
||||
const char shell_help_fl[] = "<operation> [brightness]\n"
|
||||
" operation - on | off | set\n"
|
||||
" brightness - 0-255\n";
|
||||
const char shell_help_summary_fl[] = "Control front light";
|
||||
|
||||
void shell_fl(shell_context_t *ctx, int argc, char **argv)
|
||||
{
|
||||
if ((argc < 2) || (argc > 3)) {
|
||||
printf("Invalid arguments. Type help [<command>] for usage.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (strcmp(argv[1], "on") == 0) {
|
||||
power_on_fl();
|
||||
}
|
||||
else if (strcmp(argv[1], "off") == 0) {
|
||||
power_off_fl();
|
||||
}
|
||||
|
||||
if (argc == 3) {
|
||||
int brightness = strtol(argv[2], NULL, 0);
|
||||
power_set_fl_brightness(brightness);
|
||||
}
|
||||
}
|
||||
//const char shell_help_fl[] = "<operation> [brightness]\n"
|
||||
// " operation - on | off | set\n"
|
||||
// " brightness - 0-255\n";
|
||||
//const char shell_help_summary_fl[] = "Control front light";
|
||||
//
|
||||
//void shell_fl(shell_context_t *ctx, int argc, char **argv)
|
||||
//{
|
||||
// if ((argc < 2) || (argc > 3)) {
|
||||
// printf("Invalid arguments. Type help [<command>] for usage.\n");
|
||||
// return;
|
||||
// }
|
||||
//
|
||||
// if (strcmp(argv[1], "on") == 0) {
|
||||
// power_on_fl();
|
||||
// }
|
||||
// else if (strcmp(argv[1], "off") == 0) {
|
||||
// power_off_fl();
|
||||
// }
|
||||
//
|
||||
// if (argc == 3) {
|
||||
// int brightness = strtol(argv[2], NULL, 0);
|
||||
// power_set_fl_brightness(brightness);
|
||||
// }
|
||||
//}
|
||||
|
||||
|
||||
/***********************************************************************
|
||||
|
@ -334,97 +340,131 @@ static void file_data_read(void *usr, void *data, int size) {
|
|||
}
|
||||
|
||||
/***********************************************************************
|
||||
* CMD: dump
|
||||
* CMD: format
|
||||
**********************************************************************/
|
||||
const char shell_help_dump[] = "[addr] <len>\n"
|
||||
" addr - Starting address to dump\n"
|
||||
" len - Number of bytes to dump (default 1)\n";
|
||||
const char shell_help_summary_dump[] = "Hex dump of flash contents";
|
||||
const char shell_help_format[] = "";
|
||||
const char shell_help_summary_format[] = "Formats an internal flash filesystem";
|
||||
|
||||
void shell_dump(shell_context_t *ctx, int argc, char **argv)
|
||||
{
|
||||
uintptr_t addr = 0;
|
||||
unsigned len = 1;
|
||||
uint8_t *buf;
|
||||
int ok;
|
||||
void shell_format(shell_context_t *ctx, int argc, char **argv) {
|
||||
printf("Be patient, this may take a while.\n");
|
||||
printf("Formatting...\n");
|
||||
|
||||
if (argc < 2) {
|
||||
printf("Invalid arguments\n");
|
||||
return;
|
||||
if (SPIFFS_format(&spiffs_fs) != SPIFFS_OK) {
|
||||
printf("SPIFFS format failed: %d\n", SPIFFS_errno(&spiffs_fs));
|
||||
}
|
||||
|
||||
addr = strtoul(argv[1], NULL, 0);
|
||||
if (argc > 2) {
|
||||
len = strtoul(argv[2], NULL, 0);
|
||||
}
|
||||
|
||||
buf = SHELL_MALLOC(len);
|
||||
if (buf) {
|
||||
ok = spif_read(addr, len, buf);
|
||||
if (ok == 0) {
|
||||
dump_bytes(ctx, buf, addr, len);
|
||||
}
|
||||
SHELL_FREE(buf);
|
||||
}
|
||||
printf("Done.\n");
|
||||
}
|
||||
|
||||
/***********************************************************************
|
||||
* CMD: fdump
|
||||
* CMD: rm/del
|
||||
**********************************************************************/
|
||||
const char shell_help_fdump[] =
|
||||
"[file] <start> <size>\n"
|
||||
" file - File to dump\n"
|
||||
" start - Start offset in bytes (default: 0)\n"
|
||||
" size - Size in bytes (default: full file)\n";
|
||||
const char shell_help_summary_fdump[] = "Dumps the contents of a file in hex";
|
||||
const char shell_help_rm[] = "<file1> [<file2> ...]\n";
|
||||
const char shell_help_summary_rm[] = "Removes a file";
|
||||
|
||||
#define DUMP_SIZE 512
|
||||
#include <stdio.h>
|
||||
|
||||
void shell_fdump(shell_context_t *ctx, int argc, char **argv) {
|
||||
spiffs_file f;
|
||||
size_t start = 0;
|
||||
size_t size = SIZE_MAX;
|
||||
uint8_t *buf = NULL;
|
||||
size_t rlen;
|
||||
int c;
|
||||
void shell_rm(shell_context_t *ctx, int argc, char **argv) {
|
||||
int i;
|
||||
|
||||
if( argc < 2 ) {
|
||||
printf("No file given\n");
|
||||
if (argc < 2) {
|
||||
printf( "Usage: rm <file1> [<file2> ...]\n" );
|
||||
return;
|
||||
}
|
||||
|
||||
if (argc > 2) {
|
||||
start = (size_t)strtoul(argv[2], NULL, 0);
|
||||
}
|
||||
|
||||
if (argc > 3) {
|
||||
size = (size_t)strtoul(argv[3], NULL, 0);
|
||||
}
|
||||
|
||||
f = SPIFFS_open(&spiffs_fs, argv[1], SPIFFS_O_RDONLY, 0);
|
||||
if (f) {
|
||||
buf = SHELL_MALLOC(DUMP_SIZE);
|
||||
SPIFFS_lseek(&spiffs_fs, f, start, SPIFFS_SEEK_SET);
|
||||
do {
|
||||
rlen = (size < DUMP_SIZE) ? size : DUMP_SIZE;
|
||||
rlen = SPIFFS_read(&spiffs_fs, f, buf, rlen);
|
||||
if (rlen) {
|
||||
dump_bytes(ctx, buf, start, rlen);
|
||||
size -= rlen;
|
||||
start += rlen;
|
||||
c = term_getch(&ctx->t, TERM_INPUT_DONT_WAIT);
|
||||
}
|
||||
} while (size && rlen && (c < 0));
|
||||
if (buf) {
|
||||
SHELL_FREE(buf);
|
||||
for (i = 1; i < argc; i++) {
|
||||
if (SPIFFS_remove(&spiffs_fs, argv[i]) != 0) {
|
||||
printf("Unable to remove '%s'\n", argv[i]);
|
||||
}
|
||||
SPIFFS_close(&spiffs_fs, f);
|
||||
}
|
||||
else {
|
||||
printf("Unable to open '%s'\n", argv[1]);
|
||||
}
|
||||
}
|
||||
|
||||
//const char shell_help_dump[] = "[addr] <len>\n"
|
||||
// " addr - Starting address to dump\n"
|
||||
// " len - Number of bytes to dump (default 1)\n";
|
||||
//const char shell_help_summary_dump[] = "Hex dump of flash contents";
|
||||
//
|
||||
//void shell_dump(shell_context_t *ctx, int argc, char **argv)
|
||||
//{
|
||||
// uintptr_t addr = 0;
|
||||
// unsigned len = 1;
|
||||
// uint8_t *buf;
|
||||
// int ok;
|
||||
//
|
||||
// if (argc < 2) {
|
||||
// printf("Invalid arguments\n");
|
||||
// return;
|
||||
// }
|
||||
//
|
||||
// addr = strtoul(argv[1], NULL, 0);
|
||||
// if (argc > 2) {
|
||||
// len = strtoul(argv[2], NULL, 0);
|
||||
// }
|
||||
//
|
||||
// buf = SHELL_MALLOC(len);
|
||||
// if (buf) {
|
||||
// ok = spif_read(addr, len, buf);
|
||||
// if (ok == 0) {
|
||||
// dump_bytes(ctx, buf, addr, len);
|
||||
// }
|
||||
// SHELL_FREE(buf);
|
||||
// }
|
||||
//}
|
||||
//
|
||||
//const char shell_help_fdump[] =
|
||||
// "[file] <start> <size>\n"
|
||||
// " file - File to dump\n"
|
||||
// " start - Start offset in bytes (default: 0)\n"
|
||||
// " size - Size in bytes (default: full file)\n";
|
||||
//const char shell_help_summary_fdump[] = "Dumps the contents of a file in hex";
|
||||
//
|
||||
//#define DUMP_SIZE 512
|
||||
//
|
||||
//void shell_fdump(shell_context_t *ctx, int argc, char **argv) {
|
||||
// spiffs_file f;
|
||||
// size_t start = 0;
|
||||
// size_t size = SIZE_MAX;
|
||||
// uint8_t *buf = NULL;
|
||||
// size_t rlen;
|
||||
// int c;
|
||||
//
|
||||
// if( argc < 2 ) {
|
||||
// printf("No file given\n");
|
||||
// return;
|
||||
// }
|
||||
//
|
||||
// if (argc > 2) {
|
||||
// start = (size_t)strtoul(argv[2], NULL, 0);
|
||||
// }
|
||||
//
|
||||
// if (argc > 3) {
|
||||
// size = (size_t)strtoul(argv[3], NULL, 0);
|
||||
// }
|
||||
//
|
||||
// f = SPIFFS_open(&spiffs_fs, argv[1], SPIFFS_O_RDONLY, 0);
|
||||
// if (f) {
|
||||
// buf = SHELL_MALLOC(DUMP_SIZE);
|
||||
// SPIFFS_lseek(&spiffs_fs, f, start, SPIFFS_SEEK_SET);
|
||||
// do {
|
||||
// rlen = (size < DUMP_SIZE) ? size : DUMP_SIZE;
|
||||
// rlen = SPIFFS_read(&spiffs_fs, f, buf, rlen);
|
||||
// if (rlen) {
|
||||
// dump_bytes(ctx, buf, start, rlen);
|
||||
// size -= rlen;
|
||||
// start += rlen;
|
||||
// c = term_getch(&ctx->t, TERM_INPUT_DONT_WAIT);
|
||||
// }
|
||||
// } while (size && rlen && (c < 0));
|
||||
// if (buf) {
|
||||
// SHELL_FREE(buf);
|
||||
// }
|
||||
// SPIFFS_close(&spiffs_fs, f);
|
||||
// }
|
||||
// else {
|
||||
// printf("Unable to open '%s'\n", argv[1]);
|
||||
// }
|
||||
//}
|
||||
|
||||
/***********************************************************************
|
||||
* CMD: recv
|
||||
**********************************************************************/
|
||||
|
@ -571,107 +611,85 @@ void shell_setvolt(shell_context_t *ctx, int argc, char **argv) {
|
|||
const char shell_help_setcfg[] = "<set|get|save> [key] [value]\n";
|
||||
const char shell_help_summary_setcfg[] = "Sets configuration. Remember to use save to save it to the flash.";
|
||||
|
||||
typedef struct {
|
||||
const char *name;
|
||||
void *pointer;
|
||||
enum {UINT8, UINT16, UINT32, FLOAT32} type;
|
||||
} cfg_var_t;
|
||||
|
||||
cfg_var_t vars[] = {
|
||||
{"pclk_hz", &(config.pclk_hz), UINT32},
|
||||
{"hfp", &(config.hfp), UINT8},
|
||||
{"vfp", &(config.vfp), UINT8},
|
||||
{"hsync", &(config.hsync), UINT8},
|
||||
{"vsync", &(config.vsync), UINT8},
|
||||
{"hact", &(config.hact), UINT16},
|
||||
{"hblk", &(config.hblk), UINT16},
|
||||
{"vact", &(config.vact), UINT16},
|
||||
{"vblk", &(config.vblk), UINT16},
|
||||
{"size_x_mm", &(config.size_x_mm), UINT16},
|
||||
{"size_y_mm", &(config.size_y_mm), UINT16},
|
||||
{"mfg_week", &(config.mfg_week), UINT8},
|
||||
{"mfg_year", &(config.mfg_year), UINT8},
|
||||
{"vcom", &(config.vcom), FLOAT32},
|
||||
{"vgh", &(config.vgh), FLOAT32},
|
||||
{"tcon_vfp", &(config.tcon_vfp), UINT8},
|
||||
{"tcon_vsync", &(config.tcon_vsync), UINT8},
|
||||
{"tcon_vbp", &(config.tcon_vbp), UINT8},
|
||||
{"tcon_vact", &(config.tcon_vact), UINT16},
|
||||
{"tcon_hfp", &(config.tcon_hfp), UINT8},
|
||||
{"tcon_hsync", &(config.tcon_hsync), UINT8},
|
||||
{"tcon_hbp", &(config.tcon_hbp), UINT8},
|
||||
{"tcon_hact", &(config.tcon_hact), UINT16},
|
||||
};
|
||||
int num_vars = sizeof(vars) / sizeof(cfg_var_t);
|
||||
|
||||
static void setcfg_set_helper(cfg_var_t *var, char *val) {
|
||||
if (var->type == UINT8) {
|
||||
*(uint8_t *)(var->pointer) = strtol(val, NULL, 10);
|
||||
}
|
||||
else if (var->type == UINT16) {
|
||||
*(uint16_t *)(var->pointer) = strtol(val, NULL, 10);
|
||||
}
|
||||
else if (var->type == UINT32) {
|
||||
*(uint32_t *)(var->pointer) = strtol(val, NULL, 10);
|
||||
}
|
||||
else if (var->type == FLOAT32) {
|
||||
*(float *)(var->pointer) = strtof(val, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
static void setcfg_get_helper(shell_context_t *ctx, cfg_var_t *var) {
|
||||
if (var->type == UINT8) {
|
||||
printf("%d\n", *(uint8_t *)(var->pointer));
|
||||
}
|
||||
else if (var->type == UINT16) {
|
||||
printf("%d\n", *(uint16_t *)(var->pointer));
|
||||
}
|
||||
else if (var->type == UINT32) {
|
||||
printf("%d\n", *(uint32_t *)(var->pointer));
|
||||
}
|
||||
else if (var->type == FLOAT32) {
|
||||
printf("%f\n", *(float *)(var->pointer));
|
||||
}
|
||||
}
|
||||
|
||||
void shell_setcfg(shell_context_t *ctx, int argc, char **argv) {
|
||||
if (argc < 2) {
|
||||
printf("Usage: %s\n", shell_help_setcfg);
|
||||
return;
|
||||
}
|
||||
|
||||
enum {UINT8, UINT16, UINT32, FLOAT32} var_type;
|
||||
void * var_pointer;
|
||||
cfg_var_t *var = NULL;
|
||||
if (argc >= 3) {
|
||||
// has key specifier
|
||||
if (strcmp(argv[2], "pclk_hz") == 0) {
|
||||
var_pointer = &(config.pclk_hz);
|
||||
var_type = UINT32;
|
||||
for (int i = 0; i < num_vars; i++) {
|
||||
if (strcmp(argv[2], vars[i].name) == 0) {
|
||||
var = &vars[i];
|
||||
}
|
||||
}
|
||||
else if (strcmp(argv[2], "hfp") == 0) {
|
||||
var_pointer = &(config.hfp);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "vfp") == 0) {
|
||||
var_pointer = &(config.vfp);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "hsync") == 0) {
|
||||
var_pointer = &(config.hsync);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "vsync") == 0) {
|
||||
var_pointer = &(config.vsync);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "hact") == 0) {
|
||||
var_pointer = &(config.hact);
|
||||
var_type = UINT16;
|
||||
}
|
||||
else if (strcmp(argv[2], "hblk") == 0) {
|
||||
var_pointer = &(config.hblk);
|
||||
var_type = UINT16;
|
||||
}
|
||||
else if (strcmp(argv[2], "vact") == 0) {
|
||||
var_pointer = &(config.vact);
|
||||
var_type = UINT16;
|
||||
}
|
||||
else if (strcmp(argv[2], "vblk") == 0) {
|
||||
var_pointer = &(config.vblk);
|
||||
var_type = UINT16;
|
||||
}
|
||||
else if (strcmp(argv[2], "size_x_mm") == 0) {
|
||||
var_pointer = &(config.size_x_mm);
|
||||
var_type = UINT16;
|
||||
}
|
||||
else if (strcmp(argv[2], "size_y_mm") == 0) {
|
||||
var_pointer = &(config.size_y_mm);
|
||||
var_type = UINT16;
|
||||
}
|
||||
else if (strcmp(argv[2], "mfg_week") == 0) {
|
||||
var_pointer = &(config.mfg_week);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "mfg_year") == 0) {
|
||||
var_pointer = &(config.mfg_year);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "vcom") == 0) {
|
||||
var_pointer = &(config.vcom);
|
||||
var_type = FLOAT32;
|
||||
}
|
||||
else if (strcmp(argv[2], "vgh") == 0) {
|
||||
var_pointer = &(config.vgh);
|
||||
var_type = FLOAT32;
|
||||
}
|
||||
else if (strcmp(argv[2], "tcon_vfp") == 0) {
|
||||
var_pointer = &(config.tcon_vfp);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "tcon_vsync") == 0) {
|
||||
var_pointer = &(config.tcon_vsync);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "tcon_vbp") == 0) {
|
||||
var_pointer = &(config.tcon_vbp);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "tcon_vact") == 0) {
|
||||
var_pointer = &(config.tcon_vact);
|
||||
var_type = UINT16;
|
||||
}
|
||||
else if (strcmp(argv[2], "tcon_hfp") == 0) {
|
||||
var_pointer = &(config.tcon_hfp);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "tcon_hsync") == 0) {
|
||||
var_pointer = &(config.tcon_hsync);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "tcon_hbp") == 0) {
|
||||
var_pointer = &(config.tcon_hbp);
|
||||
var_type = UINT8;
|
||||
}
|
||||
else if (strcmp(argv[2], "tcon_hact") == 0) {
|
||||
var_pointer = &(config.tcon_hact);
|
||||
var_type = UINT16;
|
||||
if (var == NULL) {
|
||||
printf("Unknown key %s", argv[2]);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -680,34 +698,63 @@ void shell_setcfg(shell_context_t *ctx, int argc, char **argv) {
|
|||
printf("Key and value required for set\n");
|
||||
return;
|
||||
}
|
||||
if (var_type == UINT8) {
|
||||
*(uint8_t *)var_pointer = strtol(argv[3], NULL, 10);
|
||||
}
|
||||
else if (var_type == UINT16) {
|
||||
*(uint16_t *)var_pointer = strtol(argv[3], NULL, 10);
|
||||
}
|
||||
else if (var_type == UINT32) {
|
||||
*(uint32_t *)var_pointer = strtol(argv[3], NULL, 10);
|
||||
}
|
||||
else if (var_type == FLOAT32) {
|
||||
*(float *)var_pointer = strtof(argv[3], NULL);
|
||||
}
|
||||
setcfg_set_helper(var, argv[3]);
|
||||
}
|
||||
else if (strcmp(argv[1], "get") == 0) {
|
||||
if (var_type == UINT8) {
|
||||
printf("%d\n", *(uint8_t *)var_pointer);
|
||||
if (argc < 4) {
|
||||
// Get every var
|
||||
for (int i = 0; i < num_vars; i++) {
|
||||
printf("%s: ", vars[i].name);
|
||||
setcfg_get_helper(ctx, &vars[i]);
|
||||
}
|
||||
}
|
||||
else if (var_type == UINT16) {
|
||||
printf("%d\n", *(uint16_t *)var_pointer);
|
||||
}
|
||||
else if (var_type == UINT32) {
|
||||
printf("%d\n", *(uint32_t *)var_pointer);
|
||||
}
|
||||
else if (var_type == FLOAT32) {
|
||||
printf("%f\n", *(float *)var_pointer);
|
||||
else {
|
||||
setcfg_get_helper(ctx, var);
|
||||
}
|
||||
}
|
||||
else if (strcmp(argv[1], "save") == 0) {
|
||||
config_save();
|
||||
}
|
||||
}
|
||||
|
||||
const char shell_help_sensor[] = "\n";
|
||||
const char shell_help_summary_sensor[] = "Get sensor readings";
|
||||
|
||||
void shell_sensor(shell_context_t *ctx, int argc, char **argv) {
|
||||
printf("EPD Supplies:\n");
|
||||
printf("VP: %5.2f V\n", power_get_rail_voltage(RAIL_VP));
|
||||
printf("VGH: %5.2f V\n", power_get_rail_voltage(RAIL_VGH));
|
||||
printf("VN: %5.2f V\n", power_get_rail_voltage(RAIL_VN));
|
||||
printf("VGL: %5.2f V\n", power_get_rail_voltage(RAIL_VGL));
|
||||
printf("VCOM: %5.2f V\n", power_get_rail_voltage(RAIL_VCOM));
|
||||
printf("5VES: %5.2f V %3.0f mA\n", power_get_rail_voltage(RAIL_5VES), power_get_rail_current(RAIL_5VES));
|
||||
printf("5VEG: %5.2f V %3.0f mA\n", power_get_rail_voltage(RAIL_5VEG), power_get_rail_current(RAIL_5VEG));
|
||||
|
||||
printf("System Supplies:\n");
|
||||
printf("VBUS: %5.2f V\n", power_get_rail_voltage(RAIL_VBUS));
|
||||
printf("3V3: %5.2f V %3.0f mA\n", power_get_rail_voltage(RAIL_3V3), power_get_rail_current(RAIL_3V3));
|
||||
printf("1V8VID: %5.2f V %3.0f mA\n", power_get_rail_voltage(RAIL_1V8VID), power_get_rail_current(RAIL_1V8VID));
|
||||
printf("3V3VID: %5.2f V %3.0f mA\n", power_get_rail_voltage(RAIL_3V3VID), power_get_rail_current(RAIL_3V3VID));
|
||||
printf("5V2FL: %5.2f V %3.0f mA\n", power_get_rail_voltage(RAIL_5V2FL), power_get_rail_current(RAIL_5V2FL));
|
||||
printf("1V35: %5.2f V %3.0f mA\n", power_get_rail_voltage(RAIL_1V35), power_get_rail_current(RAIL_1V35));
|
||||
printf("1V2: %5.2f V %3.0f mA\n", power_get_rail_voltage(RAIL_1V2), power_get_rail_current(RAIL_1V2));
|
||||
|
||||
float p_cur, p_avg, p_max;
|
||||
float p_cur_sum, p_avg_sum, p_max_sum;
|
||||
|
||||
printf("Power Consumption (CUR, AVG, MAX):\n");
|
||||
power_get_rail_power(RAIL_3V3, &p_cur, &p_avg, &p_max);
|
||||
printf("MCU + IO: %5.1f mW %5.1f mW %5.1f mW\n", p_cur, p_avg, p_max);
|
||||
power_get_rail_power(RAIL_1V35, &p_cur, &p_avg, &p_max);
|
||||
printf("FPGA DDR: %5.1f mW %5.1f mW %5.1f mW\n", p_cur, p_avg, p_max);
|
||||
power_get_rail_power(RAIL_1V2, &p_cur, &p_avg, &p_max);
|
||||
printf("FPGA CORE: %5.1f mW %5.1f mW %5.1f mW\n", p_cur, p_avg, p_max);
|
||||
power_get_rail_power(RAIL_1V8VID, &p_cur_sum, &p_avg_sum, &p_max_sum);
|
||||
power_get_rail_power(RAIL_3V3VID, &p_cur, &p_avg, &p_max);
|
||||
p_cur_sum += p_cur; p_avg_sum += p_avg; p_max_sum += p_max;
|
||||
printf("VIDEO IN: %5.1f mW %5.1f mW %5.1f mW\n", p_cur_sum, p_avg_sum, p_max_sum);
|
||||
power_get_rail_power(RAIL_5VES, &p_cur_sum, &p_avg_sum, &p_max_sum);
|
||||
power_get_rail_power(RAIL_5VEG, &p_cur, &p_avg, &p_max);
|
||||
p_cur_sum += p_cur; p_avg_sum += p_avg; p_max_sum += p_max;
|
||||
printf("EPD HV: %5.1f mW %5.1f mW %5.1f mW\n", p_cur_sum, p_avg_sum, p_max_sum);
|
||||
}
|
||||
|
|
|
@ -112,10 +112,10 @@ void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_
|
|||
// TODO
|
||||
break;
|
||||
case USBCMD_REDRAW:
|
||||
//retval = caster_redraw(x0, y0, x1, y1);
|
||||
retval = caster_redraw(x0, y0, x1, y1);
|
||||
break;
|
||||
case USBCMD_SETMODE:
|
||||
//retval = caster_setmode(x0, y0, x1, y1, (UPDATE_MODE)param);
|
||||
retval = caster_setmode(x0, y0, x1, y1, (update_mode_t)param);
|
||||
break;
|
||||
case USBCMD_USBBOOT:
|
||||
//iap_usbboot();
|
||||
|
|
|
@ -1,11 +1,40 @@
|
|||
#MicroXplorer Configuration settings - do not modify
|
||||
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_7
|
||||
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSignedSaturation-0\#ChannelRegularConversion,NbrOfConversionFlag,master
|
||||
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_3
|
||||
ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_4
|
||||
ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_5
|
||||
ADC1.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_7
|
||||
ADC1.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_8
|
||||
ADC1.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_9
|
||||
ADC1.ConversionDataManagement=ADC_CONVERSIONDATA_DMA_ONESHOT
|
||||
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSignedSaturation-0\#ChannelRegularConversion,NbrOfConversionFlag,master,ConversionDataManagement,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,OffsetSignedSaturation-1\#ChannelRegularConversion,Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,OffsetSignedSaturation-2\#ChannelRegularConversion,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,OffsetSignedSaturation-3\#ChannelRegularConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,OffsetSignedSaturation-4\#ChannelRegularConversion,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,OffsetNumber-5\#ChannelRegularConversion,OffsetSignedSaturation-5\#ChannelRegularConversion,NbrOfConversion,OversamplingMode,Ratio
|
||||
ADC1.NbrOfConversion=6
|
||||
ADC1.NbrOfConversionFlag=1
|
||||
ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
|
||||
ADC1.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE
|
||||
ADC1.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE
|
||||
ADC1.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE
|
||||
ADC1.OffsetNumber-4\#ChannelRegularConversion=ADC_OFFSET_NONE
|
||||
ADC1.OffsetNumber-5\#ChannelRegularConversion=ADC_OFFSET_NONE
|
||||
ADC1.OffsetSignedSaturation-0\#ChannelRegularConversion=DISABLE
|
||||
ADC1.OffsetSignedSaturation-1\#ChannelRegularConversion=DISABLE
|
||||
ADC1.OffsetSignedSaturation-2\#ChannelRegularConversion=DISABLE
|
||||
ADC1.OffsetSignedSaturation-3\#ChannelRegularConversion=DISABLE
|
||||
ADC1.OffsetSignedSaturation-4\#ChannelRegularConversion=DISABLE
|
||||
ADC1.OffsetSignedSaturation-5\#ChannelRegularConversion=DISABLE
|
||||
ADC1.OversamplingMode=DISABLE
|
||||
ADC1.Rank-0\#ChannelRegularConversion=1
|
||||
ADC1.Rank-1\#ChannelRegularConversion=2
|
||||
ADC1.Rank-2\#ChannelRegularConversion=3
|
||||
ADC1.Rank-3\#ChannelRegularConversion=4
|
||||
ADC1.Rank-4\#ChannelRegularConversion=5
|
||||
ADC1.Rank-5\#ChannelRegularConversion=6
|
||||
ADC1.Ratio=1
|
||||
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
|
||||
ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
|
||||
ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
|
||||
ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
|
||||
ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
|
||||
ADC1.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
|
||||
ADC1.master=1
|
||||
CAD.formats=[]
|
||||
CAD.pinconfig=Dual
|
||||
|
@ -15,8 +44,27 @@ CORTEX_M7.default_mode_Activation=1
|
|||
DAC1.DAC_Channel-DAC_OUT1=DAC_CHANNEL_1
|
||||
DAC1.DAC_Channel-DAC_OUT2=DAC_CHANNEL_2
|
||||
DAC1.IPParameters=DAC_Channel-DAC_OUT1,DAC_Channel-DAC_OUT2
|
||||
Dma.ADC1.1.Direction=DMA_PERIPH_TO_MEMORY
|
||||
Dma.ADC1.1.EventEnable=DISABLE
|
||||
Dma.ADC1.1.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
Dma.ADC1.1.Instance=DMA1_Stream1
|
||||
Dma.ADC1.1.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
|
||||
Dma.ADC1.1.MemInc=DMA_MINC_ENABLE
|
||||
Dma.ADC1.1.Mode=DMA_NORMAL
|
||||
Dma.ADC1.1.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
|
||||
Dma.ADC1.1.PeriphInc=DMA_PINC_DISABLE
|
||||
Dma.ADC1.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
|
||||
Dma.ADC1.1.Priority=DMA_PRIORITY_LOW
|
||||
Dma.ADC1.1.RequestNumber=1
|
||||
Dma.ADC1.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
|
||||
Dma.ADC1.1.SignalID=NONE
|
||||
Dma.ADC1.1.SyncEnable=DISABLE
|
||||
Dma.ADC1.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
|
||||
Dma.ADC1.1.SyncRequestNumber=1
|
||||
Dma.ADC1.1.SyncSignalID=NONE
|
||||
Dma.Request0=SPI2_TX
|
||||
Dma.RequestsNb=1
|
||||
Dma.Request1=ADC1
|
||||
Dma.RequestsNb=2
|
||||
Dma.SPI2_TX.0.Direction=DMA_MEMORY_TO_PERIPH
|
||||
Dma.SPI2_TX.0.EventEnable=DISABLE
|
||||
Dma.SPI2_TX.0.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||
|
@ -108,8 +156,7 @@ Mcu.IP12=RCC
|
|||
Mcu.IP13=SDMMC2
|
||||
Mcu.IP14=SPI2
|
||||
Mcu.IP15=SYS
|
||||
Mcu.IP16=TIM1
|
||||
Mcu.IP17=USB_OTG_FS
|
||||
Mcu.IP16=USB_OTG_FS
|
||||
Mcu.IP2=DAC1
|
||||
Mcu.IP3=DEBUG
|
||||
Mcu.IP4=DMA
|
||||
|
@ -118,33 +165,33 @@ Mcu.IP6=FREERTOS
|
|||
Mcu.IP7=I2C1
|
||||
Mcu.IP8=MDMA
|
||||
Mcu.IP9=MEMORYMAP
|
||||
Mcu.IPNb=18
|
||||
Mcu.IPNb=17
|
||||
Mcu.Name=STM32H750VBTx
|
||||
Mcu.Package=LQFP100
|
||||
Mcu.Pin0=PE2
|
||||
Mcu.Pin1=PC14-OSC32_IN (OSC32_IN)
|
||||
Mcu.Pin10=PA2
|
||||
Mcu.Pin11=PA3
|
||||
Mcu.Pin12=PA4
|
||||
Mcu.Pin13=PA5
|
||||
Mcu.Pin14=PA6
|
||||
Mcu.Pin15=PA7
|
||||
Mcu.Pin16=PC4
|
||||
Mcu.Pin17=PC5
|
||||
Mcu.Pin18=PB0
|
||||
Mcu.Pin19=PB1
|
||||
Mcu.Pin2=PC15-OSC32_OUT (OSC32_OUT)
|
||||
Mcu.Pin20=PB2
|
||||
Mcu.Pin21=PE7
|
||||
Mcu.Pin22=PE8
|
||||
Mcu.Pin23=PE9
|
||||
Mcu.Pin24=PE10
|
||||
Mcu.Pin25=PE11
|
||||
Mcu.Pin26=PE12
|
||||
Mcu.Pin27=PE13
|
||||
Mcu.Pin28=PE14
|
||||
Mcu.Pin1=PE3
|
||||
Mcu.Pin10=PA0
|
||||
Mcu.Pin11=PA1
|
||||
Mcu.Pin12=PA2
|
||||
Mcu.Pin13=PA3
|
||||
Mcu.Pin14=PA4
|
||||
Mcu.Pin15=PA5
|
||||
Mcu.Pin16=PA6
|
||||
Mcu.Pin17=PA7
|
||||
Mcu.Pin18=PC4
|
||||
Mcu.Pin19=PC5
|
||||
Mcu.Pin2=PE4
|
||||
Mcu.Pin20=PB0
|
||||
Mcu.Pin21=PB1
|
||||
Mcu.Pin22=PB2
|
||||
Mcu.Pin23=PE7
|
||||
Mcu.Pin24=PE8
|
||||
Mcu.Pin25=PE9
|
||||
Mcu.Pin26=PE10
|
||||
Mcu.Pin27=PE11
|
||||
Mcu.Pin28=PE12
|
||||
Mcu.Pin29=PE15
|
||||
Mcu.Pin3=PH0-OSC_IN (PH0)
|
||||
Mcu.Pin3=PC14-OSC32_IN (OSC32_IN)
|
||||
Mcu.Pin30=PB10
|
||||
Mcu.Pin31=PB12
|
||||
Mcu.Pin32=PB13
|
||||
|
@ -155,7 +202,7 @@ Mcu.Pin36=PD12
|
|||
Mcu.Pin37=PD14
|
||||
Mcu.Pin38=PD15
|
||||
Mcu.Pin39=PC7
|
||||
Mcu.Pin4=PH1-OSC_OUT (PH1)
|
||||
Mcu.Pin4=PC15-OSC32_OUT (OSC32_OUT)
|
||||
Mcu.Pin40=PC9
|
||||
Mcu.Pin41=PA10
|
||||
Mcu.Pin42=PA11
|
||||
|
@ -166,7 +213,7 @@ Mcu.Pin46=PA15 (JTDI)
|
|||
Mcu.Pin47=PC10
|
||||
Mcu.Pin48=PC11
|
||||
Mcu.Pin49=PC12
|
||||
Mcu.Pin5=PC1
|
||||
Mcu.Pin5=PH0-OSC_IN (PH0)
|
||||
Mcu.Pin50=PD0
|
||||
Mcu.Pin51=PD1
|
||||
Mcu.Pin52=PD2
|
||||
|
@ -177,7 +224,7 @@ Mcu.Pin56=PD6
|
|||
Mcu.Pin57=PD7
|
||||
Mcu.Pin58=PB3 (JTDO/TRACESWO)
|
||||
Mcu.Pin59=PB4 (NJTRST)
|
||||
Mcu.Pin6=PC2_C
|
||||
Mcu.Pin6=PH1-OSC_OUT (PH1)
|
||||
Mcu.Pin60=PB5
|
||||
Mcu.Pin61=PB6
|
||||
Mcu.Pin62=PB7
|
||||
|
@ -186,12 +233,11 @@ Mcu.Pin64=PE0
|
|||
Mcu.Pin65=PE1
|
||||
Mcu.Pin66=VP_FREERTOS_VS_CMSIS_V2
|
||||
Mcu.Pin67=VP_SYS_VS_tim2
|
||||
Mcu.Pin68=VP_TIM1_VS_ClockSourceINT
|
||||
Mcu.Pin69=VP_MEMORYMAP_VS_MEMORYMAP
|
||||
Mcu.Pin7=PC3_C
|
||||
Mcu.Pin8=PA0
|
||||
Mcu.Pin9=PA1
|
||||
Mcu.PinsNb=70
|
||||
Mcu.Pin68=VP_MEMORYMAP_VS_MEMORYMAP
|
||||
Mcu.Pin7=PC1
|
||||
Mcu.Pin8=PC2_C
|
||||
Mcu.Pin9=PC3_C
|
||||
Mcu.PinsNb=69
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32H750VBTx
|
||||
|
@ -226,6 +272,7 @@ MxCube.Version=6.13.0
|
|||
MxDb.Version=DB.6.0.130
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
|
||||
NVIC.EXTI15_10_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
|
||||
NVIC.ForceEnableDMAVector=true
|
||||
|
@ -394,16 +441,20 @@ PE11.Locked=true
|
|||
PE11.Signal=GPIO_Output
|
||||
PE12.Locked=true
|
||||
PE12.Signal=GPIO_Output
|
||||
PE13.Locked=true
|
||||
PE13.Signal=S_TIM1_CH3
|
||||
PE14.Locked=true
|
||||
PE14.Signal=S_TIM1_CH4
|
||||
PE15.Locked=true
|
||||
PE15.Signal=GPIO_Output
|
||||
PE2.GPIOParameters=GPIO_Speed
|
||||
PE2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE2.Mode=Single Bank 1
|
||||
PE2.Signal=QUADSPI_BK1_IO2
|
||||
PE3.GPIOParameters=GPIO_PuPd
|
||||
PE3.GPIO_PuPd=GPIO_PULLDOWN
|
||||
PE3.Locked=true
|
||||
PE3.Signal=GPIO_Input
|
||||
PE4.GPIOParameters=GPIO_PuPd
|
||||
PE4.GPIO_PuPd=GPIO_PULLDOWN
|
||||
PE4.Locked=true
|
||||
PE4.Signal=GPIO_Input
|
||||
PE7.Signal=FMC_D4_DA4
|
||||
PE8.Signal=FMC_D5_DA5
|
||||
PE9.Signal=FMC_D6_DA6
|
||||
|
@ -442,7 +493,7 @@ ProjectManager.ToolChainLocation=
|
|||
ProjectManager.UAScriptAfterPath=
|
||||
ProjectManager.UAScriptBeforePath=
|
||||
ProjectManager.UnderRoot=true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_DMA_Init-DMA-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_DAC1_Init-DAC1-false-HAL-true,7-MX_FMC_Init-FMC-false-HAL-true,8-MX_I2C1_Init-I2C1-false-LL-true,9-MX_QUADSPI_Init-QUADSPI-false-HAL-true,10-MX_SPI2_Init-SPI2-false-HAL-true,11-MX_TIM1_Init-TIM1-false-HAL-true,12-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,false-13-MX_SDMMC2_SD_Init-SDMMC2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_MDMA_Init-MDMA-false-HAL-true,4-MX_DMA_Init-DMA-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_DAC1_Init-DAC1-false-HAL-true,7-MX_FMC_Init-FMC-false-HAL-true,8-MX_I2C1_Init-I2C1-false-LL-true,9-MX_QUADSPI_Init-QUADSPI-false-HAL-true,10-MX_SPI2_Init-SPI2-false-HAL-true,11-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,false-12-MX_SDMMC2_SD_Init-SDMMC2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||
QUADSPI.ClockPrescaler=0
|
||||
QUADSPI.DeviceType=SPI_DEVICE_FLASH
|
||||
QUADSPI.FifoThreshold=4
|
||||
|
@ -573,22 +624,12 @@ SH.FMC_NWE.0=FMC_NWE,Lcd1
|
|||
SH.FMC_NWE.ConfNb=1
|
||||
SH.GPXTI15.0=GPIO_EXTI15
|
||||
SH.GPXTI15.ConfNb=1
|
||||
SH.S_TIM1_CH3.0=TIM1_CH3,PWM Generation3 CH3
|
||||
SH.S_TIM1_CH3.ConfNb=1
|
||||
SH.S_TIM1_CH4.0=TIM1_CH4,PWM Generation4 CH4
|
||||
SH.S_TIM1_CH4.ConfNb=1
|
||||
SPI2.CalculateBaudRate=24.0 MBits/s
|
||||
SPI2.DataSize=SPI_DATASIZE_8BIT
|
||||
SPI2.Direction=SPI_DIRECTION_2LINES
|
||||
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize
|
||||
SPI2.Mode=SPI_MODE_MASTER
|
||||
SPI2.VirtualType=VM_MASTER
|
||||
TIM1.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
|
||||
TIM1.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
|
||||
TIM1.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4,Pulse-PWM Generation3 CH3,Period,Prescaler
|
||||
TIM1.Period=255
|
||||
TIM1.Prescaler=16
|
||||
TIM1.Pulse-PWM\ Generation3\ CH3=127
|
||||
USB_OTG_FS.IPParameters=VirtualMode
|
||||
USB_OTG_FS.VirtualMode=Device_Only
|
||||
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
|
||||
|
@ -597,8 +638,6 @@ VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
|
|||
VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
|
||||
VP_SYS_VS_tim2.Mode=TIM2
|
||||
VP_SYS_VS_tim2.Signal=SYS_VS_tim2
|
||||
VP_TIM1_VS_ClockSourceINT.Mode=Internal
|
||||
VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
|
||||
board=custom
|
||||
rtos.0.ip=FREERTOS
|
||||
rtos.0.tasks.0=allocationType,Dynamic;bufferName,NULL;codeGen,Default;controlBlockName,NULL;entry,StartDefaultTask;name,defaultTask;parameter,NULL;priority,osPriorityNormal;stackSize,128
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue