| .forgejo/workflows | ||
| PK2Y8XA | ||
| PK12R6F | ||
| bootsplash.jpg | ||
| config | ||
| README.md | ||
coreboot-x230-fhd
This repo houses a workflow to build my very own coreboot image built specifically for each of my X230 laptops with EDK2 payload. Both laptops have the FHD mod, one from Nitrocaster, the other XYtech. These coreboot images are thus built for this variant, disabling the internal LVDS. Incidently, these laptops also have the classic X220 keyboards, which needs a special EC which can only be flashed using the original BIOS.
Under release, both top bios chips are the same. The bottom chips houses, amoung other things, the (neutered) Intel Management Engine, and other information that is specific to each laptop.
If you want to use these images, only use the coreboot-*-top.bin file to flash only the top bios chip. Anything else will likely cause issues or brick your laptop. If you neuter your management engine using me_cleaner, it is recommended to first flash coreboot, boot once, and then flash a neutered version of your bottom chip.
Also, please, whatever you do, backup the original of both chips, and everything you do is at your own risk.
Manual build
For manual build of coreboot with your very own BIOS chip. you can follow this section. The Action workflows basically follow this.
NOTE - This was last tested with coreboot version v25.06
Flashing EC
If using X230 keyboard, or want to use aftermarket batteries, apply patched EC from here: https://github.com/hamishcoleman/thinkpad-ec
Extract original bios
The original bios will be needed when building coreboot. There are a few ways to do it:
- with a raspberry pi: https://github.com/merge/skulls/blob/master/x230/README.md (from section
Hardware Example: Raspberry Pi 3) - with a programmer: https://github.com/merge/skulls/blob/master/x230/README.md (from section
Hardware Example: CH341A based)
Once the top and bottom chip is extracted, join them together (with cat bot.rom top.rom > bios.bin) and send to the build environment. It is also a good idea to backup this rom.
Setup build environment
Using distrobox, setup coreboot build environment:
distrobox create --image debian:12 --root coreboot-build
distrobox enter --root coreboot-build
You should now be in a debian-12 environment
In a seperate shell, access that same environment as root to add user to sudo group:
sudo podman exec -it coreboot-build bash
usermod -aG sudo $user
Back to the distrobox shell, add dependencies and set python3 as default python:
sudo apt install -y \
bison \
build-essential \
coreboot-utils \
curl \
flashrom \
flex \
gcc-multilib \
git \
gnat \
imagemagick \
libncurses5-dev \
nasm \
m4 \
rename \
uuid-dev \
zlib1g-dev
sudo update-alternatives --install /usr/bin/python python /usr/bin/python3
Prepare Coreboot
Clone coreboot and checkout version (in our case it is v25.09)
git clone https://review.coreboot.org/coreboot
cd coreboot
git checkout $version
git submodule update --init --checkout
Compile coreboot build tools
make crossgcc-i386 CPUS=$(nproc)
First, we need to extract the blobs from the BIOS file using the Coreboot util ifdtool:
- Flash Descriptor - Intel descriptor
- BIOS - BIOS
- Intel ME - Intel ME/TXE firmware
- GbE - Gigabit Ethernet firmware
- Platform Data - unused
cd util/ifdtool
./ifdtool -x ~/x230-dump.bin
cd ../../
mkdir -p 3rdparty/blobs/mainboard/lenovo/x230
cd 3rdparty/blobs/mainboard/lenovo/x220
cp ~/coreboot/util/ifdtool/*.bin .
mv flashregion_0_flashdescriptor.bin descriptor.bin
mv flashregion_1_bios.bin bios.bin
mv flashregion_2_intel_me.bin me.bin
mv flashregion_3_gbe.bin gbe.bin
Configure build with nconfig:
make nconfig
A neat little menu should now pop up, and we can customise to our heart’s content. The settings I changed were:
- General setup
- Add a bootsplash image
- Mainboard
- Mainboard vendor:
Lenovo - Mainboard model:
ThinkPad X230 eDP Mod (2K/FHD) - Size of CBFS filesystem in ROM:
0x400000- NOTE: This was boosted for UEFI boot via edk2; leave it as 0x100000 for SeaBIOS
- Mainboard vendor:
- Chipset
- Support bluetooth on wifi cards
- Add Intel descriptor.bin file
- Add Intel ME/TXE firmware
- Verify the integrity of the supplied ME-TXE firmware
- Strip down the Intel ME/TXE firmware
- Add gigabit ethernet firmware
- Run coreboot in long (64-bit) mode
- Devices
- Display
- Framebuffer mode:
Linear “high-resolution” framebuffer - Show graphical bootsplash
- Maximum width in pixels:
1920 - Maximum heigh in pixels:
1080
- Framebuffer mode:
- Enable PCIe Clock Power Management
- Enable PCIe ASPM L1 SubState
- Add a video BIOS Table (VBT) binary to CBFS
- Display
- Generic Drivers
- PS/2 keyboard init
- Console
- Don't show any POST codes
- Payload
- Add a payload:
edk2 payload - Secondary Payloads
- Load coreinfo
- Load nvramcui
- Add a payload:
After, build coreboot:
make
If all works, you should be able to get the full rom under build/coreboot.rom. You can seperate the rom via:
dd if=coreboot.rom of=coreboot-bottom.bin bs=1M count=8
dd if=coreboot.rom of=coreboot-top.bin bs=1M skip=8
Flashing
You can follow the guides here to flash the chips:
- with a raspberry pi: https://github.com/merge/skulls/blob/master/x230/README.md (from section
Hardware Example: Raspberry Pi 3) - with a programmer: https://github.com/merge/skulls/blob/master/x230/README.md (from section
Hardware Example: CH341A based)