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[client] makefile: use $(CC) instead of assuming gcc
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1 changed files with 3 additions and 3 deletions
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@ -29,15 +29,15 @@ BUILD_OBJS = $(foreach obj,$(OBJS),$(BUILD)/$(obj))
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all: $(BIN)/$(BINARY) $(BIN)/xlib-shim.so
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$(BIN)/xlib-shim.so:
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gcc -fPIC $(CFLAGS) -shared -o $@ xlib-shim.c
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$(CC) -fPIC $(CFLAGS) -shared -o $@ xlib-shim.c
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$(BUILD)/%.o: %.c
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@mkdir -p $(dir $@)
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gcc -c $(CFLAGS) -o $@ $<
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$(CC) -c $(CFLAGS) -o $@ $<
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$(BIN)/$(BINARY): $(BUILD_OBJS)
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@mkdir -p $(dir $@)
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gcc -o $@ $(BUILD_OBJS) $(LDFLAGS)
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$(CC) -o $@ $(BUILD_OBJS) $(LDFLAGS)
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clean:
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rm -rf $(BUILD) $(BIN)
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