chore: bump chromium to 95.0.4612.5 (main) (#30503)

* chore: bump chromium in DEPS to 94.0.4604.0 * build: 3-way merge of chromium patches * chore: bump chromium in DEPS to 94.0.4605.0 * build: 3-way merge of chromium patches * 3076040: Reland Remove delete_children RemoveAllChildViews arg Ref: 3076040 * 3069287: Remove the remaining uses and delete the deprecated API Ref: 3069287 * 2297212: Replace RemoveWithoutPathExpansion(.*, nullptr) with Value::RemoveKey() Refs: 2297212 Also: 3060296 * 3082756: Change transport_security_persister_path param to be a path to a file. Refs: 3082756 > this CL intentionally changes the name of the parameter > in the network context parameters and the order of the constructor > parameters to ensure all callers update their code to pass a full > file path rather than a path to a directory. The 'path' in this diff is already an absolute path, coming from `CHECK(base::PathService::Get(chrome::DIR_USER_DATA, &path_));` at 08ff1c2cbf/shell/browser/electron_browser_context.cc (L126) * iwyu: network::mojom::HttpRawHeaderPair * fixup! 3076040: Reland Remove delete_children RemoveAllChildViews arg Missed one. * 2999884: CodeHealth: Remove DictionaryValue::GetStringWithoutPathExpansion Refs: 2999884 (example of replacing GetStringWithoutPathExpansion() w/FindStringKey()) Also: 3060296 (removal of DictionaryValue::GetStringWithoutPathExpansion) * 3059260: Remove kSameSiteByDefaultCookies and kCookiesWithoutSameSiteMustBeSecure Refs: 3059260 We had both of these in a 'disable_features' list. Since these feature have been removed upstream, remove them from our disable list, too. IMPORTANT: this commit should not be backported to older branches that still have these features, because doing so would un-disable them. * 2920890: Load reroute_info from download in-progress and history db back into DownloadItem. Refs: 2920890 * 3039323: [Clipboard API] Clipboard Custom Formats implementation Part 5. Refs: 3039323 * chore: bump chromium in DEPS to 94.0.4606.0 * 3084502: Add a new PrintRasterizePdfDpi policy. Refs: 3084502 * chore: update patches * chore: bump chromium in DEPS to 94.0.4606.3 * chore: bump chromium in DEPS to 95.0.4608.0 * chore: bump chromium in DEPS to 95.0.4609.0 * [DevTools] Remove report_raw_headers from network::ResourceRequest 2856099 * Remove content::WebContentsObserver::OnInterfaceRequestFromFrame 3092665 * Disable kDesktopCaptureMacV2 3069272 * Add a new PrintRasterizePdfDpi policy. 3084502 * chore: update patches * chore: bump chromium in DEPS to 95.0.4609.3 * disable `use_lld` for macos * chore: update patches * Linux: use chrome_crashpad_handler instead of crashpad_handler 3054290 * chore: fix lint * Revert "[DevTools] Remove report_raw_headers from network::ResourceRequest" This reverts commit 28f4da1582d046e96cb58f3cbb590503e89dfd0d. * [DevTools] Remove report_raw_headers from network::ResourceRequest (Attempt #2) 2856099 * DCHECK that predictor always has a non-empty NetworkIsolationKey. 3067698 * Remove --no-untrusted-code-mitigations from //content and //gin 3096585 * fixup! Remove kSameSiteByDefaultCookies and kCookiesWithoutSameSiteMustBeSecure 3059260 * fixup! Remove kSameSiteByDefaultCookies and kCookiesWithoutSameSiteMustBeSecure * Convert PrintManager to RenderFrameHostReceiverSet. 3072019 * chore: bump chromium in DEPS to 95.0.4612.5 * chore: disable v8 oilpan * [Compiler] Remove untrusted code mitigations. 3045704 * Remove most FTP logic from services/network. 3076119 * Rename scale_factor.h -> resource_scale_factor.h 3057113 * [GURL -> SiteForCookies] extensions/ 3100825 * breadcrumbs: add desktop entry point 3021746 * Move args_ to private in ExtensionFunction 3076261 * chore: iwyu * fixup! Remove kSameSiteByDefaultCookies and kCookiesWithoutSameSiteMustBeSecure * Disable kDesktopCaptureMacV2 3069272 * fixup! [Compiler] Remove untrusted code mitigations. * fixup! Disable kDesktopCaptureMacV2 * Revert "chore: disable v8 oilpan" This reverts commit 5d255cf1d8e8efbb906047937a713279e5f800d0. * Reland "chore: disable v8 oilpan" This reverts commit 1c252765b07a205560e7b5eed06de2605336e2d8. The previous revert was to test on which platforms did the heapsnapshot test actually fail. * [Clipboard API] Clipboard Custom Formats implementation Part 5. 3039323 * Convert ExtensionFrameHost to RenderFrameHostReceiverSet. 3063358 * Convert PDFWebContentsHelper to RenderFrameHostReceiverSet. 3049751 * [Underscore Migration] Migrate ui/legacy 3093160 * chore: remove unknown permission error * chore: fix lint * chore: ignore -Wunreachable-code-return for node deps/ * fixup! chore: ignore -Wunreachable-code-return for node deps/ * fix: windows build * fix: build dependency Dependency was missed in cbeae20438 * 3108669: arm,dsp: Fix 8bpp Dct64_NEON(). 3108669 * chore: revert libgav1 roll * Revert "3108669: arm,dsp: Fix 8bpp Dct64_NEON()." This reverts commit 7ed31323127aac8ba2eaff9cae6c9be9a4954f33. * Revert "chore: revert libgav1 roll" This reverts commit 084a490d298811267316c786762fe7aa91b6318d. * chore: revert clang roll * chore: Fix -Wunreachable-code-aggressive warnings in arm and arm64 code Co-authored-by: electron-roller[bot] <84116207+electron-roller[bot]@users.noreply.github.com> Co-authored-by: Charles Kerr <charles@charleskerr.com> Co-authored-by: deepak1556 <hop2deep@gmail.com> Co-authored-by: mlaurencin <mlaurencin@electronjs.org> Co-authored-by: John Kleinschmidt <jkleinsc@electronjs.org>
2021-08-23 20:52:17 -04:00 · 2021-08-23 20:52:17 -04:00 · 5513e66982
commit 5513e66982
parent 10c4931477
109 changed files with 1322 additions and 477 deletions
--- a/patches/v8/.patches
+++ b/patches/v8/.patches
@ -6,3 +6,4 @@ workaround_an_undefined_symbol_error.patch
 do_not_export_private_v8_symbols_on_windows.patch
 fix_build_deprecated_attirbute_for_older_msvc_versions.patch
 fix_disable_implies_dcheck_for_node_stream_array_buffers.patch
+fix_-wunreachable-code-aggressive_warnings_in_arm_and_arm64_code.patch
--- a/patches/v8/build_gn.patch
+++ b/patches/v8/build_gn.patch
@ -9,10 +9,10 @@ necessary for native modules to load.
 Also, some fixes relating to mksnapshot on ARM.

 diff --git a/BUILD.gn b/BUILD.gn
-index 358013a17c26a4e63a1d958915289c4e3fe92d72..d4a83c171a74a52b5f2448623ce3fc17b281a0cd 100644
+index a68f7e924d6388fe24a1c3da032e629e3f140a04..e837fce5b0826a506a6835716f4a303c4a01252e 100644
 --- a/BUILD.gn
 +++ b/BUILD.gn
-@@ -545,7 +545,7 @@ config("internal_config") {
+@@ -559,7 +559,7 @@ config("internal_config") {
     ":cppgc_header_features",
   ]
 
@ -21,7 +21,7 @@ index 358013a17c26a4e63a1d958915289c4e3fe92d72..d4a83c171a74a52b5f2448623ce3fc17
     defines += [ "BUILDING_V8_SHARED" ]
   }
 
-@@ -5348,7 +5348,7 @@ if (current_toolchain == v8_generator_toolchain) {
+@@ -5394,7 +5394,7 @@ if (current_toolchain == v8_generator_toolchain) {
       "src/interpreter/bytecodes.h",
     ]
 
@ -30,7 +30,7 @@ index 358013a17c26a4e63a1d958915289c4e3fe92d72..d4a83c171a74a52b5f2448623ce3fc17
 
     deps = [
       ":v8_libbase",
-@@ -5386,6 +5386,8 @@ if (current_toolchain == v8_snapshot_toolchain) {
+@@ -5432,6 +5432,8 @@ if (current_toolchain == v8_snapshot_toolchain) {
 
     configs = [ ":internal_config" ]
 
--- a/patches/v8/dcheck.patch
+++ b/patches/v8/dcheck.patch
@ -6,10 +6,10 @@ Subject: dcheck.patch
 https://github.com/auchenberg/volkswagen

 diff --git a/src/api/api.cc b/src/api/api.cc
-index 10dde3c28ad116832b5d2e50bbd97b8b09177a46..3cb9398ba4b31f23c44e66f29dd8be50f525c98f 100644
+index 32e7a35c878dabc4f26791bd3fdcba11f3fd0d30..b31abc617b6fa5bcc06ac8bdd126b2f2f8b80d7d 100644
 --- a/src/api/api.cc
 +++ b/src/api/api.cc
-@@ -8791,7 +8791,7 @@ void Isolate::SetPromiseRejectCallback(PromiseRejectCallback callback) {
+@@ -8867,7 +8867,7 @@ void Isolate::SetPromiseRejectCallback(PromiseRejectCallback callback) {
 }
 
 void Isolate::PerformMicrotaskCheckpoint() {
@ -19,10 +19,10 @@ index 10dde3c28ad116832b5d2e50bbd97b8b09177a46..3cb9398ba4b31f23c44e66f29dd8be50
   isolate->default_microtask_queue()->PerformCheckpoint(this);
 }
 diff --git a/src/heap/heap.cc b/src/heap/heap.cc
-index 3ae0f4a3c5919c40683ea9ecb7918fd827b5583f..03257fc153372f1dbf834829c572791a77b3d75a 100644
+index 982b80bb89f765fb7be44ab2504a7c6ad066dbd3..9fd0f4f11ba85966f2477e3ae01a9eea6f8607ee 100644
 --- a/src/heap/heap.cc
 +++ b/src/heap/heap.cc
-@@ -6016,9 +6016,9 @@ void Heap::DeinitSharedSpaces() {
+@@ -6028,9 +6028,9 @@ void Heap::DeinitSharedSpaces() {
 void Heap::AddGCPrologueCallback(v8::Isolate::GCCallbackWithData callback,
                                  GCType gc_type, void* data) {
   DCHECK_NOT_NULL(callback);
--- a/patches/v8/do_not_export_private_v8_symbols_on_windows.patch
+++ b/patches/v8/do_not_export_private_v8_symbols_on_windows.patch
@ -12,10 +12,10 @@ This patch can be safely removed if, when it is removed, `node.lib` does not
 contain any standard C++ library exports (e.g. `std::ostringstream`).

 diff --git a/BUILD.gn b/BUILD.gn
-index 89f5fcfaebb994ea8d1da5a92904faadc8d1fd40..542f3fbe3b7c94f8739a46aba63b4fbb827932f3 100644
+index 232419e12f95f06f57557aa5104ec898d878f83b..ee01ffb3a49b1e5bf5b0da5448e09dedf3b73f03 100644
 --- a/BUILD.gn
 +++ b/BUILD.gn
-@@ -545,6 +545,10 @@ config("internal_config") {
+@@ -559,6 +559,10 @@ config("internal_config") {
     ":cppgc_header_features",
   ]
 
--- a/patches/v8/export_symbols_needed_for_windows_build.patch
+++ b/patches/v8/export_symbols_needed_for_windows_build.patch
@ -6,7 +6,7 @@ Subject: Export symbols needed for Windows build
 These symbols are required to build v8 with BUILD_V8_SHARED on Windows.

 diff --git a/src/objects/objects.h b/src/objects/objects.h
-index 9ca08df61248e287d21e6554a9a53e46134bf84f..ea9b9167f268d268d26c1fb3d5e910a8baf96c22 100644
+index eb31ec957d72ff4c6dee80b7798e27fadf048ccf..ad2502def9c04040a608a8d8e785750cd88f05fd 100644
 --- a/src/objects/objects.h
 +++ b/src/objects/objects.h
@@ -855,7 +855,7 @@ enum class KeyCollectionMode {
--- a/patches/v8/expose_mksnapshot.patch
+++ b/patches/v8/expose_mksnapshot.patch
@ -6,10 +6,10 @@ Subject: expose_mksnapshot.patch
 Needed in order to target mksnapshot for mksnapshot zip.

 diff --git a/BUILD.gn b/BUILD.gn
-index d4a83c171a74a52b5f2448623ce3fc17b281a0cd..89f5fcfaebb994ea8d1da5a92904faadc8d1fd40 100644
+index e837fce5b0826a506a6835716f4a303c4a01252e..232419e12f95f06f57557aa5104ec898d878f83b 100644
 --- a/BUILD.gn
 +++ b/BUILD.gn
-@@ -5360,7 +5360,6 @@ if (current_toolchain == v8_generator_toolchain) {
+@@ -5406,7 +5406,6 @@ if (current_toolchain == v8_generator_toolchain) {
 
 if (current_toolchain == v8_snapshot_toolchain) {
   v8_executable("mksnapshot") {
--- a/patches/v8/fix_-wunreachable-code-aggressive_warnings_in_arm_and_arm64_code.patch
+++ b/patches/v8/fix_-wunreachable-code-aggressive_warnings_in_arm_and_arm64_code.patch
@ -0,0 +1,700 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Nico Weber <thakis@chromium.org>
+Date: Wed, 18 Aug 2021 11:16:22 -0400
+Subject: Fix -Wunreachable-code-aggressive warnings in arm and arm64 code
+
+Like https://chromium-review.googlesource.com/c/v8/v8/+/2994804, but
+for arm and arm64.
+
+Bug: chromium:1066980
+Change-Id: I5f3ac0d64a5031a62d4923d55a89f1d4e88cbc8b
+Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3103905
+Auto-Submit: Nico Weber <thakis@chromium.org>
+Commit-Queue: Jakob Gruber <jgruber@chromium.org>
+Reviewed-by: Jakob Gruber <jgruber@chromium.org>
+Cr-Commit-Position: refs/heads/main@{#76374}
+(cherry picked from commit 6711342469c0ec4186bd2083eaec7cd288330cfa)
+
+diff --git a/src/diagnostics/arm/disasm-arm.cc b/src/diagnostics/arm/disasm-arm.cc
+index cf37d12a1f9a5587d3a057f876611526edfcfcd5..7ba20c0d98b79397135648646c014c05b392cb6b 100644
+--- a/src/diagnostics/arm/disasm-arm.cc
+++ b/src/diagnostics/arm/disasm-arm.cc
+@@ -676,7 +676,6 @@ int Decoder::FormatOption(Instruction* instr, const char* format) {
+         }
+         default: {
+           UNREACHABLE();
+-          return -1;
+         }
+       }
+       out_buffer_pos_ +=
+@@ -787,7 +786,6 @@ void Decoder::DecodeType01(Instruction* instr) {
+                 break;
+               default:
+                 UNREACHABLE();
+-                break;
+             }
+           } else {
+             // strex
+@@ -808,7 +806,6 @@ void Decoder::DecodeType01(Instruction* instr) {
+                 break;
+               default:
+                 UNREACHABLE();
+-                break;
+             }
+           }
+         } else {
+@@ -853,7 +850,6 @@ void Decoder::DecodeType01(Instruction* instr) {
+         default: {
+           // The PU field is a 2-bit field.
+           UNREACHABLE();
+-          break;
+         }
+       }
+     } else {
+@@ -894,7 +890,6 @@ void Decoder::DecodeType01(Instruction* instr) {
+         default: {
+           // The PU field is a 2-bit field.
+           UNREACHABLE();
+-          break;
+         }
+       }
+       return;
+@@ -1030,7 +1025,6 @@ void Decoder::DecodeType01(Instruction* instr) {
+       default: {
+         // The Opcode field is a 4-bit field.
+         UNREACHABLE();
+-        break;
+       }
+     }
+   }
+@@ -1107,10 +1101,8 @@ void Decoder::DecodeType3(Instruction* instr) {
+               break;
+             case 1:
+               UNREACHABLE();
+-              break;
+             case 2:
+               UNREACHABLE();
+-              break;
+             case 3:
+               Format(instr, "usat 'rd, #'imm05@16, 'rm'shift_sat");
+               break;
+@@ -1119,7 +1111,6 @@ void Decoder::DecodeType3(Instruction* instr) {
+           switch (instr->Bits(22, 21)) {
+             case 0:
+               UNREACHABLE();
+-              break;
+             case 1:
+               if (instr->Bits(9, 6) == 1) {
+                 if (instr->Bit(20) == 0) {
+@@ -1948,7 +1939,6 @@ void Decoder::DecodeFloatingPointDataProcessing(Instruction* instr) {
+         break;
+       default:
+         UNREACHABLE();  // Case analysis is exhaustive.
+-        break;
+     }
+   } else if (instr->Opc1Value() == 0x4 && op2) {
+     // Floating-point minNum/maxNum.
+@@ -2002,7 +1992,6 @@ void Decoder::DecodeFloatingPointDataProcessing(Instruction* instr) {
+         break;
+       default:
+         UNREACHABLE();  // Case analysis is exhaustive.
+-        break;
+     }
+   } else {
+     Unknown(instr);
+@@ -2617,12 +2606,10 @@ const char* NameConverter::NameOfCPURegister(int reg) const {
+ 
+ const char* NameConverter::NameOfByteCPURegister(int reg) const {
+   UNREACHABLE();  // ARM does not have the concept of a byte register
+-  return "nobytereg";
+ }
+ 
+ const char* NameConverter::NameOfXMMRegister(int reg) const {
+   UNREACHABLE();  // ARM does not have any XMM registers
+-  return "noxmmreg";
+ }
+ 
+ const char* NameConverter::NameInCode(byte* addr) const {
+diff --git a/src/diagnostics/arm/eh-frame-arm.cc b/src/diagnostics/arm/eh-frame-arm.cc
+index 7d0dc49155aec2bad9297f47a761181a41e7a71f..ef0a421820b1c6558770d0b2df79004e3bce0a1f 100644
+--- a/src/diagnostics/arm/eh-frame-arm.cc
+++ b/src/diagnostics/arm/eh-frame-arm.cc
+@@ -37,7 +37,6 @@ int EhFrameWriter::RegisterToDwarfCode(Register name) {
+       return kR0DwarfCode;
+     default:
+       UNIMPLEMENTED();
+-      return -1;
+   }
+ }
+ 
+@@ -54,7 +53,6 @@ const char* EhFrameDisassembler::DwarfRegisterCodeToString(int code) {
+       return "lr";
+     default:
+       UNIMPLEMENTED();
+-      return nullptr;
+   }
+ }
+ 
+diff --git a/src/diagnostics/arm64/disasm-arm64.cc b/src/diagnostics/arm64/disasm-arm64.cc
+index 93b9531bd5d5e6d7e7cef13a0158db6c90942f16..af6e7f5441e7f44d73acde8f705e453af42e9650 100644
+--- a/src/diagnostics/arm64/disasm-arm64.cc
+++ b/src/diagnostics/arm64/disasm-arm64.cc
+@@ -3954,7 +3954,6 @@ int DisassemblingDecoder::SubstituteImmediateField(Instruction* instr,
+         }
+         default: {
+           UNIMPLEMENTED();
+-          return 0;
+         }
+       }
+     }
+@@ -3997,7 +3996,6 @@ int DisassemblingDecoder::SubstituteImmediateField(Instruction* instr,
+             return 0;
+           }
+           UNIMPLEMENTED();
+-          return 0;
+         }
+         case 'L': {  // IVLSLane[0123] - suffix indicates access size shift.
+           AppendToOutput("%d", instr->NEONLSIndex(format[8] - '0'));
+@@ -4042,12 +4040,10 @@ int DisassemblingDecoder::SubstituteImmediateField(Instruction* instr,
+             return static_cast<int>(strlen("IVMIShiftAmt2"));
+           } else {
+             UNIMPLEMENTED();
+-            return 0;
+           }
+         }
+         default: {
+           UNIMPLEMENTED();
+-          return 0;
+         }
+       }
+     }
+@@ -4342,12 +4338,10 @@ const char* NameConverter::NameOfCPURegister(int reg) const {
+ 
+ const char* NameConverter::NameOfByteCPURegister(int reg) const {
+   UNREACHABLE();  // ARM64 does not have the concept of a byte register
+-  return "nobytereg";
+ }
+ 
+ const char* NameConverter::NameOfXMMRegister(int reg) const {
+   UNREACHABLE();  // ARM64 does not have any XMM registers
+-  return "noxmmreg";
+ }
+ 
+ const char* NameConverter::NameInCode(byte* addr) const {
+diff --git a/src/diagnostics/arm64/eh-frame-arm64.cc b/src/diagnostics/arm64/eh-frame-arm64.cc
+index 115d0cc300c87e25fae0a048b4c48a96562a1b91..2d198a9e35ae69d7fc00a37c37bf7e2bdf00473e 100644
+--- a/src/diagnostics/arm64/eh-frame-arm64.cc
+++ b/src/diagnostics/arm64/eh-frame-arm64.cc
+@@ -38,7 +38,6 @@ int EhFrameWriter::RegisterToDwarfCode(Register name) {
+       return kX0DwarfCode;
+     default:
+       UNIMPLEMENTED();
+-      return -1;
+   }
+ }
+ 
+diff --git a/src/execution/arm/simulator-arm.cc b/src/execution/arm/simulator-arm.cc
+index ec9c05af699e538123a0e4cd2cf27b4df4b8ed5d..310ddab523d0d8c279ba0ac822709431d78b4c2a 100644
+--- a/src/execution/arm/simulator-arm.cc
+++ b/src/execution/arm/simulator-arm.cc
+@@ -114,14 +114,10 @@ bool ArmDebugger::GetValue(const char* desc, int32_t* value) {
+   if (regnum != kNoRegister) {
+     *value = GetRegisterValue(regnum);
+     return true;
+-  } else {
+-    if (strncmp(desc, "0x", 2) == 0) {
+-      return SScanF(desc + 2, "%x", reinterpret_cast<uint32_t*>(value)) == 1;
+-    } else {
+-      return SScanF(desc, "%u", reinterpret_cast<uint32_t*>(value)) == 1;
+-    }
+   }
+-  return false;
+  if (strncmp(desc, "0x", 2) == 0)
+    return SScanF(desc + 2, "%x", reinterpret_cast<uint32_t*>(value)) == 1;
+  return SScanF(desc, "%u", reinterpret_cast<uint32_t*>(value)) == 1;
+ }
+ 
+ bool ArmDebugger::GetVFPSingleValue(const char* desc, float* value) {
+@@ -1192,7 +1188,6 @@ bool Simulator::ConditionallyExecute(Instruction* instr) {
+     default:
+       UNREACHABLE();
+   }
+-  return false;
+ }
+ 
+ // Calculate and set the Negative and Zero flags.
+@@ -1314,7 +1309,6 @@ int32_t Simulator::GetShiftRm(Instruction* instr, bool* carry_out) {
+     // by immediate
+     if ((shift == ROR) && (shift_amount == 0)) {
+       UNIMPLEMENTED();
+-      return result;
+     } else if (((shift == LSR) || (shift == ASR)) && (shift_amount == 0)) {
+       shift_amount = 32;
+     }
+@@ -1373,7 +1367,6 @@ int32_t Simulator::GetShiftRm(Instruction* instr, bool* carry_out) {
+ 
+       default: {
+         UNREACHABLE();
+-        break;
+       }
+     }
+   } else {
+@@ -1451,7 +1444,6 @@ int32_t Simulator::GetShiftRm(Instruction* instr, bool* carry_out) {
+ 
+       default: {
+         UNREACHABLE();
+-        break;
+       }
+     }
+   }
+@@ -1486,7 +1478,6 @@ int32_t Simulator::ProcessPU(Instruction* instr, int num_regs, int reg_size,
+   switch (instr->PUField()) {
+     case da_x: {
+       UNIMPLEMENTED();
+-      break;
+     }
+     case ia_x: {
+       *start_address = rn_val;
+@@ -1717,7 +1708,6 @@ void Simulator::SoftwareInterrupt(Instruction* instr) {
+               break;
+             default:
+               UNREACHABLE();
+-              break;
+           }
+           if (!stack_aligned) {
+             PrintF(" with unaligned stack %08x\n", get_register(sp));
+@@ -1769,7 +1759,6 @@ void Simulator::SoftwareInterrupt(Instruction* instr) {
+           }
+           default:
+             UNREACHABLE();
+-            break;
+         }
+         if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
+           switch (redirection->type()) {
+@@ -1783,7 +1772,6 @@ void Simulator::SoftwareInterrupt(Instruction* instr) {
+               break;
+             default:
+               UNREACHABLE();
+-              break;
+           }
+         }
+       } else if (redirection->type() == ExternalReference::DIRECT_API_CALL) {
+@@ -2121,7 +2109,6 @@ void Simulator::DecodeType01(Instruction* instr) {
+               }
+               default:
+                 UNREACHABLE();
+-                break;
+             }
+           } else {
+             // The instruction is documented as strex rd, rt, [rn], but the
+@@ -2165,7 +2152,6 @@ void Simulator::DecodeType01(Instruction* instr) {
+               }
+               default:
+                 UNREACHABLE();
+-                break;
+             }
+           }
+         } else {
+@@ -2219,7 +2205,6 @@ void Simulator::DecodeType01(Instruction* instr) {
+           default: {
+             // The PU field is a 2-bit field.
+             UNREACHABLE();
+-            break;
+           }
+         }
+       } else {
+@@ -2262,7 +2247,6 @@ void Simulator::DecodeType01(Instruction* instr) {
+           default: {
+             // The PU field is a 2-bit field.
+             UNREACHABLE();
+-            break;
+           }
+         }
+       }
+@@ -2600,7 +2584,6 @@ void Simulator::DecodeType01(Instruction* instr) {
+ 
+       default: {
+         UNREACHABLE();
+-        break;
+       }
+     }
+   }
+@@ -2680,7 +2663,6 @@ void Simulator::DecodeType3(Instruction* instr) {
+       DCHECK(!instr->HasW());
+       Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm");
+       UNIMPLEMENTED();
+-      break;
+     }
+     case ia_x: {
+       if (instr->Bit(4) == 0) {
+@@ -2714,10 +2696,8 @@ void Simulator::DecodeType3(Instruction* instr) {
+               break;
+             case 1:
+               UNIMPLEMENTED();
+-              break;
+             case 2:
+               UNIMPLEMENTED();
+-              break;
+             case 3: {
+               // Usat.
+               int32_t sat_pos = instr->Bits(20, 16);
+@@ -2746,7 +2726,6 @@ void Simulator::DecodeType3(Instruction* instr) {
+           switch (instr->Bits(22, 21)) {
+             case 0:
+               UNIMPLEMENTED();
+-              break;
+             case 1:
+               if (instr->Bits(9, 6) == 1) {
+                 if (instr->Bit(20) == 0) {
+@@ -3442,7 +3421,6 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
+           }
+           default:
+             UNREACHABLE();
+-            break;
+         }
+         set_neon_register(vd, q_data);
+       }
+@@ -4433,7 +4411,6 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+             }
+             default:
+               UNREACHABLE();
+-              break;
+           }
+           break;
+         }
+@@ -4469,13 +4446,11 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+             }
+             default:
+               UNREACHABLE();
+-              break;
+           }
+           break;
+         }
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (opc1 == 0 && (opc2 == 0b0100 || opc2 == 0b0101)) {
+       DCHECK_EQ(1, instr->Bit(6));  // Only support Q regs.
+@@ -4625,7 +4600,6 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+             break;
+           default:
+             UNIMPLEMENTED();
+-            break;
+         }
+       }
+     } else if (opc1 == 0b01 && (opc2 & 0b0111) == 0b111) {
+@@ -4654,7 +4628,6 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+             break;
+           default:
+             UNIMPLEMENTED();
+-            break;
+         }
+       }
+     } else if (opc1 == 0b10 && opc2 == 0b0001) {
+@@ -4674,7 +4647,6 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+             break;
+           default:
+             UNREACHABLE();
+-            break;
+         }
+       } else {
+         int Vd = instr->VFPDRegValue(kDoublePrecision);
+@@ -4692,7 +4664,6 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+             break;
+           default:
+             UNREACHABLE();
+-            break;
+         }
+       }
+     } else if (opc1 == 0b10 && (opc2 & 0b1110) == 0b0010) {
+@@ -4714,7 +4685,6 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+               break;
+             default:
+               UNREACHABLE();
+-              break;
+           }
+         } else {
+           // vuzp.<size> Qd, Qm.
+@@ -4730,7 +4700,6 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+               break;
+             default:
+               UNREACHABLE();
+-              break;
+           }
+         }
+       } else {
+@@ -4747,10 +4716,8 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+               break;
+             case Neon32:
+               UNIMPLEMENTED();
+-              break;
+             default:
+               UNREACHABLE();
+-              break;
+           }
+         } else {
+           // vuzp.<size> Dd, Dm.
+@@ -4763,10 +4730,8 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+               break;
+             case Neon32:
+               UNIMPLEMENTED();
+-              break;
+             default:
+               UNREACHABLE();
+-              break;
+           }
+         }
+       }
+@@ -4811,7 +4776,6 @@ void Simulator::DecodeAdvancedSIMDTwoOrThreeRegisters(Instruction* instr) {
+         }
+         case Neon64:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (opc1 == 0b10 && instr->Bit(10) == 1) {
+       // vrint<q>.<dt> <Dd>, <Dm>
+@@ -5078,7 +5042,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 1 && sz == 2 && q && op1) {
+       // vmov Qd, Qm.
+@@ -5134,7 +5097,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 3) {
+       // vcge/vcgt.s<size> Qd, Qm, Qn.
+@@ -5152,7 +5114,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 4 && !op1) {
+       // vshl s<size> Qd, Qm, Qn.
+@@ -5172,7 +5133,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 6) {
+       // vmin/vmax.s<size> Qd, Qm, Qn.
+@@ -5190,7 +5150,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 8 && op1) {
+       // vtst.i<size> Qd, Qm, Qn.
+@@ -5207,7 +5166,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 8 && !op1) {
+       // vadd.i<size> Qd, Qm, Qn.
+@@ -5241,7 +5199,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 0xA) {
+       // vpmin/vpmax.s<size> Dd, Dm, Dn.
+@@ -5259,7 +5216,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 0xB) {
+       // vpadd.i<size> Dd, Dm, Dn.
+@@ -5276,7 +5232,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (!u && opc == 0xD && !op1) {
+       float src1[4], src2[4];
+@@ -5347,7 +5302,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (u && opc == 1 && sz == 1 && op1) {
+       // vbsl.size Qd, Qm, Qn.
+@@ -5388,7 +5342,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (u && opc == 2 && op1) {
+       // vqsub.u<size> Qd, Qm, Qn.
+@@ -5405,7 +5358,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (u && opc == 3) {
+       // vcge/vcgt.u<size> Qd, Qm, Qn.
+@@ -5423,7 +5375,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (u && opc == 4 && !op1) {
+       // vshl u<size> Qd, Qm, Qn.
+@@ -5443,7 +5394,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (u && opc == 6) {
+       // vmin/vmax.u<size> Qd, Qm, Qn.
+@@ -5461,7 +5411,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (u && opc == 8 && !op1) {
+       // vsub.size Qd, Qm, Qn.
+@@ -5495,7 +5444,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (u && opc == 0xA) {
+       // vpmin/vpmax.u<size> Dd, Dm, Dn.
+@@ -5513,7 +5461,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+           break;
+         default:
+           UNREACHABLE();
+-          break;
+       }
+     } else if (u && opc == 0xD && sz == 0 && q && op1) {
+       // vmul.f32 Qd, Qn, Qm
+@@ -5658,7 +5605,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+               break;
+             default:
+               UNIMPLEMENTED();
+-              break;
+           }
+         } else {
+           // vmovl signed
+@@ -5677,7 +5623,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+               break;
+             default:
+               UNIMPLEMENTED();
+-              break;
+           }
+         }
+       } else if (!u && imm3H_L != 0 && opc == 0b0101) {
+@@ -5721,7 +5666,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+             break;
+           default:
+             UNREACHABLE();
+-            break;
+         }
+       } else if (u && imm3H_L != 0 && opc == 0b0101) {
+         // vsli.<size> Dd, Dm, shift
+@@ -5743,7 +5687,6 @@ void Simulator::DecodeAdvancedSIMDDataProcessing(Instruction* instr) {
+             break;
+           default:
+             UNREACHABLE();
+-            break;
+         }
+       }
+     }
+@@ -5807,7 +5750,6 @@ void Simulator::DecodeAdvancedSIMDLoadStoreMultipleStructures(
+       break;
+     default:
+       UNIMPLEMENTED();
+-      break;
+   }
+   if (instr->Bit(21)) {
+     // vld1
+@@ -5993,7 +5935,6 @@ void Simulator::DecodeFloatingPointDataProcessing(Instruction* instr) {
+               break;
+             default:
+               UNREACHABLE();  // Case analysis is exhaustive.
+-              break;
+           }
+           dd_value = canonicalizeNaN(dd_value);
+           set_d_register_from_double(vd, dd_value);
+@@ -6019,7 +5960,6 @@ void Simulator::DecodeFloatingPointDataProcessing(Instruction* instr) {
+               break;
+             default:
+               UNREACHABLE();  // Case analysis is exhaustive.
+-              break;
+           }
+           sd_value = canonicalizeNaN(sd_value);
+           set_s_register_from_float(d, sd_value);
+@@ -6111,7 +6051,6 @@ void Simulator::DecodeFloatingPointDataProcessing(Instruction* instr) {
+             break;
+           default:
+             UNREACHABLE();  // Case analysis is exhaustive.
+-            break;
+         }
+         if (instr->SzValue() == 0x1) {
+           int n = instr->VFPNRegValue(kDoublePrecision);
+@@ -6132,7 +6071,6 @@ void Simulator::DecodeFloatingPointDataProcessing(Instruction* instr) {
+       break;
+     default:
+       UNIMPLEMENTED();
+-      break;
+   }
+ }
+ 
+@@ -6201,7 +6139,6 @@ void Simulator::InstructionDecode(Instruction* instr) {
+       }
+       default: {
+         UNIMPLEMENTED();
+-        break;
+       }
+     }
+   }
+diff --git a/src/execution/arm64/simulator-arm64.cc b/src/execution/arm64/simulator-arm64.cc
+index 324bdd99a8d87c3e98b352dac99a1a8ccf8595ff..5669838006d3fd817275563a69f588d3b003598a 100644
+--- a/src/execution/arm64/simulator-arm64.cc
+++ b/src/execution/arm64/simulator-arm64.cc
+@@ -1517,7 +1517,6 @@ void Simulator::VisitPCRelAddressing(Instruction* instr) {
+       break;
+     case ADRP:  // Not implemented in the assembler.
+       UNIMPLEMENTED();
+-      break;
+     default:
+       UNREACHABLE();
+   }
+@@ -2212,7 +2211,6 @@ Simulator::TransactionSize Simulator::get_transaction_size(unsigned size) {
+     default:
+       UNREACHABLE();
+   }
+-  return TransactionSize::None;
+ }
+ 
+ void Simulator::VisitLoadStoreAcquireRelease(Instruction* instr) {
+@@ -5210,7 +5208,6 @@ void Simulator::VisitNEONScalar2RegMisc(Instruction* instr) {
+         break;
+       default:
+         UNIMPLEMENTED();
+-        break;
+     }
+   } else {
+     VectorFormat fpf = nfd.GetVectorFormat(nfd.FPScalarFormatMap());
--- a/patches/v8/fix_build_deprecated_attirbute_for_older_msvc_versions.patch
+++ b/patches/v8/fix_build_deprecated_attirbute_for_older_msvc_versions.patch
@ -9,10 +9,10 @@ higher versions, but native module compiling with this version
 will have an issue.

 diff --git a/include/v8config.h b/include/v8config.h
-index c1bb691f8789e5ab17ed9c8c4ad6ea2d51e72670..214101a990a1551b309aed7be19946896441cfa2 100644
+index b010b65dfd648bc01608befd886613a82dab2a05..fa740c2acde6134312aabfa0aae0c0093450bd48 100644
 --- a/include/v8config.h
 +++ b/include/v8config.h
-@@ -403,10 +403,13 @@ path. Add it with -I<path> to the command line
+@@ -448,10 +448,13 @@ path. Add it with -I<path> to the command line
 # define V8_NOINLINE /* NOT SUPPORTED */
 #endif
 
@ -28,7 +28,7 @@ index c1bb691f8789e5ab17ed9c8c4ad6ea2d51e72670..214101a990a1551b309aed7be1994689
 #else
 # define V8_DEPRECATED(message)
 #endif
-@@ -414,7 +417,11 @@ path. Add it with -I<path> to the command line
+@@ -459,7 +462,11 @@ path. Add it with -I<path> to the command line
 
 // A macro (V8_DEPRECATE_SOON) to make it easier to see what will be deprecated.
 #if defined(V8_IMMINENT_DEPRECATION_WARNINGS)
--- a/patches/v8/fix_disable_implies_dcheck_for_node_stream_array_buffers.patch
+++ b/patches/v8/fix_disable_implies_dcheck_for_node_stream_array_buffers.patch
@ -18,10 +18,10 @@ This patch can be removed when streams support rab/gsab, or
 when support is synchronized across both v8 and node.

 diff --git a/src/objects/js-array-buffer.cc b/src/objects/js-array-buffer.cc
-index 583297e20746bf1f63a8646745cb34dc2d841338..8004ffbd2803a0c5dff978e087edc70d34d41713 100644
+index bbe635ee2ad6d75cab64f1a93342347e8d10f550..0c903dca606cb28820202347dcbf642e56db3df9 100644
 --- a/src/objects/js-array-buffer.cc
 +++ b/src/objects/js-array-buffer.cc
-@@ -73,9 +73,9 @@ void JSArrayBuffer::Attach(std::shared_ptr<BackingStore> backing_store) {
+@@ -72,9 +72,9 @@ void JSArrayBuffer::Attach(std::shared_ptr<BackingStore> backing_store) {
   DCHECK_NOT_NULL(backing_store);
   DCHECK_EQ(is_shared(), backing_store->is_shared());
   DCHECK_EQ(is_resizable(), backing_store->is_resizable());
--- a/patches/v8/workaround_an_undefined_symbol_error.patch
+++ b/patches/v8/workaround_an_undefined_symbol_error.patch
@ -12,7 +12,7 @@ By moving some functions out of the the arm64-assembler header file,
 this error no longer seems to happen.

 diff --git a/src/codegen/arm64/assembler-arm64.cc b/src/codegen/arm64/assembler-arm64.cc
-index 248f2089a7726d0576d19c0d7869b30bd335c2e0..9d398555b3405b9b6abe3d7612ed2d54559a9c57 100644
+index f6a035a9e7737b26d325074605724a1e52037493..18ef63e33986da557253bb03022c511b8a856acf 100644
 --- a/src/codegen/arm64/assembler-arm64.cc
 +++ b/src/codegen/arm64/assembler-arm64.cc
@@ -3629,6 +3629,22 @@ void Assembler::MoveWide(const Register& rd, uint64_t imm, int shift,
@ -39,10 +39,10 @@ index 248f2089a7726d0576d19c0d7869b30bd335c2e0..9d398555b3405b9b6abe3d7612ed2d54
                        const Operand& operand, FlagsUpdate S, AddSubOp op) {
   DCHECK_EQ(rd.SizeInBits(), rn.SizeInBits());
 diff --git a/src/codegen/arm64/assembler-arm64.h b/src/codegen/arm64/assembler-arm64.h
-index d95417d78fac897a47f90436c681b83430ab5f22..922beeb14d9b5c588e1547b80de98fe5d52b6b2e 100644
+index 8cdca7bfa83ef7156c9fa8583d29661169132417..c482263e58b4e625724d37c0ab3ccbc405bee1c5 100644
 --- a/src/codegen/arm64/assembler-arm64.h
 +++ b/src/codegen/arm64/assembler-arm64.h
-@@ -2121,11 +2121,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
+@@ -2130,11 +2130,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
     return rm.code() << Rm_offset;
   }
 
@ -55,7 +55,7 @@ index d95417d78fac897a47f90436c681b83430ab5f22..922beeb14d9b5c588e1547b80de98fe5
 
   static Instr Ra(CPURegister ra) {
     DCHECK_NE(ra.code(), kSPRegInternalCode);
-@@ -2149,15 +2145,8 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
+@@ -2158,15 +2154,8 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
 
   // These encoding functions allow the stack pointer to be encoded, and
   // disallow the zero register.