168 lines
5.5 KiB
Diff
168 lines
5.5 KiB
Diff
From a67ab82a8f60f725b002034dff10f28c7e2ac88e Mon Sep 17 00:00:00 2001
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From: Peter Zijlstra <peterz@infradead.org>
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Date: Tue, 5 Dec 2017 13:34:47 +0100
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Subject: [PATCH 182/241] x86/mm: Create asm/invpcid.h
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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CVE-2017-5754
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Unclutter tlbflush.h a little.
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Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
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Cc: Andy Lutomirski <luto@kernel.org>
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Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
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Cc: Borislav Petkov <bp@alien8.de>
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Cc: Brian Gerst <brgerst@gmail.com>
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Cc: Dave Hansen <dave.hansen@linux.intel.com>
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Cc: David Laight <David.Laight@aculab.com>
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Cc: Denys Vlasenko <dvlasenk@redhat.com>
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Cc: Eduardo Valentin <eduval@amazon.com>
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Cc: Greg KH <gregkh@linuxfoundation.org>
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Cc: H. Peter Anvin <hpa@zytor.com>
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Cc: Josh Poimboeuf <jpoimboe@redhat.com>
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Cc: Juergen Gross <jgross@suse.com>
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Cc: Linus Torvalds <torvalds@linux-foundation.org>
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Cc: Peter Zijlstra <peterz@infradead.org>
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Cc: Thomas Gleixner <tglx@linutronix.de>
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Cc: Will Deacon <will.deacon@arm.com>
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Cc: aliguori@amazon.com
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Cc: daniel.gruss@iaik.tugraz.at
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Cc: hughd@google.com
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Cc: keescook@google.com
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Cc: linux-mm@kvack.org
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Signed-off-by: Ingo Molnar <mingo@kernel.org>
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(cherry picked from commit 1a3b0caeb77edeac5ce5fa05e6a61c474c9a9745)
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Signed-off-by: Andy Whitcroft <apw@canonical.com>
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Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
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(cherry picked from commit 5af02a8c43ce521f460891f6ba68af69428abe90)
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Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
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---
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arch/x86/include/asm/invpcid.h | 53 +++++++++++++++++++++++++++++++++++++++++
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arch/x86/include/asm/tlbflush.h | 49 +------------------------------------
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2 files changed, 54 insertions(+), 48 deletions(-)
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create mode 100644 arch/x86/include/asm/invpcid.h
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diff --git a/arch/x86/include/asm/invpcid.h b/arch/x86/include/asm/invpcid.h
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new file mode 100644
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index 000000000000..989cfa86de85
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--- /dev/null
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+++ b/arch/x86/include/asm/invpcid.h
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@@ -0,0 +1,53 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+#ifndef _ASM_X86_INVPCID
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+#define _ASM_X86_INVPCID
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+
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+static inline void __invpcid(unsigned long pcid, unsigned long addr,
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+ unsigned long type)
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+{
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+ struct { u64 d[2]; } desc = { { pcid, addr } };
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+
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+ /*
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+ * The memory clobber is because the whole point is to invalidate
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+ * stale TLB entries and, especially if we're flushing global
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+ * mappings, we don't want the compiler to reorder any subsequent
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+ * memory accesses before the TLB flush.
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+ *
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+ * The hex opcode is invpcid (%ecx), %eax in 32-bit mode and
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+ * invpcid (%rcx), %rax in long mode.
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+ */
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+ asm volatile (".byte 0x66, 0x0f, 0x38, 0x82, 0x01"
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+ : : "m" (desc), "a" (type), "c" (&desc) : "memory");
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+}
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+
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+#define INVPCID_TYPE_INDIV_ADDR 0
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+#define INVPCID_TYPE_SINGLE_CTXT 1
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+#define INVPCID_TYPE_ALL_INCL_GLOBAL 2
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+#define INVPCID_TYPE_ALL_NON_GLOBAL 3
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+
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+/* Flush all mappings for a given pcid and addr, not including globals. */
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+static inline void invpcid_flush_one(unsigned long pcid,
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+ unsigned long addr)
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+{
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+ __invpcid(pcid, addr, INVPCID_TYPE_INDIV_ADDR);
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+}
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+
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+/* Flush all mappings for a given PCID, not including globals. */
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+static inline void invpcid_flush_single_context(unsigned long pcid)
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+{
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+ __invpcid(pcid, 0, INVPCID_TYPE_SINGLE_CTXT);
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+}
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+
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+/* Flush all mappings, including globals, for all PCIDs. */
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+static inline void invpcid_flush_all(void)
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+{
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+ __invpcid(0, 0, INVPCID_TYPE_ALL_INCL_GLOBAL);
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+}
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+
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+/* Flush all mappings for all PCIDs except globals. */
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+static inline void invpcid_flush_all_nonglobals(void)
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+{
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+ __invpcid(0, 0, INVPCID_TYPE_ALL_NON_GLOBAL);
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+}
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+
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+#endif /* _ASM_X86_INVPCID */
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diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
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index ecd634f87e4e..503f87c30c15 100644
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--- a/arch/x86/include/asm/tlbflush.h
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+++ b/arch/x86/include/asm/tlbflush.h
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@@ -8,54 +8,7 @@
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#include <asm/cpufeature.h>
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#include <asm/special_insns.h>
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#include <asm/smp.h>
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-
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-static inline void __invpcid(unsigned long pcid, unsigned long addr,
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- unsigned long type)
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-{
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- struct { u64 d[2]; } desc = { { pcid, addr } };
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-
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- /*
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- * The memory clobber is because the whole point is to invalidate
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- * stale TLB entries and, especially if we're flushing global
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- * mappings, we don't want the compiler to reorder any subsequent
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- * memory accesses before the TLB flush.
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- *
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- * The hex opcode is invpcid (%ecx), %eax in 32-bit mode and
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- * invpcid (%rcx), %rax in long mode.
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- */
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- asm volatile (".byte 0x66, 0x0f, 0x38, 0x82, 0x01"
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- : : "m" (desc), "a" (type), "c" (&desc) : "memory");
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-}
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-
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-#define INVPCID_TYPE_INDIV_ADDR 0
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-#define INVPCID_TYPE_SINGLE_CTXT 1
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-#define INVPCID_TYPE_ALL_INCL_GLOBAL 2
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-#define INVPCID_TYPE_ALL_NON_GLOBAL 3
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-
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-/* Flush all mappings for a given pcid and addr, not including globals. */
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-static inline void invpcid_flush_one(unsigned long pcid,
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- unsigned long addr)
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-{
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- __invpcid(pcid, addr, INVPCID_TYPE_INDIV_ADDR);
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-}
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-
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-/* Flush all mappings for a given PCID, not including globals. */
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-static inline void invpcid_flush_single_context(unsigned long pcid)
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-{
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- __invpcid(pcid, 0, INVPCID_TYPE_SINGLE_CTXT);
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-}
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-
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-/* Flush all mappings, including globals, for all PCIDs. */
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-static inline void invpcid_flush_all(void)
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-{
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- __invpcid(0, 0, INVPCID_TYPE_ALL_INCL_GLOBAL);
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-}
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-
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-/* Flush all mappings for all PCIDs except globals. */
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-static inline void invpcid_flush_all_nonglobals(void)
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-{
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- __invpcid(0, 0, INVPCID_TYPE_ALL_NON_GLOBAL);
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-}
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+#include <asm/invpcid.h>
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static inline u64 inc_mm_tlb_gen(struct mm_struct *mm)
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{
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--
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2.14.2
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