108 lines
3.9 KiB
Diff
108 lines
3.9 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Thomas Gleixner <tglx@linutronix.de>
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Date: Mon, 4 Dec 2017 15:07:32 +0100
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Subject: [PATCH] x86/cpufeatures: Make CPU bugs sticky
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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CVE-2017-5754
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There is currently no way to force CPU bug bits like CPU feature bits. That
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makes it impossible to set a bug bit once at boot and have it stick for all
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upcoming CPUs.
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Extend the force set/clear arrays to handle bug bits as well.
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Reviewed-by: Borislav Petkov <bp@suse.de>
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Cc: Andy Lutomirski <luto@kernel.org>
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Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
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Cc: Borislav Petkov <bp@alien8.de>
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Cc: Borislav Petkov <bpetkov@suse.de>
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Cc: Brian Gerst <brgerst@gmail.com>
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Cc: Dave Hansen <dave.hansen@intel.com>
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Cc: Dave Hansen <dave.hansen@linux.intel.com>
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Cc: David Laight <David.Laight@aculab.com>
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Cc: Denys Vlasenko <dvlasenk@redhat.com>
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Cc: Eduardo Valentin <eduval@amazon.com>
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Cc: Greg KH <gregkh@linuxfoundation.org>
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Cc: H. Peter Anvin <hpa@zytor.com>
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Cc: Josh Poimboeuf <jpoimboe@redhat.com>
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Cc: Juergen Gross <jgross@suse.com>
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Cc: Linus Torvalds <torvalds@linux-foundation.org>
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Cc: Peter Zijlstra <peterz@infradead.org>
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Cc: Rik van Riel <riel@redhat.com>
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Cc: Will Deacon <will.deacon@arm.com>
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Cc: aliguori@amazon.com
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Cc: daniel.gruss@iaik.tugraz.at
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Cc: hughd@google.com
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Cc: keescook@google.com
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Link: https://lkml.kernel.org/r/20171204150606.992156574@linutronix.de
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Signed-off-by: Ingo Molnar <mingo@kernel.org>
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(cherry picked from commit 6cbd2171e89b13377261d15e64384df60ecb530e)
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Signed-off-by: Andy Whitcroft <apw@canonical.com>
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Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
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(cherry picked from commit aab40a666a40cd015ca4a53231bed544fc679dcb)
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Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
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---
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arch/x86/include/asm/cpufeature.h | 2 ++
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arch/x86/include/asm/processor.h | 4 ++--
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arch/x86/kernel/cpu/common.c | 6 +++---
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3 files changed, 7 insertions(+), 5 deletions(-)
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diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
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index 225fd8374fae..8b9915561ed1 100644
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--- a/arch/x86/include/asm/cpufeature.h
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+++ b/arch/x86/include/asm/cpufeature.h
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@@ -134,6 +134,8 @@ extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
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set_bit(bit, (unsigned long *)cpu_caps_set); \
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} while (0)
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+#define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
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+
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#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
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/*
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* Static testing of CPU features. Used the same as boot_cpu_has().
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diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
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index bccec7ed1676..59a317f8e0ec 100644
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--- a/arch/x86/include/asm/processor.h
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+++ b/arch/x86/include/asm/processor.h
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@@ -162,8 +162,8 @@ extern struct cpuinfo_x86 new_cpu_data;
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#include <linux/thread_info.h>
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extern struct x86_hw_tss doublefault_tss;
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-extern __u32 cpu_caps_cleared[NCAPINTS];
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-extern __u32 cpu_caps_set[NCAPINTS];
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+extern __u32 cpu_caps_cleared[NCAPINTS + NBUGINTS];
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+extern __u32 cpu_caps_set[NCAPINTS + NBUGINTS];
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#ifdef CONFIG_SMP
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DECLARE_PER_CPU_READ_MOSTLY(struct cpuinfo_x86, cpu_info);
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diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
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index 7992e5a8076c..fcdba90e0890 100644
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--- a/arch/x86/kernel/cpu/common.c
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+++ b/arch/x86/kernel/cpu/common.c
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@@ -452,8 +452,8 @@ static const char *table_lookup_model(struct cpuinfo_x86 *c)
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return NULL; /* Not found */
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}
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-__u32 cpu_caps_cleared[NCAPINTS];
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-__u32 cpu_caps_set[NCAPINTS];
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+__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS];
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+__u32 cpu_caps_set[NCAPINTS + NBUGINTS];
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void load_percpu_segment(int cpu)
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{
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@@ -812,7 +812,7 @@ static void apply_forced_caps(struct cpuinfo_x86 *c)
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{
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int i;
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- for (i = 0; i < NCAPINTS; i++) {
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+ for (i = 0; i < NCAPINTS + NBUGINTS; i++) {
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c->x86_capability[i] &= ~cpu_caps_cleared[i];
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c->x86_capability[i] |= cpu_caps_set[i];
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}
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--
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2.14.2
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