78 lines
2.8 KiB
Diff
78 lines
2.8 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Thomas Gleixner <tglx@linutronix.de>
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Date: Wed, 3 Jan 2018 19:52:04 +0100
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Subject: [PATCH] x86/pti: Switch to kernel CR3 at early in
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entry_SYSCALL_compat()
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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CVE-2017-5754
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The preparation for PTI which added CR3 switching to the entry code
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misplaced the CR3 switch in entry_SYSCALL_compat().
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With PTI enabled the entry code tries to access a per cpu variable after
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switching to kernel GS. This fails because that variable is not mapped to
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user space. This results in a double fault and in the worst case a kernel
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crash.
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Move the switch ahead of the access and clobber RSP which has been saved
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already.
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Fixes: 8a09317b895f ("x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switching")
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Reported-by: Lars Wendler <wendler.lars@web.de>
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Reported-by: Laura Abbott <labbott@redhat.com>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Cc: Borislav Betkov <bp@alien8.de>
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Cc: Andy Lutomirski <luto@kernel.org>,
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Cc: Dave Hansen <dave.hansen@linux.intel.com>,
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Cc: Peter Zijlstra <peterz@infradead.org>,
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Cc: Greg KH <gregkh@linuxfoundation.org>, ,
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Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>,
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Cc: Juergen Gross <jgross@suse.com>
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Cc: stable@vger.kernel.org
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Link: https://lkml.kernel.org/r/alpine.DEB.2.20.1801031949200.1957@nanos
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Signed-off-by: Andy Whitcroft <apw@canonical.com>
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Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
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(cherry picked from commit 2f45cd7a57da0a4d7f3a91a5f577c76b9ed9eb8a)
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Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
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---
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arch/x86/entry/entry_64_compat.S | 13 ++++++-------
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1 file changed, 6 insertions(+), 7 deletions(-)
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diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
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index 973527e34887..2b5e7685823c 100644
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--- a/arch/x86/entry/entry_64_compat.S
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+++ b/arch/x86/entry/entry_64_compat.S
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@@ -189,8 +189,13 @@ ENTRY(entry_SYSCALL_compat)
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/* Interrupts are off on entry. */
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swapgs
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- /* Stash user ESP and switch to the kernel stack. */
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+ /* Stash user ESP.*/
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movl %esp, %r8d
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+
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+ /* Use %rsp as scratch reg. User ESP is stashed in r8 */
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+ SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
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+
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+ /* Switch to the kernel stack */
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movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
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/* Construct struct pt_regs on stack */
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@@ -218,12 +223,6 @@ GLOBAL(entry_SYSCALL_compat_after_hwframe)
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pushq $0 /* pt_regs->r14 = 0 */
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pushq $0 /* pt_regs->r15 = 0 */
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- /*
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- * We just saved %rdi so it is safe to clobber. It is not
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- * preserved during the C calls inside TRACE_IRQS_OFF anyway.
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- */
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- SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
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-
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/*
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* User mode is traced as though IRQs are on, and SYSENTER
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* turned them off.
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--
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2.14.2
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