a599f53da3
(generated with debian/scripts/import-upstream-tag) Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
55 lines
1.9 KiB
Diff
55 lines
1.9 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Eduardo Habkost <ehabkost@redhat.com>
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Date: Mon, 17 Dec 2018 22:34:18 -0200
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Subject: [PATCH] kvm: x86: Add AMD's EX_CFG to the list of ignored MSRs
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Some guests OSes (including Windows 10) write to MSR 0xc001102c
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on some cases (possibly while trying to apply a CPU errata).
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Make KVM ignore reads and writes to that MSR, so the guest won't
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crash.
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The MSR is documented as "Execution Unit Configuration (EX_CFG)",
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at AMD's "BIOS and Kernel Developer's Guide (BKDG) for AMD Family
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15h Models 00h-0Fh Processors".
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Cc: stable@vger.kernel.org
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Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
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---
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arch/x86/include/asm/msr-index.h | 1 +
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arch/x86/kvm/x86.c | 2 ++
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2 files changed, 3 insertions(+)
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diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
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index 7ca92f9b5eae..4eb78a908544 100644
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--- a/arch/x86/include/asm/msr-index.h
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+++ b/arch/x86/include/asm/msr-index.h
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@@ -382,6 +382,7 @@
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#define MSR_F15H_NB_PERF_CTR 0xc0010241
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#define MSR_F15H_PTSC 0xc0010280
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#define MSR_F15H_IC_CFG 0xc0011021
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+#define MSR_F15H_EX_CFG 0xc001102c
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/* Fam 10h MSRs */
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#define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
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diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
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index ac17f53812af..1154795459de 100644
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--- a/arch/x86/kvm/x86.c
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+++ b/arch/x86/kvm/x86.c
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@@ -2240,6 +2240,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_AMD64_PATCH_LOADER:
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case MSR_AMD64_BU_CFG2:
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case MSR_AMD64_DC_CFG:
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+ case MSR_F15H_EX_CFG:
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break;
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case MSR_IA32_UCODE_REV:
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@@ -2528,6 +2529,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_AMD64_BU_CFG2:
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case MSR_IA32_PERF_CTL:
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case MSR_AMD64_DC_CFG:
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+ case MSR_F15H_EX_CFG:
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msr_info->data = 0;
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break;
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case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
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