2018-01-06 14:13:39 +00:00
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From 5280fab9bb19e94b1ea5046dc1360f121ec64c0f Mon Sep 17 00:00:00 2001
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From: Rudolf Marek <r.marek@assembler.cz>
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Date: Tue, 28 Nov 2017 22:01:06 +0100
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2018-01-06 14:14:30 +00:00
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Subject: [PATCH 122/232] x86: Make X86_BUG_FXSAVE_LEAK detectable in CPUID on
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2018-01-06 14:13:39 +00:00
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AMD
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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CVE-2017-5754
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[ Note, this is a Git cherry-pick of the following commit:
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2b67799bdf25 ("x86: Make X86_BUG_FXSAVE_LEAK detectable in CPUID on AMD")
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... for easier x86 PTI code testing and back-porting. ]
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The latest AMD AMD64 Architecture Programmer's Manual
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adds a CPUID feature XSaveErPtr (CPUID_Fn80000008_EBX[2]).
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If this feature is set, the FXSAVE, XSAVE, FXSAVEOPT, XSAVEC, XSAVES
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/ FXRSTOR, XRSTOR, XRSTORS always save/restore error pointers,
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thus making the X86_BUG_FXSAVE_LEAK workaround obsolete on such CPUs.
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Signed-Off-By: Rudolf Marek <r.marek@assembler.cz>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Reviewed-by: Borislav Petkov <bp@suse.de>
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Tested-by: Borislav Petkov <bp@suse.de>
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Cc: Andy Lutomirski <luto@amacapital.net>
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Link: https://lkml.kernel.org/r/bdcebe90-62c5-1f05-083c-eba7f08b2540@assembler.cz
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Signed-off-by: Ingo Molnar <mingo@kernel.org>
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(cherry picked from commit f2dbad36c55e5d3a91dccbde6e8cae345fe5632f)
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Signed-off-by: Andy Whitcroft <apw@canonical.com>
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Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
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(cherry picked from commit 281b622113c66ba2de9b7725e1d232ea3c282114)
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Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
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---
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arch/x86/include/asm/cpufeatures.h | 1 +
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arch/x86/kernel/cpu/amd.c | 7 +++++--
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2 files changed, 6 insertions(+), 2 deletions(-)
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diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
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index 0ea630bb3e74..d57a174ec97c 100644
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--- a/arch/x86/include/asm/cpufeatures.h
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+++ b/arch/x86/include/asm/cpufeatures.h
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@@ -265,6 +265,7 @@
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/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
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#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
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#define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */
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+#define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* Always save/restore FP error pointers */
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/* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */
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#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */
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diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
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index 3b9e220621f8..2a5328cc03a6 100644
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--- a/arch/x86/kernel/cpu/amd.c
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+++ b/arch/x86/kernel/cpu/amd.c
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@@ -760,8 +760,11 @@ static void init_amd(struct cpuinfo_x86 *c)
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case 0x15: init_amd_bd(c); break;
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}
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- /* Enable workaround for FXSAVE leak */
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- if (c->x86 >= 6)
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+ /*
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+ * Enable workaround for FXSAVE leak on CPUs
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+ * without a XSaveErPtr feature
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+ */
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+ if ((c->x86 >= 6) && (!cpu_has(c, X86_FEATURE_XSAVEERPTR)))
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set_cpu_bug(c, X86_BUG_FXSAVE_LEAK);
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cpu_detect_cache_sizes(c);
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--
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2.14.2
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