ee06173ae7
Add a patch that ads the Samsung S5K5BAF CMOS image sensor and enables the associated MIPI CSI-2 receiver node. Also update to the latest stable kernel. [ci:skip-build] already built successfully in CI
93 lines
2.3 KiB
Diff
93 lines
2.3 KiB
Diff
From 0c13c224414a56f6112f915bdd866569975dab27 Mon Sep 17 00:00:00 2001
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From: Timon Baetz <timon.baetz@protonmail.com>
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Date: Fri, 26 Mar 2021 16:56:01 +0100
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Subject: [PATCH] ARM: dts: exynos: Add front camera support to I9100
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Add node for Samsung S5K5BAF CMOS image sensor and
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enable the associated MIPI CSI-2 receiver node.
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Signed-off-by: Timon Baetz <timon.baetz@protonmail.com>
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---
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v2: Rename node from s5k5bafx to image-sensor and use GPIO_ACTIVE_LOW
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arch/arm/boot/dts/exynos4210-i9100.dts | 52 ++++++++++++++++++++++++++
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1 file changed, 52 insertions(+)
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diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts
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index 228de6d8c9d1..f47b6eaf208f 100644
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--- a/arch/arm/boot/dts/exynos4210-i9100.dts
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+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
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@@ -147,6 +147,36 @@ battery@36 {
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};
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};
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+ i2c_s5k5baf: i2c-gpio-1 {
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+ compatible = "i2c-gpio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ sda-gpios = <&gpc1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ scl-gpios = <&gpc1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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+ i2c-gpio,delay-us = <2>;
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+
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+ image-sensor@2d {
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+ compatible = "samsung,s5k5baf";
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+ reg = <0x2d>;
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+ vdda-supply = <&cam_io_en_reg>;
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+ vddreg-supply = <&vt_core_15v_reg>;
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+ vddio-supply = <&vtcam_reg>;
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+ clocks = <&camera 0>;
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+ clock-names = "mclk";
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+ stbyn-gpios = <&gpl2 0 GPIO_ACTIVE_LOW>;
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+ rstn-gpios = <&gpl2 1 GPIO_ACTIVE_LOW>;
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+ clock-frequency = <24000000>;
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+
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+ port {
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+ s5k5bafx_ep: endpoint {
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+ remote-endpoint = <&csis1_ep>;
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+ data-lanes = <1>;
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+ };
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+ };
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+ };
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+ };
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+
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spi-3 {
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compatible = "spi-gpio";
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#address-cells = <1>;
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@@ -220,7 +250,11 @@ pmic_ap_clk: pmic-ap-clk {
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};
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&camera {
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+ pinctrl-0 = <&cam_port_a_clk_active>;
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+ pinctrl-names = "default";
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status = "okay";
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+ assigned-clocks = <&clock CLK_MOUT_CAM0>, <&clock CLK_MOUT_CAM1>;
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+ assigned-clock-parents = <&clock CLK_XUSBXTI>, <&clock CLK_XUSBXTI>;
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};
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&cpu0 {
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@@ -794,3 +828,21 @@ &serial_3 {
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&tmu {
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status = "okay";
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};
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+
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+&csis_1 {
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+ status = "okay";
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+ vddcore-supply = <&vusb_reg>;
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+ vddio-supply = <&vmipi_reg>;
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+ clock-frequency = <160000000>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ port@4 {
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+ reg = <4>;
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+ csis1_ep: endpoint {
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+ remote-endpoint = <&s5k5bafx_ep>;
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+ data-lanes = <1>;
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+ samsung,csis-hs-settle = <6>;
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+ };
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+ };
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+};
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--
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2.25.1
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