b795e65785
Include: smaeul: "all idle entry attempts will return PSCI_E_INVALID_PARAMS, and Linux isn't smart enough to stop trying without these patches: https://github.com/crust-firmware/arm-trusted-firmware/commits/d6ebf5dab2daab8" Extra patches custom to pinephone
85 lines
2.9 KiB
Diff
85 lines
2.9 KiB
Diff
From 3b6ea6c08a365ada6e70c9ccc724cd7eb8729d31 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Thu, 18 Mar 2021 23:15:28 -0500
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Subject: [PATCH 7/8] allwinner: Simplify CPU_SUSPEND power state encoding
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Use the encoding recommended by the PSCI specification: four bits for
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the power state at each power level.
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Since SCPI provides no way to handshake an exit from a standby state,
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the only possible standby state is the architectural WFI state. Since
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WFI can be used without PSCI, we do not allow passing in standby states.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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Change-Id: I4b3b84e5c255ee58a25255a0cab5d7623425086e
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---
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plat/allwinner/common/sunxi_scpi_pm.c | 36 ++++++++++++---------------
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1 file changed, 16 insertions(+), 20 deletions(-)
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diff --git a/plat/allwinner/common/sunxi_scpi_pm.c b/plat/allwinner/common/sunxi_scpi_pm.c
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index ed1363537..41dc56397 100644
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--- a/plat/allwinner/common/sunxi_scpi_pm.c
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+++ b/plat/allwinner/common/sunxi_scpi_pm.c
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@@ -33,6 +33,9 @@
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*/
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#define SCP_FIRMWARE_MAGIC 0xb4400012
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+#define PLAT_LOCAL_PSTATE_WIDTH U(4)
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+#define PLAT_LOCAL_PSTATE_MASK ((U(1) << PLAT_LOCAL_PSTATE_WIDTH) - 1)
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+
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#define CPU_PWR_LVL MPIDR_AFFLVL0
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#define CLUSTER_PWR_LVL MPIDR_AFFLVL1
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#define SYSTEM_PWR_LVL MPIDR_AFFLVL2
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@@ -126,7 +129,9 @@ static int sunxi_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state)
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{
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unsigned int power_level = psci_get_pstate_pwrlvl(power_state);
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+ unsigned int state_id = psci_get_pstate_id(power_state);
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unsigned int type = psci_get_pstate_type(power_state);
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+ unsigned int i;
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assert(req_state != NULL);
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@@ -135,28 +140,19 @@ static int sunxi_validate_power_state(unsigned int power_state,
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}
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if (type == PSTATE_TYPE_STANDBY) {
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- /* Only one retention power state is supported. */
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- if (psci_get_pstate_id(power_state) > 0) {
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- return PSCI_E_INVALID_PARAMS;
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- }
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- /* The SoC cannot be suspended without losing state */
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- if (power_level == SYSTEM_PWR_LVL) {
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- return PSCI_E_INVALID_PARAMS;
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- }
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- for (unsigned int i = 0; i <= power_level; ++i) {
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- req_state->pwr_domain_state[i] = PLAT_MAX_RET_STATE;
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- }
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- } else {
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- /* Only one off power state is supported. */
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- if (psci_get_pstate_id(power_state) > 0) {
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- return PSCI_E_INVALID_PARAMS;
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- }
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- for (unsigned int i = 0; i <= power_level; ++i) {
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- req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
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- }
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+ return PSCI_E_INVALID_PARAMS;
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+ }
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+
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+ /* Pass through the requested PSCI state as-is. */
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+ for (i = 0; i <= power_level; ++i) {
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+ unsigned int local_pstate = state_id & PLAT_LOCAL_PSTATE_MASK;
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+
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+ req_state->pwr_domain_state[i] = local_pstate;
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+ state_id >>= PLAT_LOCAL_PSTATE_WIDTH;
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}
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+
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/* Higher power domain levels should all remain running */
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- for (unsigned int i = power_level + 1; i <= PLAT_MAX_PWR_LVL; ++i) {
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+ for (; i <= PLAT_MAX_PWR_LVL; ++i) {
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req_state->pwr_domain_state[i] = PSCI_LOCAL_STATE_RUN;
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}
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--
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2.31.1
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