6340875eb2
disable CONFIG_NET_VENDOR_MICROSOFT aarch64 & armv7 enable CONFIG_SND_SUN9I_HDMI_AUDIO aarch64 [ci:skip-build] already built successfully in CI
38 lines
1.3 KiB
Diff
38 lines
1.3 KiB
Diff
From 4d38ab8df68f04cc87eeba065c3d35df71c280e4 Mon Sep 17 00:00:00 2001
|
|
From: Jernej Skrabec <jernej.skrabec@siol.net>
|
|
Date: Sat, 24 Aug 2019 01:36:44 +0200
|
|
Subject: [PATCH] eMMC workaround
|
|
|
|
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
|
|
---
|
|
drivers/mmc/host/sunxi-mmc.c | 8 +++++---
|
|
1 file changed, 5 insertions(+), 3 deletions(-)
|
|
|
|
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
|
|
index d577a6b0ceae..067d217bde42 100644
|
|
--- a/drivers/mmc/host/sunxi-mmc.c
|
|
+++ b/drivers/mmc/host/sunxi-mmc.c
|
|
@@ -1394,15 +1394,17 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
|
|
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
|
|
|
|
/*
|
|
- * Some H5 devices do not have signal traces precise enough to
|
|
- * use HS DDR mode for their eMMC chips.
|
|
+ * Some H5 and H6 devices do not have signal traces precise
|
|
+ * enough to use HS DDR mode for their eMMC chips.
|
|
*
|
|
* We still enable HS DDR modes for all the other controller
|
|
* variants that support them.
|
|
*/
|
|
if ((host->cfg->clk_delays || host->use_new_timings) &&
|
|
!of_device_is_compatible(pdev->dev.of_node,
|
|
- "allwinner,sun50i-h5-emmc"))
|
|
+ "allwinner,sun50i-h5-emmc") &&
|
|
+ !of_device_is_compatible(pdev->dev.of_node,
|
|
+ "allwinner,sun50i-h6-emmc"))
|
|
mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
|
|
|
|
ret = mmc_of_parse(mmc);
|
|
--
|
|
2.23.0
|
|
|