pmaports/temp/u-boot-pinephone/0006-sunxi-Load-sun8i-secure-monitor-to-SRAM-A2.patch
Bobby The Builder df2330892b
temp/u-boot-pinephone: upgrade to v2021.10 (MR 2648)
[ci:skip-build] already built successfully in CI
2021-11-07 19:37:00 -08:00

39 lines
1.4 KiB
Diff

From 40b65e95cfebc9d9af61d3c47562cdeb6b2a1302 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sat, 17 Apr 2021 10:43:58 -0500
Subject: [PATCH 06/10] sunxi: Load sun8i secure monitor to SRAM A2
Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T).
On sun8i SoCs which do not have SRAM B, we can use part of this SRAM for
the secure monitor. Follow the design of 64-bit SoCs and use the first
part for the monitor, and the last 16 KiB for the SCP firmware. With
this change, the monitor no longer needs to reserve a region in DRAM.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
include/configs/sun8i.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index 27c9808a49..3466c75e28 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -22,6 +22,13 @@
#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024)
#endif
+/*
+ * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes
+ * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware.
+ */
+#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024)
+#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024)
+
/*
* Include common sunxi configuration where most the settings are
*/
--
2.31.1