31 lines
1.2 KiB
Diff
31 lines
1.2 KiB
Diff
From dc7ee68b96518fa01deead155b2ba2ce8cd87634 Mon Sep 17 00:00:00 2001
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From: Steven Noonan <steven@uplinklabs.net>
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Date: Wed, 17 Nov 2021 19:42:32 -0800
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Subject: [PATCH 14/21] x86: don't check for random warps if using direct sync
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There's some overhead in writing/reading MSR_IA32_TSC. We try to account
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for it, but sometimes it under or over estimates the overhead, and we retry
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syncing, and it sees the clock "go backwards".
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Signed-off-by: Steven Noonan <steven@uplinklabs.net>
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Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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---
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arch/x86/kernel/tsc_sync.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
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index 5a553feaef76..2a09a55136f4 100644
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--- a/arch/x86/kernel/tsc_sync.c
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+++ b/arch/x86/kernel/tsc_sync.c
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@@ -400,7 +400,7 @@ static void check_tsc_sync_source(void *__cpu)
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pr_debug("TSC synchronization [CPU#%d -> CPU#%u]: passed\n",
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smp_processor_id(), cpu);
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- } else if (atomic_dec_and_test(&test_runs) || random_warps) {
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+ } else if (atomic_dec_and_test(&test_runs) || (random_warps && !tsc_allow_direct_sync)) {
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/* Force it to 0 if random warps brought us here */
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atomic_set(&test_runs, 0);
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--
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2.44.0
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