pmaports/device/main/linux-postmarketos-allwinner/0011-sunxi-mmc-h6-fix.patch
Bobby The Builder a5b16897c1
linux-postmarketos-allwinner: upgrade to 5.17.4_git20220427 (MR 3097)
Disable options
-CONFIG_NET_VENDOR_ENGLEDER
-CONFIG_NET_VENDOR_VERTEXCOM
-CONFIG_SURFACE_PLATFORM

Enable options
+CONFIG_KEYBOARD_PINEPHONE

Note by ollieparanoid: this fixes the suspend to ram issue, pma 1478
[ci:skip-build]: already built successfully in CI
2022-05-01 23:38:22 +02:00

38 lines
1.3 KiB
Diff

From 3453110622f9f5ab3a602bd5e126f4a598d9b7c4 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sat, 24 Aug 2019 01:36:44 +0200
Subject: [PATCH] eMMC workaround
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
drivers/mmc/host/sunxi-mmc.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index 55ca34803a3f..962c948fef17 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1426,15 +1426,17 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
MMC_CAP_SDIO_IRQ;
/*
- * Some H5 devices do not have signal traces precise enough to
- * use HS DDR mode for their eMMC chips.
+ * Some H5 and H6 devices do not have signal traces precise
+ * enough to use HS DDR mode for their eMMC chips.
*
* We still enable HS DDR modes for all the other controller
* variants that support them.
*/
if ((host->cfg->clk_delays || host->use_new_timings) &&
!of_device_is_compatible(pdev->dev.of_node,
- "allwinner,sun50i-h5-emmc"))
+ "allwinner,sun50i-h5-emmc") &&
+ !of_device_is_compatible(pdev->dev.of_node,
+ "allwinner,sun50i-h6-emmc"))
mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
ret = mmc_of_parse(mmc);
--
2.33.0