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pmaports/device/linux-finepower-f1/03-replace-dts.patch
smd a4f38c41c0
finepower-f1: new device (Finepower F1) (!645) 
[ci:skip-build]: already built successfully in CI
2019-09-25 23:16:59 +02:00

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diff --git a/arch/arm/boot/dts/sprd-scx20_sp7731ceb.dts b/arch/arm/boot/dts/sprd-scx20_sp7731ceb.dts
index cd1bba2..7881ae6 100644
--- a/arch/arm/boot/dts/sprd-scx20_sp7731ceb.dts
+++ b/arch/arm/boot/dts/sprd-scx20_sp7731ceb.dts
@@ -1,79 +1,1772 @@
-/*
-* Copyright (C) 2013 Spreadtrum Communication Incorporated
-* http://www.spreadtrum.com/
-*
-* This program is free software; you can redistribute it and/or modify
-* it under the terms of the GNU General Public License version 2 as
-* published by the Free Software Foundation.
-*/
/dts-v1/;
-/* memory reserved for SMEM */
-/memreserve/ 0x87800000 0x200000; /* 2M */
+/memreserve/ 0x0000000087800000 0x0000000000200000;
+/memreserve/ 0x0000000088000000 0x0000000001b00000;
+/memreserve/ 0x000000008a800000 0x0000000000201000;
+/ {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ model = "Spreadtrum SP8835EB board";
+ compatible = "sprd,sp8835eb";
+ sprd,sc-id = <0x227e 0x1 0x20000>;
+ qcom,msm-id = <0x227e 0x1 0x20000>;
+ interrupt-parent = <0x1>;
+
+ chosen {
+ bootargs = "loglevel=1 console=ttyS1,115200n8 init=/init root=/dev/ram0 rw androidboot.hardware=F1 coherent_pool=32k";
+ linux,initrd-start = <0x85500000>;
+ linux,initrd-end = <0x855a3212>;
+ };
+
+ aliases {
+ serial0 = "/uart@70000000";
+ serial1 = "/uart@70100000";
+ serial2 = "/uart@70200000";
+ i2c0 = "/i2c@70500000";
+ i2c1 = "/i2c@70600000";
+ i2c2 = "/i2c@70700000";
+ i2c3 = "/i2c@70800000";
+ lcd0 = "/fb@20800000";
+ spi0 = "/spi@70a00000";
+ spi1 = "/spi@70b00000";
+ spi2 = "/spi@70c00000";
+ hwspinlock0 = "/hwspinlock0@20c00000";
+ hwspinlock1 = "/hwspinlock1@40060000";
+ };
+
+ memory {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>;
+ };
+
+ clocks {
+ compatible = "sprd,scx30g-clocks";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ ext_26m {
+ compatible = "sprd,fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <0x18cba80>;
+ clock-output-names = "ext_26m";
+ linux,phandle = <0x9>;
+ phandle = <0x9>;
+ };
+
+ ext_32k {
+ compatible = "sprd,fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "ext_32k";
+ linux,phandle = <0x12>;
+ phandle = <0x12>;
+ };
+
+ clk_mpll {
+ compatible = "sprd,adjustable-pll-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e3070 0x7ff 0x402b0094 0x1>;
+ clock-output-names = "clk_mpll";
+ linux,phandle = <0x3>;
+ phandle = <0x3>;
+ };
+
+ clk_dpll {
+ compatible = "sprd,adjustable-pll-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e3074 0x7ff 0x402b0098 0x1>;
+ clock-output-names = "clk_dpll";
+ linux,phandle = <0x4>;
+ phandle = <0x4>;
+ };
+
+ clk_tdpll {
+ compatible = "sprd,adjustable-pll-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e3078 0x7ff 0x402b009c 0x1>;
+ clock-output-names = "clk_tdpll";
+ linux,phandle = <0x7>;
+ phandle = <0x7>;
+ };
+
+ clk_wpll {
+ compatible = "sprd,adjustable-pll-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e301c 0x7ff 0x402b00a0 0x1>;
+ clock-output-names = "clk_wpll";
+ linux,phandle = <0x2>;
+ phandle = <0x2>;
+ };
+
+ clk_cpll {
+ compatible = "sprd,adjustable-pll-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e307c 0x7ff 0x402b00a4 0x1>;
+ clock-output-names = "clk_cpll";
+ linux,phandle = <0x6>;
+ phandle = <0x6>;
+ };
+
+ clk_wifipll {
+ compatible = "sprd,adjustable-pll-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e3080 0x7ff 0x402b00a8 0x1>;
+ clock-output-names = "clk_wifipll";
+ linux,phandle = <0x5>;
+ phandle = <0x5>;
+ };
+
+ clk_460m8 {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x2>;
+ clocks = <0x2>;
+ clock-output-names = "clk_460m8";
+ linux,phandle = <0x21>;
+ phandle = <0x21>;
+ };
+
+ clk_300m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x3>;
+ clocks = <0x3>;
+ clock-output-names = "clk_300m";
+ };
+
+ clk_37m5 {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x18>;
+ clocks = <0x3>;
+ clock-output-names = "clk_37m5";
+ linux,phandle = <0x16>;
+ phandle = <0x16>;
+ };
+
+ clk_66m_d {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x8>;
+ clocks = <0x4>;
+ clock-output-names = "clk_66m_d";
+ };
+
+ clk_51m2_w {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x12>;
+ clocks = <0x2>;
+ clock-output-names = "clk_51m2_w";
+ linux,phandle = <0x15>;
+ phandle = <0x15>;
+ };
+
+ clk_40m_wf1 {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x16>;
+ clocks = <0x5>;
+ clock-output-names = "clk_40m_wf1";
+ linux,phandle = <0x17>;
+ phandle = <0x17>;
+ };
+
+ clk_312m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x2>;
+ clocks = <0x6>;
+ clock-output-names = "clk_312m";
+ linux,phandle = <0x1c>;
+ phandle = <0x1c>;
+ };
+
+ clk_208m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x3>;
+ clocks = <0x6>;
+ clock-output-names = "clk_208m";
+ linux,phandle = <0x20>;
+ phandle = <0x20>;
+ };
+
+ clk_104m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x6>;
+ clocks = <0x6>;
+ clock-output-names = "clk_104m";
+ };
+
+ clk_52m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0xc>;
+ clocks = <0x6>;
+ clock-output-names = "clk_52m";
+ linux,phandle = <0x14>;
+ phandle = <0x14>;
+ };
+
+ clk_768m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x2>;
+ clocks = <0x7>;
+ clock-output-names = "clk_768m";
+ linux,phandle = <0x8>;
+ phandle = <0x8>;
+ };
+
+ clk_512m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x3>;
+ clocks = <0x7>;
+ clock-output-names = "clk_512m";
+ linux,phandle = <0x22>;
+ phandle = <0x22>;
+ };
+
+ clk_384m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x2>;
+ clocks = <0x8>;
+ clock-output-names = "clk_384m";
+ linux,phandle = <0x1d>;
+ phandle = <0x1d>;
+ };
+
+ clk_256m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x3>;
+ clocks = <0x8>;
+ clock-output-names = "clk_256m";
+ linux,phandle = <0x1b>;
+ phandle = <0x1b>;
+ };
+
+ clk_192m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x4>;
+ clocks = <0x8>;
+ clock-output-names = "clk_192m";
+ linux,phandle = <0x1a>;
+ phandle = <0x1a>;
+ };
+
+ clk_153m6 {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x5>;
+ clocks = <0x8>;
+ clock-output-names = "clk_153m6";
+ linux,phandle = <0xd>;
+ phandle = <0xd>;
+ };
+
+ clk_128m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x6>;
+ clocks = <0x8>;
+ clock-output-names = "clk_128m";
+ linux,phandle = <0xc>;
+ phandle = <0xc>;
+ };
+
+ clk_96m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x8>;
+ clocks = <0x8>;
+ clock-output-names = "clk_96m";
+ linux,phandle = <0xb>;
+ phandle = <0xb>;
+ };
+
+ clk_76m8 {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0xa>;
+ clocks = <0x8>;
+ clock-output-names = "clk_76m8";
+ linux,phandle = <0xe>;
+ phandle = <0xe>;
+ };
+
+ clk_64m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0xc>;
+ clocks = <0x8>;
+ clock-output-names = "clk_64m";
+ linux,phandle = <0x11>;
+ phandle = <0x11>;
+ };
+
+ clk_51m2 {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0xf>;
+ clocks = <0x8>;
+ clock-output-names = "clk_51m2";
+ linux,phandle = <0x10>;
+ phandle = <0x10>;
+ };
+
+ clk_48m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x10>;
+ clocks = <0x8>;
+ clock-output-names = "clk_48m";
+ linux,phandle = <0x13>;
+ phandle = <0x13>;
+ };
+
+ clk_38m4 {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x14>;
+ clocks = <0x8>;
+ clock-output-names = "clk_38m4";
+ linux,phandle = <0xf>;
+ phandle = <0xf>;
+ };
+
+ clk_24m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x20>;
+ clocks = <0x8>;
+ clock-output-names = "clk_24m";
+ linux,phandle = <0x1f>;
+ phandle = <0x1f>;
+ };
+
+ clk_12m {
+ compatible = "sprd,fixed-factor-clock";
+ #clock-cells = <0x0>;
+ clock-mult = <0x1>;
+ clock-div = <0x40>;
+ clocks = <0x8>;
+ clock-output-names = "clk_12m";
+ linux,phandle = <0x1e>;
+ phandle = <0x1e>;
+ };
+
+ clk_mcu {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x20d03000 0x7 0x20d03000 0x70>;
+ clocks = <0x9 0x4 0x6 0x8 0x5 0x2 0x3>;
+ clock-output-names = "clk_mcu";
+ linux,phandle = <0xa>;
+ phandle = <0xa>;
+ };
+
+ clk_ca7_axi {
+ compatible = "sprd,divider-clock";
+ #clock-cells = <0x0>;
+ reg = <0x20d03000 0x700>;
+ clocks = <0xa>;
+ clock-output-names = "clk_ca7_axi";
+ };
+
+ clk_ca7_dbg {
+ compatible = "sprd,divider-clock";
+ #clock-cells = <0x0>;
+ reg = <0x20d03000 0x70000 0x20d00014 0x100>;
+ clocks = <0xa>;
+ clock-output-names = "clk_ca7_dbg";
+ };
+
+ clk_emc {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0024 0x3 0x402d0024 0x300>;
+ clocks = <0x9 0x6 0x7 0x4>;
+ clock-output-names = "clk_emc";
+ };
+
+ clk_pub_ahb {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0020 0x3>;
+ clocks = <0x9 0xb 0xc 0xd>;
+ clock-output-names = "clk_pub_ahb";
+ };
+
+ clk_aon_apb {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0028 0x3 0x402d0028 0x300>;
+ clocks = <0x9 0xe 0xb 0xc>;
+ clock-output-names = "clk_aon_apb";
+ linux,phandle = <0x19>;
+ phandle = <0x19>;
+ };
+
+ clk_adi {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0034 0x3 0x402e0000 0x10000>;
+ clocks = <0x9 0xf 0x10 0x11>;
+ clock-output-names = "clk_adi";
+ };
+
+ clk_aux0 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e3020 0x7 0x402e3020 0xf0000 0x402e0004 0x4>;
+ clocks = <0x12 0x9 0x9 0x13 0x14 0x15 0x16 0x17>;
+ clock-output-names = "clk_aux0";
+ };
+
+ clk_aux1 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e3020 0x70 0x402e3020 0xf00000 0x402e0004 0x8>;
+ clocks = <0x12 0x9 0x9 0x13 0x14 0x15 0x16 0x17>;
+ clock-output-names = "clk_aux1";
+ };
+
+ clk_aux2 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e3020 0x700 0x402e3020 0xf000000 0x402e0004 0x10>;
+ clocks = <0x12 0x9 0x9 0x13 0x14 0x15 0x16 0x17>;
+ clock-output-names = "clk_aux2";
+ };
+
+ clk_probe {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e3020 0x7000 0x402e3020 0xf0000000 0x402e0004 0x20>;
+ clocks = <0x12 0x9 0x9 0x13 0x14 0x15 0x16 0x17>;
+ clock-output-names = "clk_probe";
+ };
+
+ clk_pwm0 {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0038 0x1 0x402e0000 0x10>;
+ clocks = <0x12 0x9>;
+ clock-output-names = "clk_pwm0";
+ };
+
+ clk_pwm1 {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d003c 0x1 0x402e0000 0x20>;
+ clocks = <0x12 0x9>;
+ clock-output-names = "clk_pwm1";
+ };
+
+ clk_pwm2 {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0040 0x1 0x402e0000 0x40>;
+ clocks = <0x12 0x9>;
+ clock-output-names = "clk_pwm2";
+ };
+
+ clk_pwm3 {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0044 0x1 0x402e0000 0x80>;
+ clocks = <0x12 0x9>;
+ clock-output-names = "clk_pwm3";
+ };
+
+ clk_thm {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0048 0x1 0x402e0004 0x2>;
+ clocks = <0x12 0x9>;
+ clock-output-names = "clk_thm";
+ };
+
+ clk_efuse {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0000 0x2000>;
+ clocks = <0x9>;
+ clock-output-names = "clk_efuse";
+ };
+
+ clk_mspi {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0054 0x3 0x402e0000 0x800000>;
+ clocks = <0x9 0x14 0xe 0xb>;
+ clock-output-names = "clk_mspi";
+ };
+
+ clk_i2c {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0058 0x3 0x402e0000 0x80000000>;
+ clocks = <0x9 0x13 0x10 0xd>;
+ clock-output-names = "clk_i2c";
+ };
+
+ clk_avs0 {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d005c 0x3 0x402e0000 0x40>;
+ clocks = <0x9 0x13 0x10 0xb>;
+ clock-output-names = "clk_avs0";
+ };
+
+ clk_avs1 {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0060 0x3 0x402e0000 0x80>;
+ clocks = <0x9 0x13 0x10 0xb>;
+ clock-output-names = "clk_avs1";
+ };
+
+ clk_aud {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0000 0x40000>;
+ clocks = <0x9>;
+ clock-output-names = "clk_aud";
+ };
+
+ clk_audif {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d002c 0x3 0x402e0000 0x20000>;
+ clocks = <0x9 0xf 0x10>;
+ clock-output-names = "clk_audif";
+ };
+
+ clk_vbc {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0000 0x80000>;
+ clocks = <0x9>;
+ clock-output-names = "clk_vbc";
+ };
+
+ clk_ca7_dap {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d004c 0x3 0x402e0000 0x40000000>;
+ clocks = <0x9 0xe 0xc 0xd>;
+ clock-output-names = "clk_ca7_dap";
+ };
+
+ clk_ca7_ts {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402d0050 0x3 0x402e0000 0x10000000>;
+ clocks = <0x12 0x9 0xc 0xd>;
+ clock-output-names = "clk_ca7_ts";
+ };
+
+ clk_fm_in {
+ compatible = "sprd,fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <0x3d09000>;
+ clock-output-names = "clk_fm_in";
+ linux,phandle = <0x18>;
+ phandle = <0x18>;
+ };
+
+ clk_fm {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0000 0x2>;
+ clocks = <0x18>;
+ clock-output-names = "clk_fm";
+ };
+
+ clk_disp_emc {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0004 0x800>;
+ clocks = <0x19>;
+ clock-output-names = "clk_disp_emc";
+ linux,phandle = <0x36>;
+ phandle = <0x36>;
+ };
+
+ clk_zip_emc {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0004 0x1000>;
+ clocks = <0x19>;
+ clock-output-names = "clk_zip_emc";
+ };
+
+ clk_gsp_emc {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0004 0x2000>;
+ clocks = <0x19>;
+ clock-output-names = "clk_gsp_emc";
+ linux,phandle = <0x41>;
+ phandle = <0x41>;
+ };
+
+ clk_ap_ahb {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200020 0x3>;
+ clocks = <0x9 0xe 0xc 0x1a>;
+ clock-output-names = "clk_ap_ahb";
+ };
+
+ clk_ap_apb {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200024 0x3>;
+ clocks = <0x9 0x11 0xb 0xc>;
+ clock-output-names = "clk_ap_apb";
+ };
+
+ clk_gsp {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200028 0x3 0x20d00000 0x8>;
+ clocks = <0xb 0xd 0x1a 0x1b>;
+ clock-output-names = "clk_gsp";
+ linux,phandle = <0x40>;
+ phandle = <0x40>;
+ };
+
+ clk_dispc0 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x7120002c 0x3 0x7120002c 0x700 0x20d00000 0x2>;
+ clocks = <0xd 0x1a 0x1b 0x1c>;
+ clock-output-names = "clk_dispc0";
+ linux,phandle = <0x33>;
+ phandle = <0x33>;
+ };
+
+ clk_dispc0_dbi {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200030 0x3 0x71200030 0x700 0x20d00000 0x2>;
+ clocks = <0xc 0xd 0x1a 0x1b>;
+ clock-output-names = "clk_dispc0_dbi";
+ linux,phandle = <0x34>;
+ phandle = <0x34>;
+ };
+
+ clk_dispc0_dpi {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200034 0x3 0x71200034 0xff00 0x20d00000 0x2>;
+ clocks = <0xc 0xd 0x1a 0x1d>;
+ clock-output-names = "clk_dispc0_dpi";
+ linux,phandle = <0x35>;
+ phandle = <0x35>;
+ };
+
+ clk_dispc1 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200038 0x3 0x71200038 0x700 0x20d00000 0x4>;
+ clocks = <0xd 0x1a 0x1b 0x1c>;
+ clock-output-names = "clk_dispc1";
+ };
+
+ clk_dispc1_dbi {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x7120003c 0x3 0x7120003c 0x700 0x20d00000 0x4>;
+ clocks = <0xc 0xd 0x1a 0x1b>;
+ clock-output-names = "clk_dispc1_dbi";
+ };
+
+ clk_dispc1_dpi {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200040 0x3 0x71200040 0xff00 0x20d00000 0x4>;
+ clocks = <0xc 0xd 0x1a 0x1d>;
+ clock-output-names = "clk_dispc1_dpi";
+ };
+
+ clk_nandc_ecc {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200044 0x1 0x20d00000 0x80000 0x20d00000 0x20000>;
+ clocks = <0xd 0x1a>;
+ clock-output-names = "clk_nandc_ecc";
+ };
+
+ clk_nandc_2x {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x20d03038 0x3 0x20d03038 0xc 0x20d00000 0xe0000>;
+ clocks = <0x9 0xd 0x1a 0x1b>;
+ clock-output-names = "clk_nandc_2x";
+ };
+
+ clk_sdio0 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200048 0x3 0x71200048 0x700 0x20d00000 0x100>;
+ clocks = <0x9 0x1b 0x1c 0x1a>;
+ clock-output-names = "clk_sdio0";
+ linux,phandle = <0x43>;
+ phandle = <0x43>;
+ };
+
+ clk_sdio1 {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x7120004c 0x3 0x20d00000 0x200>;
+ clocks = <0x13 0xe 0xb 0xc>;
+ clock-output-names = "clk_sdio1";
+ };
+
+ clk_sdio2 {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200050 0x3 0x20d00000 0x400>;
+ clocks = <0x13 0xe 0xb 0xc>;
+ clock-output-names = "clk_sdio2";
+ };
+
+ clk_emmc {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200054 0x3 0x20d00000 0x800>;
+ clocks = <0x9 0x1b 0x1c 0x1a>;
+ clock-output-names = "clk_emmc";
+ linux,phandle = <0x42>;
+ phandle = <0x42>;
+ };
+
+ clk_gps {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200058 0x1 0x20d00000 0x1000>;
+ clocks = <0x11 0xe>;
+ clock-output-names = "clk_gps";
+ };
+
+ clk_usb_ref {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200060 0x1 0x20d00000 0x10>;
+ clocks = <0x1e 0x1f>;
+ clock-output-names = "clk_usb_ref";
+ };
+
+ clk_uart0 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200064 0x3 0x71200064 0x700 0x71300000 0x2000>;
+ clocks = <0x9 0x13 0x10 0xb>;
+ clock-output-names = "clk_uart0";
+ };
+
+ clk_uart1 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200068 0x3 0x71200068 0x700 0x71300000 0x4000>;
+ clocks = <0x9 0x13 0x10 0xb>;
+ clock-output-names = "clk_uart1";
+ };
+
+ clk_uart2 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x7120006c 0x3 0x7120006c 0x700 0x71300000 0x8000>;
+ clocks = <0x9 0x13 0x10 0xb>;
+ clock-output-names = "clk_uart2";
+ };
+
+ clk_uart3 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200070 0x3 0x71200070 0x700 0x71300000 0x10000>;
+ clocks = <0x9 0x13 0x10 0xb>;
+ clock-output-names = "clk_uart3";
+ };
+
+ clk_uart4 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200074 0x3 0x71200074 0x700 0x71300000 0x20000>;
+ clocks = <0x9 0x13 0x10 0xb>;
+ clock-output-names = "clk_uart4";
+ };
+
+ clk_i2c0 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200078 0x3 0x71200078 0x700 0x71300000 0x100>;
+ clocks = <0x9 0x13 0x10 0xd>;
+ clock-output-names = "clk_i2c0";
+ };
+
+ clk_i2c1 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x7120007c 0x3 0x7120007c 0x700 0x71300000 0x200>;
+ clocks = <0x9 0x13 0x10 0xd>;
+ clock-output-names = "clk_i2c1";
+ };
+
+ clk_i2c2 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200080 0x3 0x71200080 0x700 0x71300000 0x400>;
+ clocks = <0x9 0x13 0x10 0xd>;
+ clock-output-names = "clk_i2c2";
+ };
+
+ clk_i2c3 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200084 0x3 0x71200084 0x700 0x71300000 0x800>;
+ clocks = <0x9 0x13 0x10 0xd>;
+ clock-output-names = "clk_i2c3";
+ };
+
+ clk_i2c4 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200088 0x3 0x71200088 0x700 0x71300000 0x1000>;
+ clocks = <0x9 0x13 0x10 0xd>;
+ clock-output-names = "clk_i2c4";
+ };
+
+ clk_spi0 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x7120008c 0x3 0x7120008c 0x700 0x71300000 0x20>;
+ clocks = <0x9 0xb 0xd 0x1a>;
+ clock-output-names = "clk_spi0";
+ };
+
+ clk_spi1 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200090 0x3 0x71200090 0x700 0x71300000 0x40>;
+ clocks = <0x9 0xb 0xd 0x1a>;
+ clock-output-names = "clk_spi1";
+ };
+
+ clk_spi2 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200094 0x3 0x71200094 0x700 0x71300000 0x80>;
+ clocks = <0x9 0xb 0xd 0x1a>;
+ clock-output-names = "clk_spi2";
+ linux,phandle = <0x37>;
+ phandle = <0x37>;
+ };
+
+ clk_iis0 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x71200098 0x3 0x71200098 0x700 0x71300000 0x2>;
+ clocks = <0x9 0xc 0xd>;
+ clock-output-names = "clk_iis0";
+ };
+
+ clk_iis1 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x7120009c 0x3 0x7120009c 0x700 0x71300000 0x4>;
+ clocks = <0x9 0xc 0xd>;
+ clock-output-names = "clk_iis1";
+ };
+
+ clk_iis2 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x712000a0 0x3 0x712000a0 0x700 0x71300000 0x8>;
+ clocks = <0x9 0xc 0xd>;
+ clock-output-names = "clk_iis2";
+ };
+
+ clk_iis3 {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x712000a4 0x3 0x712000a4 0x700 0x71300000 0x10>;
+ clocks = <0x9 0xc 0xd>;
+ clock-output-names = "clk_iis3";
+ };
+
+ clk_zipenc {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x712000a8 0x3 0x20d00000 0x100000>;
+ clocks = <0xb 0xd 0x1a 0x1b>;
+ clock-output-names = "clk_zipenc";
+ };
+
+ clk_zipdec {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x712000ac 0x3 0x20d00000 0x200000>;
+ clocks = <0xb 0xd 0x1a 0x1b>;
+ clock-output-names = "clk_zipdec";
+ };
+
+ clk_gpu_axi {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0000 0x8000000 0x402b0021 0x2000000>;
+ clocks = <0x19>;
+ clock-output-names = "clk_gpu_axi";
+ linux,phandle = <0x45>;
+ phandle = <0x45>;
+ };
+
+ clk_gpu {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60100004 0x7 0x60100004 0x30>;
+ clocks = <0xd 0x20 0x1b 0x1c 0x1d 0x21 0x22>;
+ clock-output-names = "clk_gpu";
+ linux,phandle = <0x46>;
+ phandle = <0x46>;
+ };
+
+ clk_ccir_in {
+ compatible = "sprd,fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <0x3d09000>;
+ clock-output-names = "clk_ccir_in";
+ linux,phandle = <0x27>;
+ phandle = <0x27>;
+ };
+
+ clk_mm {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x402e0000 0x2000000 0x402b001d 0x2000000>;
+ clocks = <0x19>;
+ clock-output-names = "clk_mm";
+ linux,phandle = <0x23>;
+ phandle = <0x23>;
+ };
+
+ clk_mm_ahb {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60e00020 0x3>;
+ clocks = <0x9 0xb 0xc 0xd>;
+ clock-output-names = "clk_mm_ahb";
+ mm-domain;
+ linux,phandle = <0x25>;
+ phandle = <0x25>;
+ };
+
+ clk_mm_axi {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60d00008 0x80>;
+ clocks = <0x23>;
+ clock-output-names = "clk_mm_axi";
+ #mm-domain;
+ linux,phandle = <0x24>;
+ phandle = <0x24>;
+ };
+
+ clk_mm_mtx_axi {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60d00008 0x100>;
+ clocks = <0x24>;
+ clock-output-names = "clk_mm_mtx_axi";
+ mm-domain;
+ };
+
+ clk_mmu {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60d00000 0x80>;
+ clocks = <0x25>;
+ clock-output-names = "clk_mmu";
+ mm-domain;
+ linux,phandle = <0x49>;
+ phandle = <0x49>;
+ };
+
+ clk_mm_ckg {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60d00000 0x40>;
+ clocks = <0x25>;
+ clock-output-names = "clk_mm_ckg";
+ mm-domain;
+ };
+
+ clk_jpg {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60e00038 0x3 0x60d00008 0x40 0x60d00000 0x20>;
+ clocks = <0xe 0xc 0x1a 0x1b>;
+ clock-output-names = "clk_jpg";
+ mm-domain;
+ linux,phandle = <0x3a>;
+ phandle = <0x3a>;
+ };
+
+ clk_csi {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60d00008 0x2 0x60d00000 0x10>;
+ clocks = <0x25>;
+ clock-output-names = "clk_csi";
+ mm-domain;
+ linux,phandle = <0x26>;
+ phandle = <0x26>;
+ };
+
+ clk_dcam_mipi {
+ compatible = "sprd,gate-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60d00008 0x1>;
+ clocks = <0x26>;
+ clock-output-names = "clk_dcam_mipi";
+ mm-domain;
+ linux,phandle = <0x3e>;
+ phandle = <0x3e>;
+ };
+
+ clk_vsp {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60e00030 0x3 0x60d00008 0x20 0x60d00000 0x8>;
+ clocks = <0xe 0xc 0x1a>;
+ clock-output-names = "clk_vsp";
+ mm-domain;
+ linux,phandle = <0x39>;
+ phandle = <0x39>;
+ };
+
+ clk_isp {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60e00034 0x3 0x60d00008 0x10 0x60d00000 0x4>;
+ clocks = <0xe 0xc 0x1a 0x1b>;
+ clock-output-names = "clk_isp";
+ mm-domain;
+ linux,phandle = <0x3f>;
+ phandle = <0x3f>;
+ };
+
+ clk_ccir {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60e00028 0x10000 0x60d00000 0x2>;
+ clocks = <0x1f 0x27>;
+ clock-output-names = "clk_ccir";
+ mm-domain;
+ linux,phandle = <0x3d>;
+ phandle = <0x3d>;
+ };
+
+ clk_sensor {
+ compatible = "sprd,composite-dev-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60e00024 0x3 0x60e00024 0x700 0x60d00008 0x4>;
+ clocks = <0x9 0x13 0xe 0xb>;
+ clock-output-names = "clk_sensor";
+ mm-domain;
+ linux,phandle = <0x3c>;
+ phandle = <0x3c>;
+ };
+
+ clk_dcam {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60e0002c 0x3 0x60d00008 0x8 0x60d00000 0x1>;
+ clocks = <0xe 0xc 0x1a 0x1b>;
+ clock-output-names = "clk_dcam";
+ mm-domain;
+ linux,phandle = <0x3b>;
+ phandle = <0x3b>;
+ };
+
+ clk_vpp {
+ compatible = "sprd,muxed-clock";
+ #clock-cells = <0x0>;
+ reg = <0x60e0003c 0x3 0x60d00008 0x200 0x60d00000 0x100>;
+ clocks = <0xe 0xc 0x1a 0x1b>;
+ clock-output-names = "clk_vpp";
+ mm-domain;
+ };
+ };
+
+ regulators {
+ compatible = "sprd,sc2723-regulator";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ dummy {
+ };
+
+ vddcore {
+ regulator-name = "vddcore";
+ reg = <0x40038810 0x200 0x40038a00 0x3ff 0x400388c0 0x1>;
+ regulator-cal-channel = <0x40038888 0x4000 0xd>;
+ regulator-default-microvolt = <0xdbba0>;
+ regulator-step-microvolt = <0xc35>;
+ regulator-min-microvolt = <0x927c0>;
+ regulator-max-microvolt = <0x2faf08>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x47e>;
+ default-on;
+ dcdc;
+ };
+
+ vddarm {
+ regulator-name = "vddarm";
+ reg = <0x40038810 0x400 0x40038a04 0x3ff 0x400388c0 0x4>;
+ regulator-cal-channel = <0x40038888 0x2000 0xd>;
+ regulator-default-microvolt = <0xdbba0>;
+ regulator-step-microvolt = <0xc35>;
+ regulator-min-microvolt = <0x927c0>;
+ regulator-max-microvolt = <0x2faf08>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x47e>;
+ default-on;
+ dcdc;
+ };
+
+ vddmem {
+ regulator-name = "vddmem";
+ reg = <0x40038810 0x800 0x40038a08 0x3ff 0x400388c0 0x8>;
+ regulator-cal-channel = <0x40038888 0x6000 0xd>;
+ regulator-default-microvolt = <0x124f80>;
+ regulator-step-microvolt = <0xc35>;
+ regulator-min-microvolt = <0x927c0>;
+ regulator-max-microvolt = <0x2faf08>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ dcdc;
+ };
+
+ vddgen {
+ regulator-name = "vddgen";
+ reg = <0x40038810 0x1000 0x40038a0c 0x3ff 0x400388c0 0x10>;
+ regulator-cal-channel = <0x40038888 0x8000 0xd>;
+ regulator-default-microvolt = <0x249f00>;
+ regulator-step-microvolt = <0xc35>;
+ regulator-min-microvolt = <0x927c0>;
+ regulator-max-microvolt = <0x2faf08>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ dcdc;
+ };
+
+ vddrf {
+ regulator-name = "vddrf";
+ reg = <0x40038810 0x2000 0x40038a1c 0x3ff 0x400388c0 0x20>;
+ regulator-cal-channel = <0x40038888 0xa000 0xd>;
+ regulator-default-microvolt = <0x16e360>;
+ regulator-step-microvolt = <0xc35>;
+ regulator-min-microvolt = <0x927c0>;
+ regulator-max-microvolt = <0x2faf08>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ dcdc;
+ };
+
+ vddwpa {
+ regulator-name = "vddwpa";
+ reg = <0x40038814 0x4000 0x40038a10 0x7 0x0 0x0>;
+ regulator-cal-channel = <0x40038888 0xe000 0xd>;
+ regulator-step-microvolt = <0xc35>;
+ regulator-min-microvolt = <0x2faf08>;
+ regulator-max-microvolt = <0x33e140>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ dcdc;
+ status = "disabled";
+ };
+
+ vddcon {
+ regulator-name = "vddcon";
+ reg = <0x40038814 0x2000 0x40038a18 0x3ff 0x0 0x0>;
+ regulator-cal-channel = <0x40038888 0xc000 0xd>;
+ regulator-default-microvolt = <0x186a00>;
+ regulator-step-microvolt = <0xc35>;
+ regulator-min-microvolt = <0x927c0>;
+ regulator-max-microvolt = <0x2faf08>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ dcdc;
+ };
+
+ vddrf0 {
+ regulator-name = "vddrf0";
+ reg = <0x40038810 0x100 0x40038818 0x7f00 0x400388c0 0x800>;
+ regulator-cal-channel = <0x40038844 0x4 0x15>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x186a>;
+ regulator-min-microvolt = <0x118c30>;
+ regulator-max-microvolt = <0x1da5d8>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ };
+
+ vddemmccore {
+ regulator-name = "vddemmccore";
+ reg = <0x40038810 0x80 0x40038834 0xff00 0x400388c0 0x80>;
+ regulator-cal-channel = <0x40038844 0x60 0x17>;
+ regulator-default-microvolt = <0x2dc6c0>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ };
+
+ vddgen1 {
+ regulator-name = "vddgen1";
+ reg = <0x40038810 0x40 0x40038824 0x7f00 0x400388c0 0x1000>;
+ regulator-cal-channel = <0x40038844 0x5 0x15>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x186a>;
+ regulator-min-microvolt = <0x118c30>;
+ regulator-max-microvolt = <0x1dc130>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ };
+
+ vddgen0 {
+ regulator-name = "vddgen0";
+ reg = <0x40038810 0x10 0x40038820 0x7f 0x400388c0 0x2000>;
+ regulator-cal-channel = <0x40038844 0x6 0x15>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x186a>;
+ regulator-min-microvolt = <0x118c30>;
+ regulator-max-microvolt = <0x1dc130>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ };
+
+ vdddcxo {
+ regulator-name = "vdddcxo";
+ reg = <0x40038810 0x20 0x40038838 0xff00 0x400388c0 0x100>;
+ regulator-cal-channel = <0x40038844 0x80 0x17>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ };
+
+ vdd25 {
+ regulator-name = "vdd25";
+ reg = <0x40038810 0x8 0x40038840 0xff 0x400388c0 0x40>;
+ regulator-cal-channel = <0x40038844 0x100 0x16>;
+ regulator-default-microvolt = <0x2ab980>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vdd28 {
+ regulator-name = "vdd28";
+ reg = <0x40038810 0x4 0x40038824 0xff 0x400388c0 0x200>;
+ regulator-cal-channel = <0x40038844 0xc0 0x17>;
+ regulator-default-microvolt = <0x2ab980>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ };
+
+ vdd18 {
+ regulator-name = "vdd18";
+ reg = <0x40038810 0x2 0x4003883c 0x7f00 0x400388c0 0x400>;
+ regulator-cal-channel = <0x40038844 0x1 0x15>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x186a>;
+ regulator-min-microvolt = <0x118c30>;
+ regulator-max-microvolt = <0x1dc130>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ default-on;
+ };
+
+ vddwifipa {
+ regulator-name = "vddwifipa";
+ reg = <0x40038814 0x800 0x40038818 0xff 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x20 0x17>;
+ regulator-default-microvolt = <0x325aa0>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddsdcore {
+ regulator-name = "vddsdcore";
+ reg = <0x40038814 0x400 0x40038830 0xff00 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0xa0 0x17>;
+ regulator-default-microvolt = <0x2dc6c0>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddsdio {
+ regulator-name = "vddsdio";
+ reg = <0x40038814 0x1 0x40038828 0xff 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x8 0x1d>;
+ regulator-default-microvolt = <0x2dc6c0>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddsim0 {
+ regulator-name = "vddsim0";
+ reg = <0x40038814 0x2 0x40038828 0xff00 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x500 0x16>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ status = "disabled";
+ };
+
+ vddsim1 {
+ regulator-name = "vddsim1";
+ reg = <0x40038814 0x4 0x4003882c 0xff 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x400 0x16>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ status = "disabled";
+ };
+
+ vddsim2 {
+ regulator-name = "vddsim2";
+ reg = <0x40038814 0x8 0x4003882c 0xff00 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x300 0x16>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddcama {
+ regulator-name = "vddcama";
+ reg = <0x40038814 0x10 0x40038830 0xff 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x200 0x16>;
+ regulator-default-microvolt = <0x2ab980>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddcamd {
+ regulator-name = "vddcamd";
+ reg = <0x40038814 0x20 0x4003881c 0x7f 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x2 0x15>;
+ regulator-default-microvolt = <0x16e360>;
+ regulator-step-microvolt = <0x186a>;
+ regulator-min-microvolt = <0x118c30>;
+ regulator-max-microvolt = <0x1dc130>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddcamio {
+ regulator-name = "vddcamio";
+ reg = <0x40038814 0x40 0x4003881c 0x7f00 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x3 0x15>;
+ regulator-default-microvolt = <0x1b7740>;
+ regulator-step-microvolt = <0x186a>;
+ regulator-min-microvolt = <0x118c30>;
+ regulator-max-microvolt = <0x1dc130>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddcammot {
+ regulator-name = "vddcammot";
+ reg = <0x40038814 0x80 0x40038834 0xff 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x40 0x17>;
+ regulator-default-microvolt = <0x2ab980>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddusb {
+ regulator-name = "vddusb";
+ reg = <0x40038814 0x100 0x4003883c 0xff 0x0 0x0>;
+ regulator-cal-channel = <0x40038844 0x10 0x1d>;
+ regulator-default-microvolt = <0x325aa0>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ linux,phandle = <0x44>;
+ phandle = <0x44>;
+ };
+
+ vddkpled {
+ regulator-name = "vddkpled";
+ reg = <0x400388f4 0x100 0x400388f4 0xff 0x0 0x0>;
+ regulator-cal-channel = <0x400388f8 0x3000 0x18>;
+ regulator-default-microvolt = <0x325aa0>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+
+ vddvibr {
+ regulator-name = "vddvibr";
+ reg = <0x400388f8 0x100 0x400388f8 0xff 0x0 0x0>;
+ regulator-cal-channel = <0x400388f8 0x2000 0x18>;
+ regulator-default-microvolt = <0x2dc6c0>;
+ regulator-step-microvolt = <0x2710>;
+ regulator-min-microvolt = <0x124f80>;
+ regulator-max-microvolt = <0x395f80>;
+ regulator-microvolt-offset = <0x0>;
+ hide-offset = <0x3e8>;
+ };
+ };
+
+ sprd-audio-devices {
+ compatible = "sprd,sound";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ sprd-codec {
+ compatible = "sprd,sprd-codec";
+ status = "okay";
+ sprd,def_da_fs = <0xac44>;
+ sprd,ap_irq = <0xa4>;
+ sprd,dp_irq = <0x34>;
+ sprd,reg_dp = <0x40000000 0x2000>;
+ interrupt-parent = <0x28>;
+ interrupts = <0x7 0x0>;
+ sprd,audio_power_ver = <0x4>;
+ linux,phandle = <0x2b>;
+ phandle = <0x2b>;
+ };
+
+ sprd-codec-v3 {
+ compatible = "sprd,sprd-codec-v3";
+ status = "disable";
+ sprd,def_da_fs = <0xac44>;
+ sprd,ap_irq = <0xa4>;
+ sprd,dp_irq = <0x34>;
+ sprd,reg_dp = <0x40000000 0x2000>;
+ interrupt-parent = <0x28>;
+ interrupts = <0x7 0x0>;
+ linux,phandle = <0x2d>;
+ phandle = <0x2d>;
+ };
+
+ sprd-codec-v1 {
+ compatible = "sprd,sprd-codec-v1";
+ status = "disable";
+ sprd,def_da_fs = <0xac44>;
+ sprd,ap_irq = <0x67>;
+ sprd,dp_irq = <0x3f>;
+ };
-/* memory reserved for CPW modem */
-/memreserve/ 0x88000000 0x1b00000; /* 27M */
+ null-codec {
+ compatible = "sprd,null-codec";
+ linux,phandle = <0x30>;
+ phandle = <0x30>;
+ };
-/* memory reserved for CPWCN modem */
-/memreserve/ 0x8a800000 0x201000;/*Offset:168M, SIZE:2M+4k*/
+ vbc-r2p0 {
+ compatible = "sprd,vbc-r2p0";
+ status = "okay";
+ sprd,reg_vbc = <0x40020000 0x20000>;
+ linux,phandle = <0x2a>;
+ phandle = <0x2a>;
+ };
+ vbc-r1p0 {
+ compatible = "sprd,vbc-r1p0";
+ status = "disable";
+ };
-/include/ "skeleton.dtsi"
-/include/ "scx20-clocks.dtsi"
-/include/ "sc2723-regulators.dtsi"
-/include/ "sprd-sound.dtsi"
-/include/ "sprd-battery.dtsi"
+ vaudio {
+ compatible = "sprd,vaudio";
+ linux,phandle = <0x29>;
+ phandle = <0x29>;
+ };
-/ {
- model = "Spreadtrum SP8835EB board";
- compatible = "sprd,sp8835eb";
- sprd,sc-id = <8830 1 0x20000>;
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&gic>;
+ bt-i2s-config {
+ sprd,def_pcm_config;
+ };
- chosen {
- bootargs = "loglevel=1 console=ttyS1,115200n8 init=/init root=/dev/ram0 rw androidboot.hardware=sp7731c_1h10_32v4 coherent_pool=32k";
- linux,initrd-start = <0x85500000>;
- linux,initrd-end = <0x855a3212>;
+ fm-i2s-config {
+ };
+
+ i2s@0 {
+ compatible = "sprd,i2s";
+ status = "okay";
+ sprd,dai_name = "i2s_bt_sco0";
+ sprd,id = <0x0>;
+ sprd,hw_port = <0x0>;
+ sprd,base = <0x70d00000 0x100000>;
+ sprd,dma_rx_no = <0x3>;
+ sprd,dma_tx_no = <0x4>;
+ sprd,config_type = "pcm";
+ sprd,slave_timeout = <0xf11>;
+ sprd,_hw_port = <0x0>;
+ sprd,fs = <0x1f40>;
+ sprd,bus_type = <0x1>;
+ sprd,rtx_mode = <0x3>;
+ sprd,byte_per_chan = <0x1>;
+ sprd,slave_mode = <0x0>;
+ sprd,lsb = <0x1>;
+ sprd,lrck = <0x1>;
+ sprd,low_for_left = <0x1>;
+ sprd,clk_inv = <0x0>;
+ sprd,pcm_short_frame = <0x1>;
+ sprd,pcm_slot = <0x1>;
+ sprd,pcm_cycle = <0x1>;
+ sprd,tx_watermark = <0xc>;
+ sprd,rx_watermark = <0x14>;
+ linux,phandle = <0x2e>;
+ phandle = <0x2e>;
+ };
+
+ i2s@1 {
+ compatible = "sprd,i2s";
+ status = "okay";
+ sprd,dai_name = "i2s_bt_sco1";
+ sprd,id = <0x1>;
+ sprd,hw_port = <0x1>;
+ sprd,base = <0x70e00000 0x100000>;
+ sprd,dma_rx_no = <0x5>;
+ sprd,dma_tx_no = <0x6>;
+ linux,phandle = <0x2f>;
+ phandle = <0x2f>;
+ };
+
+ i2s@2 {
+ compatible = "sprd,i2s";
+ status = "disable";
+ sprd,dai_name = "i2s_bt_sco2";
+ sprd,id = <0x2>;
+ sprd,hw_port = <0x2>;
+ sprd,base = <0x70f00000 0x100000>;
+ sprd,dma_rx_no = <0x7>;
+ sprd,dma_tx_no = <0x8>;
+ };
+
+ i2s@3 {
+ compatible = "sprd,i2s";
+ status = "disable";
+ sprd,dai_name = "i2s_bt_sco3";
+ sprd,id = <0x3>;
+ sprd,hw_port = <0x3>;
+ sprd,base = <0x71000000 0x100000>;
+ sprd,dma_rx_no = <0x9>;
+ sprd,dma_tx_no = <0xa>;
+ };
+
+ sprd-pcm-audio {
+ compatible = "sprd,sprd-pcm";
+ linux,phandle = <0x2c>;
+ phandle = <0x2c>;
+ };
+
+ sound@0 {
+ compatible = "sprd,vbc-r2p0-sprd-codec";
+ sprd,model = "sprdphone";
+ sprd,vaudio = <0x29>;
+ sprd,vbc = <0x2a>;
+ sprd,codec = <0x2b>;
+ sprd,pcm = <0x2c>;
+ };
+
+ sound@1 {
+ compatible = "sprd,vbc-r2p0-sprd-codec-v3";
+ sprd,model = "sprdphone";
+ sprd,vaudio = <0x29>;
+ sprd,vbc = <0x2a>;
+ sprd,codec = <0x2d>;
+ sprd,pcm = <0x2c>;
+ };
+
+ sound@2 {
+ compatible = "sprd,i2s-null-codec";
+ sprd,model = "all-i2s";
+ sprd,i2s = <0x2e 0x2f>;
+ sprd,codec = <0x30>;
+ sprd,pcm = <0x2c>;
+ };
};
- memory: memory {
- device_type = "memory";
- reg = <0x80000000 0x20000000>;
+ sprd_battery {
+ compatible = "sprd,sprd-battery";
+ gpios = <0x31 0x0 0x0 0x31 0x4 0x0 0x31 0x6 0x0>;
+ chg-end-vol-h = <0x1117>;
+ chg-end-vol-pure = <0x10fe>;
+ chg-end-vol-l = <0x10f4>;
+ chg-bat-safety-vol = <0x10b8>;
+ rechg-vol = <0x1023>;
+ adp-cdp-cur = <0x2bc>;
+ adp-dcp-cur = <0x2bc>;
+ adp-sdp-cur = <0x1c2>;
+ ovp-stop = <0x1964>;
+ ovp-restart = <0x16a8>;
+ chg-timeout = <0x5460>;
+ chgtimeout-show-full = <0x0>;
+ chg-rechg-timeout = <0x1518>;
+ chg-cv-timeout = <0xe10>;
+ chg-eoc-level = <0x3>;
+ cccv-default = <0x0>;
+ chg-end-cur = <0x50>;
+ otp-high-stop = <0x640>;
+ otp-high-restart = <0x60e>;
+ otp-low-stop = <0x3b6>;
+ otp-low-restart = <0x3e8>;
+ chg-polling-time = <0x1e>;
+ chg-polling-time-fast = <0x1>;
+ bat-polling-time = <0xf>;
+ bat-polling-time-fast = <0xf>;
+ cap-one-per-time = <0x1e>;
+ cap-valid-range-poweron = <0x0>;
+ chg-full-condition = <0x0>;
+ temp-support = <0x0>;
+ temp-adc-ch = <0x3>;
+ temp-adc-scale = <0x1>;
+ temp-adc-sample-cnt = <0xf>;
+ temp-table-mode = <0x1>;
+ temp-comp-res = <0x1e>;
+ temp-tab-size = <0x13>;
+ temp-tab-val = <0x43c 0x430 0x41f 0x409 0x3f0 0x3d1 0x3aa 0x381 0x352 0x31e 0x2e6 0x2ae 0x274 0x23b 0x201 0x1cb 0x19a 0x16a 0x13e>;
+ temp-tab-temp = <0x2ee 0x320 0x352 0x384 0x3b6 0x3e8 0x41a 0x44c 0x47e 0x4b0 0x4e2 0x514 0x546 0x578 0x5aa 0x5dc 0x60e 0x640 0x672>;
+ jeita-tab-size = <0x6>;
+ jeita-temp-tab = <0x384 0x3e8 0x44c 0x5aa 0x5dc 0xbb8>;
+ jeita-temp-recovery-tab = <0x366 0x3ca 0x42e 0x58c 0x5be 0xbb8>;
+ jeita-cur-tab = <0x0 0x64 0x1f4 0x3e8 0x2bc 0x0>;
+ jeita-cccv-tab = <0x1068 0x1068 0x10fe 0x10fe 0x10fe 0x10fe>;
+ fgu-mode = <0x0>;
+ alm-soc = <0x5>;
+ alm-vol = <0xdac>;
+ soft-vbat-uvlo = <0xc1c>;
+ rint = <0xb5>;
+ cnom = <0x9d2>;
+ rsense-real = <0xc8>;
+ rsense-spec = <0xc8>;
+ relax-current = <0x32>;
+ fgu-cal-ajust = <0x0>;
+ ocv-type = <0x0>;
+ ocv-tab-size = <0x15>;
+ ocv-tab-vol = <0x10e9 0x10a2 0x1065 0x102c 0xff6 0xfc6 0xf8c 0xf6d 0xf42 0xf12 0xef1 0xed9 0xec9 0xec0 0xebe 0xeb9 0xea8 0xe8c 0xe2b 0xdd7 0xd48>;
+ ocv-tab-cap = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0xf 0xa 0x5 0x0>;
+ cnom-temp-tab = <0x3fc 0x708 0x3f2 0x514 0x3e8 0x42e 0x3de 0x3e8>;
+ rint-temp-tab = <0x3fc 0xc8 0x3f2 0x1c2 0x3e8 0x28a 0x3de 0x44c>;
+
+ sprd_chg {
+ compatible = "sprd,sprd_chg";
+ interrupt-parent = <0x1>;
+ interrupts = <0x0 0x78 0x0>;
+ };
+
+ sprd_fgu {
+ compatible = "sprd,sprd_fgu";
+ interrupt-parent = <0x28>;
+ interrupts = <0x4 0x0>;
+ };
};
reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
ranges;
- fb_reserved: fb_mem{
- reg = <0x9F7ED000 0x4B1000>;/*fb*/
+ fb_mem {
+ reg = <0x9f5d1000 0x5ef000>;
+ linux,phandle = <0x48>;
+ phandle = <0x48>;
};
- overlay_reserved: gsp{
- reg = <0x9FC9E000 0x322000>;/*overlay*/
+
+ gsp {
+ reg = <0x9fbc0000 0x400000>;
+ linux,phandle = <0x47>;
+ phandle = <0x47>;
};
};
- aliases {
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- lcd0 = &fb0;
- spi0 = &spi0;
- spi1 = &spi1;
- spi2 = &spi2;
- hwspinlock0 = &hwspinlock0;
- hwspinlock1 = &hwspinlock1;
- };
cpus {
- #address-cells = <1>;
- #size-cells = <0>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
cpu@f00 {
device_type = "cpu";
@@ -99,692 +1792,781 @@
reg = <0xf03>;
};
};
- pmu {
- compatible = "arm,cortex-a7-pmu";
- interrupts = <0 92 0x0>,
- <0 93 0x0>,
- <0 94 0x0>,
- <0 95 0x0>;
- };
-
- gic: interrupt-controller@12001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x12001000 0x1000>,
- <0x12002000 0x1000>;
- };
-
- uart0: uart@70000000 {
- compatible = "sprd,serial";
- interrupts = <0 2 0x0>;
+
+ pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts = <0x0 0x5c 0x0 0x0 0x5d 0x0 0x0 0x5e 0x0 0x0 0x5f 0x0>;
+ };
+
+ interrupt-controller@12001000 {
+ compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ #interrupt-cells = <0x3>;
+ #address-cells = <0x0>;
+ interrupt-controller;
+ reg = <0x12001000 0x1000 0x12002000 0x1000>;
+ linux,phandle = <0x1>;
+ phandle = <0x1>;
+ };
+
+ uart@70000000 {
+ compatible = "sprd,serial";
+ interrupts = <0x0 0x2 0x0>;
reg = <0x70000000 0x1000>;
clock-names = "clk_uart0";
- clocks = <&clock 60>;
- sprdclk = <48000000>;
+ clocks = <0x32 0x3c>;
+ sprdclk = <0x2dc6c00>;
sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP";
};
- uart1: uart@70100000 {
- compatible = "sprd,serial";
- interrupts = <0 3 0x0>;
+
+ uart@70100000 {
+ compatible = "sprd,serial";
+ interrupts = <0x0 0x3 0x0>;
reg = <0x70100000 0x1000>;
clock-names = "clk_uart1";
- clocks = <&clock 61>;
- sprdclk = <26000000>;
+ clocks = <0x32 0x3d>;
+ sprdclk = <0x18cba80>;
sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP";
};
- uart2: uart@70200000 {
- compatible = "sprd,serial";
- interrupts = <0 4 0x0>;
+
+ uart@70200000 {
+ compatible = "sprd,serial";
+ interrupts = <0x0 0x4 0x0>;
reg = <0x70200000 0x1000>;
clock-names = "clk_uart2";
- clocks = <&clock 62>;
- sprdclk = <26000000>;
+ clocks = <0x32 0x3e>;
+ sprdclk = <0x18cba80>;
sprdwaketype = "BT_RTS_HIGH_WHEN_SLEEP";
};
timer {
- compatible = "sprd,scx35-timer";
- reg = <0x40230000 0x1000>, /* SYSCNT */
- <0x40050000 0x1000>, /* GPTIMER0 */
- <0x40220000 0x1000>, /* APTIMER0 */
- <0x40330000 0x1000>, /* APTIMER1 */
- <0x40340000 0x1000>; /* APTIMER2 */
- interrupts = <0 118 0x0>,
- <0 28 0x0>,
- <0 29 0x0>,
- <0 119 0x0>,
- <0 121 0x0>,
- <0 31 0x0>;/*ap system timer*/
- };
- clock: clockdevice {
+ compatible = "sprd,scx35-timer";
+ reg = <0x40230000 0x1000 0x40050000 0x1000 0x40220000 0x1000 0x40330000 0x1000 0x40340000 0x1000>;
+ interrupts = <0x0 0x76 0x0 0x0 0x1c 0x0 0x0 0x1d 0x0 0x0 0x77 0x0 0x0 0x79 0x0 0x0 0x1f 0x0>;
+ };
+
+ clockdevice {
compatible = "sprd,scx35-clock";
- #clock-cells = <1>;
- };
- d_eic_gpio: gpio@40210000{
- compatible = "sprd,d-eic-gpio";
- reg = <0x40210000 0x1000>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- #gpio-cells = <2>;
- gpiobase = <288>;
- ngpios = <16>;
- interrupts = <0 37 0x0>;
- };
- d_gpio_gpio: gpio@40280000{
- compatible = "sprd,d-gpio-gpio";
- reg = <0x40280000 0x1000>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- #gpio-cells = <2>;
- gpiobase = <0>;
- ngpios = <256>;
- interrupts = <0 35 0x0>;
- };
- pinctrl{
+ #clock-cells = <0x1>;
+ linux,phandle = <0x32>;
+ phandle = <0x32>;
+ };
+
+ gpio@40210000 {
+ compatible = "sprd,d-eic-gpio";
+ reg = <0x40210000 0x1000>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ #gpio-cells = <0x2>;
+ gpiobase = <0x120>;
+ ngpios = <0x10>;
+ interrupts = <0x0 0x25 0x0>;
+ };
+
+ gpio@40280000 {
+ compatible = "sprd,d-gpio-gpio";
+ reg = <0x40280000 0x1000>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ #gpio-cells = <0x2>;
+ gpiobase = <0x0>;
+ ngpios = <0x100>;
+ interrupts = <0x0 0x23 0x0>;
+ linux,phandle = <0x38>;
+ phandle = <0x38>;
+ };
+
+ pinctrl {
compatible = "sprd,pinctrl";
reg = <0x402a0000 0x1000>;
- pwr_domain = "vddsdio",
- "vddsim0",
- "vddsim1",
- "vddsim2",
- "vdd28";
- ctrl_desc = <0x10 16 1
- 0x10 17 1
- 0x10 18 1
- 0x10 19 1
- 0x10 20 1>;
- };
-
- fb0: fb@20800000 {
+ pwr_domain = "vddsdio", "vddsim0", "vddsim1", "vddsim2", "vdd28";
+ ctrl_desc = <0x10 0x10 0x1 0x10 0x11 0x1 0x10 0x12 0x1 0x10 0x13 0x1 0x10 0x14 0x1>;
+ };
+
+ fb@20800000 {
compatible = "sprd,sprdfb";
- reg = <0x20800000 0x1000>,<0x21800000 0x1000>;
- interrupts = <0 46 0x0>,<0 48 0x0>, <0 49 0x0>, <0 47 0x0>;
+ reg = <0x20800000 0x1000 0x21800000 0x1000>;
+ interrupts = <0x0 0x2e 0x0 0x0 0x30 0x0 0x0 0x31 0x0 0x0 0x2f 0x0>;
clock-names = "dispc_clk_parent", "dispc_dbi_clk_parent", "dispc_dpi_clk_parent", "dispc_emc_clk_parent", "dispc_clk", "dispc_dbi_clk", "dispc_dpi_clk", "dispc_emc_clk", "fb_spi_clock", "fb_spi_clock_parent";
- clocks = <&clk_256m>, <&clk_256m>, <&clk_384m>, <&clk_aon_apb>, <&clk_dispc0>, <&clk_dispc0_dbi>, <&clk_dispc0_dpi>, <&clk_disp_emc>, <&clk_spi2>, <&ext_26m>;
- clock-src = <256000000 256000000 384000000>;
- dpi_clk_div = <7>;
+ clocks = <0x1b 0x1b 0x1d 0x19 0x33 0x34 0x35 0x36 0x37 0x9>;
+ clock-src = <0xf424000 0xf424000 0x16e36000>;
+ dpi_clk_div = <0x7>;
sprd,fb_use_reservemem;
- sprd,fb_mem = <0x9F7ED000 0x4B1000>;
+ sprd,fb_mem = <0x9f5d1000 0x5ef000>;
};
- adic:adic{
+
+ adic {
compatible = "sprd,adi";
reg = <0x40030000 0x10000>;
};
- adi: adi_bus{
- compatible = "sprd,adi-bus";
- interrupts = <0 38 0x0>;
- reg = <0x40038000 0x1000>;
- interrupt-controller;
- sprd,irqnums = <11>;
- #interrupt-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0X40 0x40038040 0x40>,
- <0x80 0x40038080 0x80>,
- <0x100 0x40038100 0x80>,
- <0x480 0x40038480 0x80>;
- sprd_backlight {
- compatible = "sprd,sprd_backlight";
- start = <3>;
- end = <3>;
- flags = <0x100>;
- };
+
+ adi_bus {
+ compatible = "sprd,adi-bus";
+ interrupts = <0x0 0x26 0x0>;
+ reg = <0x40038000 0x1000>;
+ interrupt-controller;
+ sprd,irqnums = <0xb>;
+ #interrupt-cells = <0x2>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ ranges = <0x40 0x40038040 0x40 0x80 0x40038080 0x80 0x100 0x40038100 0x80 0x480 0x40038480 0x80>;
+ linux,phandle = <0x28>;
+ phandle = <0x28>;
+
+ sprd_backlight {
+ compatible = "sprd,sprd_backlight";
+ start = <0x3>;
+ end = <0x3>;
+ flags = <0x100>;
+ brightness_max = <0xcc>;
+ };
+
headset_sprd_sc2723 {
compatible = "sprd,headset_sprd_sc2723";
- gpio_switch = <0>;
- gpio_detect = <312>;
- gpio_button = <307>;
- irq_trigger_level_detect = <1>;
- irq_trigger_level_button = <1>;
- adc_threshold_3pole_detect = <2600>;
- adc_threshold_4pole_detect = <2601>;
- irq_threshold_buttont = <1>;
- voltage_headmicbias = <3000000>;
- nbuttons = <3>;
+ gpio_switch = <0x0>;
+ gpio_detect = <0x138>;
+ gpio_button = <0x133>;
+ gpio_detect_mic = <0x135>;
+ irq_trigger_level_detect = <0x1>;
+ irq_trigger_level_button = <0x1>;
+ irq_trigger_level_detect_mic = <0x1>;
+ adc_threshold_3pole_detect = <0xa28>;
+ adc_threshold_4pole_detect = <0xa29>;
+ irq_threshold_buttont = <0x1>;
+ voltage_headmicbias = <0x2dc6c0>;
+ nbuttons = <0x3>;
+
headset_buttons_media {
- adc_min = <0>;
- adc_max = <410>;
- code = <226>;
- type = <0>;
+ adc_min = <0x0>;
+ adc_max = <0x19a>;
+ code = <0xe2>;
+ type = <0x0>;
};
headset_buttons_up {
- adc_min = <411>;
- adc_max = <840>;
- code = <115>;
- type = <0>;
+ adc_min = <0x19b>;
+ adc_max = <0x348>;
+ code = <0x73>;
+ type = <0x0>;
};
+
headset_buttons_down {
- adc_min = <841>;
- adc_max =<1900>;
- code = <114>;
- type = <0>;
+ adc_min = <0x349>;
+ adc_max = <0x76c>;
+ code = <0x72>;
+ type = <0x0>;
};
};
- keyboard_backlight {
- compatible = "sprd,keyboard-backlight";
- };
- watchdog@40{
- compatible = "sprd,watchdog";
- reg = <0X40 0x40>;
- interrupts = <3 0x0>;
- };
- rtc@80{
- compatible = "sprd,rtc";
- reg = <0X80 0x80>;
- interrupts = <2 0x0>;
- };
- a_eic_gpio: gpio@100{
- compatible = "sprd,a-eic-gpio";
- reg = <0X100 0x80>; /* adi reg */
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- #gpio-cells = <2>;
- gpiobase = <304>;
- ngpios = <16>;
- interrupt-parent = <&adi>;
- interrupts = <5 0x0>; /* ext irq 5 */
- };
- a_gpio_gpio: gpio@480{
- compatible = "sprd,a-gpio-gpio";
- reg = <0X480 0x80>; /* adi reg */
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- #gpio-cells = <2>;
- gpiobase = <256>;
- ngpios = <32>;
- interrupt-parent = <&adi>;
- interrupts = <1 0x0>; /* ext irq 1 */
- };
+ keyboard_backlight {
+ compatible = "sprd,keyboard-backlight";
+ };
+
+ watchdog@40 {
+ compatible = "sprd,watchdog";
+ reg = <0x40 0x40>;
+ interrupts = <0x3 0x0>;
+ };
+
+ rtc@80 {
+ compatible = "sprd,rtc";
+ reg = <0x80 0x80>;
+ interrupts = <0x2 0x0>;
+ };
+
+ gpio@100 {
+ compatible = "sprd,a-eic-gpio";
+ reg = <0x100 0x80>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ #gpio-cells = <0x2>;
+ gpiobase = <0x130>;
+ ngpios = <0x10>;
+ interrupt-parent = <0x28>;
+ interrupts = <0x5 0x0>;
+ linux,phandle = <0x31>;
+ phandle = <0x31>;
+ };
+
+ gpio@480 {
+ compatible = "sprd,a-gpio-gpio";
+ reg = <0x480 0x80>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <0x2>;
+ #gpio-cells = <0x2>;
+ gpiobase = <0x100>;
+ ngpios = <0x20>;
+ interrupt-parent = <0x28>;
+ interrupts = <0x1 0x0>;
+ };
+
sprd-eic-keys {
compatible = "sprd,sprd-eic-keys";
key_power {
label = "Power Key";
- linux,code = <116>;
- gpios = <&a_eic_gpio 2 0>;
- debounce-interval = <2>;
+ linux,code = <0x74>;
+ gpios = <0x31 0x2 0x0>;
+ debounce-interval = <0x2>;
gpio-key,wakeup;
};
-/*
- key_volumeup {
- label = "Volumeup Key";
- linux,code = <115>;
- gpios = <&a_eic_gpio 10 0>;
- debounce-interval = <2>;
- gpio-key,wakeup;
- };
-*/
};
+ };
- };
sprd_pwm_bl {
compatible = "sprd,sprd_pwm_bl";
reg = <0x40260000 0xf>;
- brightness_max = <255>;
- brightness_min = <0>;
- pwm_index = <0>;
- gpio_ctrl_pin = <0>;
- gpio_active_level = <0>;
+ brightness_max = <0xb3>;
+ brightness_min = <0x0>;
+ pwm_index = <0x0>;
+ gpio_ctrl_pin = <0x0>;
+ gpio_active_level = <0x0>;
+ };
+
+ sprd_kpled_2723 {
+ compatible = "sprd,sprd-kpled-2723";
+ brightness_max = <0xff>;
+ brightness_min = <0x0>;
+ run_mode = <0x1>;
};
gpio_keys {
compatible = "gpio-keys";
input-name = "sprd-gpio-keys";
+
key_volumedown {
label = "Volumedown Key";
- linux,code = <114>;
- gpios = <&d_gpio_gpio 199 1>;
- debounce-interval = <2>;
+ linux,code = <0x72>;
+ gpios = <0x38 0xc7 0x1>;
+ debounce-interval = <0x2>;
gpio-key,wakeup;
};
+
key_volumeup {
label = "Volumeup Key";
- linux,code = <115>;
- gpios = <&d_gpio_gpio 200 1>;
- debounce-interval = <2>;
+ linux,code = <0x73>;
+ gpios = <0x38 0xc8 0x1>;
+ debounce-interval = <0x2>;
gpio-key,wakeup;
};
};
- keypad@40250000{
- compatible = "sprd,sci-keypad";
- reg = <0x40250000 0x1000>;
- gpios = <&a_eic_gpio 2 0>;
- interrupts = <0 36 0x0>;
- sprd,keypad-num-rows = <2>;
- sprd,keypad-num-columns = <2>;
- sprd,keypad-rows-choose-hw = <0x30000>;
- sprd,keypad-cols-choose-hw = <0x300>;
- sprd,debounce_time = <5000>;
- linux,keypad-no-autorepeat;
- sprd,support_long_key;
-
- key_volume_down {
- keypad,row = <0>;
- keypad,column = <0>;
- linux,code = <114>;
- };
-/*
- key_volume_up {
- keypad,row = <1>;
- keypad,column = <0>;
- linux,code = <115>;
- };
-*/
- key_home {
- keypad,row = <0>;
- keypad,column = <1>;
- linux,code = <102>;
- };
- };
- sprd_vsp@60900000{
- compatible = "sprd,sprd_vsp";
- reg = <0x60900000 0xc000>;
- interrupts = <0 43 0x0>;
- clock-names = "clk_mm_i", "clk_vsp", "clk_mm_axi";
- clocks = <&clk_mm>, <&clk_vsp>, <&clk_mm_axi>;
- version = <4>;
- };
- sprd_jpg {
- compatible = "sprd,sprd_jpg";
- reg = <0x60b00000 0x8000>;
- interrupts = <0 42 0x0>;
- clock-names = "clk_mm_i","clk_jpg";
- clocks = <&clk_mm>, <&clk_jpg>;
- };
-
-
- i2c0: i2c@70500000 {
- compatible = "sprd,i2c";
- interrupts = <0 11 0x0>;
- reg = <0x70500000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- sensor_main@0x3c{
- compatible = "sprd,sensor_main";
- reg = <0x3c>;
- };
- sensor_sub@0x21{
- compatible = "sprd,sensor_sub";
- reg = <0x21>;
- };
- };
- i2c1: i2c@70600000 {
- compatible = "sprd,i2c";
- interrupts = <0 12 0x0>;
- reg = <0x70600000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- msg2138_ts@26{
- compatible = "Mstar,msg2138_ts";
+ keypad@40250000 {
+ compatible = "sprd,sci-keypad-ext";
+ reg = <0x40250000 0x1000>;
+ gpios = <0x38 0xec 0x1 0x38 0xee 0x1 0x38 0xef 0x1 0x31 0x2 0x0>;
+ interrupts = <0x0 0x24 0x0>;
+ sprd,keypad-num-rows = <0x3>;
+ sprd,keypad-num-columns = <0x3>;
+ sprd,keypad-rows-choose-hw = <0x70000>;
+ sprd,keypad-cols-choose-hw = <0x700>;
+ sprd,debounce_time = <0x1388>;
+ linux,keypad-no-autorepeat;
+ sprd,support_long_key;
+
+ key_volume_down {
+ keypad,row = <0x1>;
+ keypad,column = <0x0>;
+ linux,code = <0x72>;
+ };
+
+ key_volume_up {
+ keypad,row = <0x0>;
+ keypad,column = <0x0>;
+ linux,code = <0x73>;
+ };
+
+ key_sos {
+ keypad,row = <0x2>;
+ keypad,column = <0x0>;
+ linux,code = <0xfa>;
+ };
+
+ key0 {
+ keypad,row = <0x0>;
+ keypad,column = <0x1>;
+ linux,code = <0xb>;
+ };
+
+ key6 {
+ keypad,row = <0x0>;
+ keypad,column = <0x2>;
+ linux,code = <0x7>;
+ };
+
+ key5 {
+ keypad,row = <0x0>;
+ keypad,column = <0x3>;
+ linux,code = <0x6>;
+ };
+
+ key7 {
+ keypad,row = <0x0>;
+ keypad,column = <0x4>;
+ linux,code = <0x8>;
+ };
+
+ key9 {
+ keypad,row = <0x0>;
+ keypad,column = <0x5>;
+ linux,code = <0xa>;
+ };
+
+ key_pound {
+ keypad,row = <0x1>;
+ keypad,column = <0x1>;
+ linux,code = <0xfb>;
+ };
+
+ key3 {
+ keypad,row = <0x1>;
+ keypad,column = <0x2>;
+ linux,code = <0x4>;
+ };
+
+ key2 {
+ keypad,row = <0x1>;
+ keypad,column = <0x3>;
+ linux,code = <0x3>;
+ };
+
+ key4 {
+ keypad,row = <0x1>;
+ keypad,column = <0x4>;
+ linux,code = <0x5>;
+ };
+
+ key8 {
+ keypad,row = <0x1>;
+ keypad,column = <0x5>;
+ linux,code = <0x9>;
+ };
+
+ key_back {
+ keypad,row = <0x2>;
+ keypad,column = <0x1>;
+ linux,code = <0x9e>;
+ };
+
+ key_home {
+ keypad,row = <0x2>;
+ keypad,column = <0x2>;
+ linux,code = <0xac>;
+ };
+
+ key_send {
+ keypad,row = <0x2>;
+ keypad,column = <0x3>;
+ linux,code = <0xfd>;
+ };
+
+ key1 {
+ keypad,row = <0x2>;
+ keypad,column = <0x4>;
+ linux,code = <0x2>;
+ };
+
+ key_star {
+ keypad,row = <0x2>;
+ keypad,column = <0x5>;
+ linux,code = <0xfc>;
+ };
+ };
+
+ sprd_vsp@60900000 {
+ compatible = "sprd,sprd_vsp";
+ reg = <0x60900000 0xc000>;
+ interrupts = <0x0 0x2b 0x0>;
+ clock-names = "clk_mm_i", "clk_vsp", "clk_mm_axi";
+ clocks = <0x23 0x39 0x24>;
+ version = <0x4>;
+ };
+
+ sprd_jpg {
+ compatible = "sprd,sprd_jpg";
+ reg = <0x60b00000 0x8000>;
+ interrupts = <0x0 0x2a 0x0>;
+ clock-names = "clk_mm_i", "clk_jpg";
+ clocks = <0x23 0x3a>;
+ };
+
+ i2c@70500000 {
+ compatible = "sprd,i2c";
+ interrupts = <0x0 0xb 0x0>;
+ reg = <0x70500000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ sensor_main@0x3c {
+ compatible = "sprd,sensor_main";
+ reg = <0x3c>;
+ };
+
+ sensor_sub@0x21 {
+ compatible = "sprd,sensor_sub";
+ reg = <0x21>;
+ };
+ };
+
+ i2c@70600000 {
+ compatible = "sprd,i2c";
+ interrupts = <0x0 0xc 0x0>;
+ reg = <0x70600000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ focaltech_ts@38 {
+ compatible = "focaltech,focaltech_ts";
+ reg = <0x38>;
+ gpios = <0x38 0x47 0x0 0x38 0x48 0x0>;
+ vdd_name = "vdd28";
+ virtualkeys = <0x50 0x3de 0x50 0x41 0x10e 0x3de 0x50 0x41 0x1c2 0x3de 0x50 0x41>;
+ TP_MAX_X = <0x140>;
+ TP_MAX_Y = <0x1e0>;
+ };
+
+ icn85xx@48 {
+ compatible = "icn85xx,icn85xx_ts";
+ reg = <0x48>;
+ gpios = <0x38 0x47 0x0 0x38 0x48 0x0>;
+ vdd_name = "vdd28";
+ virtualkeys = <0x50 0x352 0x40 0x40 0xf0 0x352 0x40 0x40 0x190 0x352 0x40 0x40>;
+ TP_MAX_X = <0x1e0>;
+ TP_MAX_Y = <0x320>;
+ };
+
+ msg2xxx@26 {
+ compatible = "mstar,msg2xxx";
reg = <0x26>;
- gpios = <&d_gpio_gpio 71 0
- &d_gpio_gpio 72 0>;
+ gpios = <0x38 0x47 0x0 0x38 0x48 0x0>;
vdd_name = "vdd28";
- virtualkeys = <256 1068 64 64
- 128 1068 64 64
- 192 1068 64 64>;
- TP_MAX_X = <480>;
- TP_MAX_Y = <800>;
- };
- };
- i2c2: i2c@70700000{
- compatible = "sprd,i2c";
- interrupts = <0 13 0x0>;
- reg = <0x70700000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- lis3dh_acc@18{
- compatible = "ST,lis3dh_acc";
+ virtualkeys = <0x50 0x3de 0x50 0x41 0x10e 0x3de 0x50 0x41 0x1c2 0x3de 0x50 0x41>;
+ TP_MAX_X = <0x140>;
+ TP_MAX_Y = <0x1e0>;
+ };
+ };
+
+ i2c@70700000 {
+ compatible = "sprd,i2c";
+ interrupts = <0x0 0xd 0x0>;
+ reg = <0x70700000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ em3071_pls@24 {
+ compatible = "EM,em3071_pls";
+ reg = <0x24>;
+ gpios = <0x38 0xd8 0x0>;
+ };
+
+ mir3da_acc@0x26 {
+ compatible = "MiraMEMS,Mir3da";
+ reg = <0x26>;
+ axis_map_x = <0x1>;
+ axis_map_y = <0x0>;
+ axis_map_z = <0x2>;
+ negate_x = <0x0>;
+ negate_y = <0x1>;
+ negate_z = <0x0>;
+ };
+
+ bma222e_acc@18 {
+ compatible = "bma,bma222e_acc";
reg = <0x18>;
- gpios = <&d_gpio_gpio 238 0>;
- poll_interval = <10>;
- min_interval = <1>;
- g_range = <0>;
- axis_map_x = <0>;
- axis_map_y = <1>;
- axis_map_z = <2>;
- negate_x = <1>;
- negate_y = <1>;
- negate_z = <0>;
- };
- ltr_558als@23{
- compatible = "LITEON,ltr_558als";
- reg = <0x23>;
- gpios = <&d_gpio_gpio 239 0>;
- };
- epl2182_pls@49{
- compatible = "ELAN,epl2182_pls";
- reg = <0x49>;
- gpios = <&d_gpio_gpio 239 0>;
- lux_rate = <5000>;
- };
- };
- i2c3: i2c@70800000{
- compatible = "sprd,i2c";
- interrupts = <0 14 0x0>;
- reg = <0x70800000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- sprd_dcam{
- compatible = "sprd,sprd_dcam";
- interrupts = <0 45 0>;
- reg = <0x60800000 0x100000>;
- clock-names = "clk_mm_i","clk_dcam";
- clocks = <&clk_mm>, <&clk_dcam>;
- };
- sprd_scale {
- compatible = "sprd,sprd_scale";
- };
- sprd_rotation {
- compatible = "sprd,sprd_rotation";
- };
- sprd_sensor {
- compatible = "sprd,sprd_sensor";
- reg = <0x60c00000 0x1000>;
- gpios = <&d_gpio_gpio 186 0 /* 0: main reset*/
- &d_gpio_gpio 187 0 /* 1: main powerdown*/
- &d_gpio_gpio 186 0 /* 2:sub reset*/
- &d_gpio_gpio 188 0 /* 3:sub powerdown*/
- &d_gpio_gpio 0 0 /* 4:main core voltage*/
- &d_gpio_gpio 0 0 /* 5:sub core voltage*/
- &d_gpio_gpio 0 0 /* 6:flash mode en */
- &d_gpio_gpio 0 0 /* 7:torch mode en*/
- &d_gpio_gpio 0 0 /* 8:3rd camea rst*/
- &d_gpio_gpio 0 0 /* 9:3rd camea pwdn*/
- &d_gpio_gpio 0 0 /* 10:3rd camea switch en */
- &d_gpio_gpio 0 0 /* 11:3rd camea switch mode*/
- &d_gpio_gpio 0 0 /* 12:main id*/
- &d_gpio_gpio 0 0 /* 13:main avdd voltage*/
- &d_gpio_gpio 0 0 /* 14:sub avdd voltage*/
- &d_gpio_gpio 0 0 /* 15:none used*/
- &d_gpio_gpio 0 0 /* 16:none used*/
- &d_gpio_gpio 0 0 /* 17:none used*/
- &d_gpio_gpio 0 0 /* 18:none used*/
- &d_gpio_gpio 0 0>; /* 19:none used*/
- clock-names ="clk_mm_i","clk_sensor","clk_ccir","clk_dcam","clk_dcam_mipi";
- clocks = <&clk_mm>, <&clk_sensor>,<&clk_ccir>, <&clk_dcam>, <&clk_dcam_mipi>;
- };
+ };
+
+ mc3xxx_acc@0x4c {
+ compatible = "mCube,mc3xxx";
+ reg = <0x4c>;
+ mc3xxx_dir = <0x6>;
+ };
+
+ qmax981_acc@0x12 {
+ compatible = "QST,qmax981";
+ reg = <0x12>;
+ layout = <0x1>;
+ };
+ };
+
+ i2c@70800000 {
+ compatible = "sprd,i2c";
+ interrupts = <0x0 0xe 0x0>;
+ reg = <0x70800000 0x1000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ };
+
+ sprd_dcam {
+ compatible = "sprd,sprd_dcam";
+ interrupts = <0x0 0x2d 0x0>;
+ reg = <0x60800000 0x100000>;
+ clock-names = "clk_mm_i", "clk_dcam";
+ clocks = <0x23 0x3b>;
+ };
+
+ sprd_scale {
+ compatible = "sprd,sprd_scale";
+ };
+
+ sprd_rotation {
+ compatible = "sprd,sprd_rotation";
+ };
+
+ sprd_sensor {
+ compatible = "sprd,sprd_sensor";
+ reg = <0x60c00000 0x1000>;
+ gpios = <0x38 0xba 0x0 0x38 0xbb 0x0 0x38 0xba 0x0 0x38 0xbc 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0xe9 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0 0x38 0x0 0x0>;
+ clock-names = "clk_mm_i", "clk_sensor", "clk_ccir", "clk_dcam", "clk_dcam_mipi";
+ clocks = <0x23 0x3c 0x3d 0x3b 0x3e>;
+ };
+
sprd_isp {
- compatible = "sprd,sprd_isp";
+ compatible = "sprd,sprd_isp";
reg = <0x60a00000 0x100000>;
- clock-names = "clk_mm_i","clk_isp";
- clocks = <&clk_mm>, <&clk_isp>;
+ clock-names = "clk_mm_i", "clk_isp";
+ clocks = <0x23 0x3f>;
};
+
sprd_dma_copy {
- compatible = "sprd,sprd_dma_copy";
+ compatible = "sprd,sprd_dma_copy";
};
- gsp:gsp@20a00000 {
+
+ gsp@20a00000 {
compatible = "sprd,gsp";
reg = <0x20a00000 0x1000>;
- interrupts = <0 51 0x0>;
+ interrupts = <0x0 0x33 0x0>;
clock-names = "clk_gsp", "clk_gsp_emc", "clk_gsp_parent", "clk_aon_apb";
- clocks = <&clk_gsp>, <&clk_gsp_emc>, <&clk_256m>, <&clk_aon_apb>;
+ clocks = <0x40 0x41 0x1b 0x19>;
gsp_mmu_ctrl_base = <0x21408000>;
};
- sprd_fm: sprd_fm@40270000{
- compatible = "sprd,sprd_fm";
- reg = <0x40270000 0x1000>,/*FM base*/
- <0x402E0000 0x10000>, /*AONAPB base*/
- <0x402B0000 0x10000>, /*PMU base*/
- <0x402D0000 0x1000>, /*AONCKG base*/
- <0x402A0000 0x1000> ; /*PIN base*/
- };
+ sprd_fm@40270000 {
+ compatible = "sprd,sprd_fm";
+ reg = <0x40270000 0x1000 0x402e0000 0x10000 0x402b0000 0x10000 0x402d0000 0x1000 0x402a0000 0x1000>;
+ };
- /* sipc initializer */
- sipc: sipc@0x87800000 {
+ sipc@0x87800000 {
compatible = "sprd,sipc";
- reg = <0x87800000 0x200000>; /* <SMEM SIZE>*/
- //#interrupt-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x8000000 0x88000000 0x1b00000>,
- <0x07800000 0x87800000 0x140000>,
- <0x9aff000 0x89aff000 0x1000>,
- <0x0a800000 0x8a800000 0x201000>,/*WCN MEMORY:OFFSET ADDRESS SIZE*/
- <0x07940000 0x87940000 0xc0000>,
- <0x0aa00000 0x8aa00000 0x1000>;/*WCN SIPC-RING:OFFSET ADDRESS SIZE*/
+ reg = <0x87800000 0x200000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ ranges = <0x8000000 0x88000000 0x1b00000 0x7800000 0x87800000 0x140000 0x9aff000 0x89aff000 0x1000 0xa800000 0x8a800000 0x201000 0x7940000 0x87940000 0xc0000 0xaa00000 0x8aa00000 0x1000>;
+
sipc_cpw@0x8000000 {
sprd,name = "sipc-w";
- sprd,dst = <2>;
- sprd,ap2cp = <0x402c0000>; /* base on ipi reggister */
+ sprd,dst = <0x2>;
+ sprd,ap2cp = <0x402c0000>;
sprd,cp2ap = <0x402c0004>;
- sprd,trig = <0x01>; /* trigger bit */
- sprd,clr = <0x01>; /* clear bit */
- interrupts = <0 68 0x0>;
- reg = <0x8000000 0x1b00000> , /* <CP_start_addr size> */
- <0x07800000 0x140000>, /* <SMEM_phy_addr total_size> */
- <0x9aff000 0x1000>; /* smsg ring buffer <base size> */
+ sprd,trig = <0x1>;
+ sprd,clr = <0x1>;
+ interrupts = <0x0 0x44 0x0>;
+ reg = <0x8000000 0x1b00000 0x7800000 0x140000 0x9aff000 0x1000>;
};
+
sipc_wcn@0x0a800000 {
sprd,name = "sipc-wcn";
- sprd,dst = <3>;
- sprd,ap2cp = <0x402c0000>; /* base on ipi reggister */
+ sprd,dst = <0x3>;
+ sprd,ap2cp = <0x402c0000>;
sprd,cp2ap = <0x402c0004>;
- sprd,trig = <0x100>; /* trigger bit */
- sprd,clr = <0x100>; /* clear bit */
- interrupts = <0 73 0x0>;
- reg = <0x0a800000 0x201000> , /* <CP_start_addr size> */
- <0x07940000 0xc0000>, /* <SMEM_phy_addr total_size> */
- <0x0aa00000 0x1000>; /* smsg ring buffer <base size> */
+ sprd,trig = <0x100>;
+ sprd,clr = <0x100>;
+ interrupts = <0x0 0x49 0x0>;
+ reg = <0xa800000 0x201000 0x7940000 0xc0000 0xaa00000 0x1000>;
};
-
};
-
- /* cpw virtual devices */
-
spipe-cpw {
compatible = "sprd,spipe";
sprd,name = "spipe_w";
- sprd,dst = <2>;
- sprd,channel = <4>;
- sprd,ringnr = <9>;
- sprd,size-rxbuf = <0x1000>; /* 4*1024 */
- sprd,size-txbuf = <0x1000>; /* 4*1024 */
+ sprd,dst = <0x2>;
+ sprd,channel = <0x4>;
+ sprd,ringnr = <0x9>;
+ sprd,size-rxbuf = <0x1000>;
+ sprd,size-txbuf = <0x1000>;
};
slog-cpw {
compatible = "sprd,spipe";
sprd,name = "slog_w";
- sprd,dst = <2>;
- sprd,channel = <5>;
- sprd,ringnr = <1>;
- sprd,size-rxbuf = <0x40000>; /* 256*1024*/
- sprd,size-txbuf = <0x8000>; /* 32*1024 */
+ sprd,dst = <0x2>;
+ sprd,channel = <0x5>;
+ sprd,ringnr = <0x1>;
+ sprd,size-rxbuf = <0x40000>;
+ sprd,size-txbuf = <0x8000>;
};
stty-cpw {
compatible = "sprd,spipe";
sprd,name = "stty_w";
- sprd,dst = <2>;
- sprd,channel = <6>;
- sprd,ringnr = <32>;
- sprd,size-rxbuf = <0x0800>; /* 2*1024*/
- sprd,size-txbuf = <0x0800>; /* 2*1024 */
+ sprd,dst = <0x2>;
+ sprd,channel = <0x6>;
+ sprd,ringnr = <0x20>;
+ sprd,size-rxbuf = <0x800>;
+ sprd,size-txbuf = <0x800>;
};
dual_sim_plug-cpw {
- compatible = "sprd,dual_sim_plug";
- sprd,name = "dual_sim_plug_w";
- sprd,dst = <2>;
- sprd,channel = <21>;
- sprd,sim1_gpio = <201>;
- sprd,sim2_gpio = <193>;
+ compatible = "sprd,dual_sim_plug";
+ sprd,name = "dual_sim_plug_w";
+ sprd,dst = <0x2>;
+ sprd,channel = <0x15>;
+ sprd,sim1_gpio = <0xc9>;
+ sprd,sim2_gpio = <0xc1>;
};
seth0-cpw {
compatible = "sprd,seth";
sprd,name = "seth_w0";
- sprd,dst = <2>;
- sprd,channel = <7>;
- sprd,blknum = <64>;
+ sprd,dst = <0x2>;
+ sprd,channel = <0x7>;
+ sprd,blknum = <0x40>;
};
seth1-cpw {
compatible = "sprd,seth";
sprd,name = "seth_w1";
- sprd,dst = <2>;
- sprd,channel = <8>;
- sprd,blknum = <64>;
+ sprd,dst = <0x2>;
+ sprd,channel = <0x8>;
+ sprd,blknum = <0x40>;
};
seth2-cpw {
compatible = "sprd,seth";
sprd,name = "seth_w2";
- sprd,dst = <2>;
- sprd,channel = <9>;
- sprd,blknum = <64>;
+ sprd,dst = <0x2>;
+ sprd,channel = <0x9>;
+ sprd,blknum = <0x40>;
};
- scproc_cpw: scproc@0x88000000 {
+ scproc@0x88000000 {
compatible = "sprd,scproc";
sprd,name = "cpw";
- sprd,ctrl-reg = <0x44 0x44 0xb0 0xff>; /* <shut_down deep_sleep reset get_status> */
- sprd,ctrl-mask = <0x02000000 0x10000000 0x01 0xf0000>; /* masks <> */
- sprd,iram-data = <0xe59f0000 0xe12fff10 0x88300000>; /* 3rd param equals modem_addr*/
- reg = <0x88000000 0x1b00000>, /* <CP_start_addr total_size> = <+128M 26M> */
- <0x50000000 0x0c>, /* <iram1_base size> */
- <0x402b0000 0x10000>, /* <pmu_base size> */
- <0x402b0000 0x10000>, /* <pmu_base size> */
- <0x402b0000 0x10000>, /* <pmu_base size> */
- <0x402b0000 0x10000>; /* <pmu_base size> */
- interrupts = <0 83 0x0>; /* cp1_wdg_int */
- #address-cells = <1>;
- #size-cells = <1>;
- /* segnr=2 */
- ranges = <0x300000 0x88300000 0x00800000>,
- <0x20000 0x88020000 0x00220000>,
- <0x1affc00 0x89affc00 0x00000400>,
- <0x240000 0x88240000 0x40000>,
- <0x280000 0x88280000 0x60000>;
+ sprd,ctrl-reg = <0x44 0x44 0xb0 0xff>;
+ sprd,ctrl-mask = <0x2000000 0x10000000 0x1 0xf0000>;
+ sprd,iram-data = <0xe59f0000 0xe12fff10 0x88300000>;
+ reg = <0x88000000 0x1b00000 0x50000000 0xc 0x402b0000 0x10000 0x402b0000 0x10000 0x402b0000 0x10000 0x402b0000 0x10000>;
+ interrupts = <0x0 0x53 0x0>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ ranges = <0x300000 0x88300000 0x800000 0x20000 0x88020000 0x220000 0x1affc00 0x89affc00 0x400 0x240000 0x88240000 0x40000 0x280000 0x88280000 0x60000>;
+
modem@0x300000 {
cproc,name = "modem";
- reg = <0x300000 0x00800000>; /* <modem_addr size> */
+ reg = <0x300000 0x800000>;
};
+
dsp@0x20000 {
cproc,name = "dsp";
- reg = <0x20000 0x00220000>; /* <dsp_addr size>*/
+ reg = <0x20000 0x220000>;
};
- cpcmdline@0x1affc00{
+
+ cpcmdline@0x1affc00 {
cproc,name = "cpcmdline";
reg = <0x1affc00 0x400>;
};
+
fixnv@0x240000 {
cproc,name = "fixnv";
reg = <0x240000 0x40000>;
};
+
runnv@0x280000 {
cproc,name = "runnv";
reg = <0x280000 0x60000>;
};
};
- saudio_w{
+ saudio_w {
compatible = "sprd,saudio";
- sprd,saudio-dst-id = <2>;
- sprd,ctrl_channel = <10>; /* SMSG_CH_VBC */
- sprd,playback_channel = <11>; /* SMSG_CH_PLAYBACK */
- sprd,capture_channel = <12>; /* SMSG_CH_CAPTURE */
- sprd,monitor_channel = <13>; /*SMSG_CH_MONITOR_AUDIO */
+ sprd,saudio-dst-id = <0x2>;
+ sprd,ctrl_channel = <0xa>;
+ sprd,playback_channel = <0xb>;
+ sprd,capture_channel = <0xc>;
+ sprd,monitor_channel = <0xd>;
sprd,saudio-names = "VIRTUAL AUDIO W";
};
- saudio_voip{
+
+ saudio_voip {
compatible = "sprd,saudio";
- sprd,saudio-dst-id = <2>;
- sprd,ctrl_channel = <14>; /* SMSG_CH_CTRL_VOIP */
- sprd,playback_channel = <15>; /* SMSG_CH_PLAYBACK_VOIP */
- sprd,capture_channel = <16>; /* SMSG_CH_CAPTURE_VOIP */
- sprd,monitor_channel = <17>; /*SMSG_CH_MONITOR_VOIP */
+ sprd,saudio-dst-id = <0x2>;
+ sprd,ctrl_channel = <0xe>;
+ sprd,playback_channel = <0xf>;
+ sprd,capture_channel = <0x10>;
+ sprd,monitor_channel = <0x11>;
sprd,saudio-names = "saudiovoip";
};
- /* cpwcn virtual devices */
-
- spipe_cpwcn {
+ spipe_cpwcn {
compatible = "sprd,spipe";
sprd,name = "spipe_wcn";
- sprd,dst = <3>;
- sprd,channel = <4>;
- sprd,ringnr = <12>;
- sprd,size-rxbuf = <0x1000>; /* 4*1024 */
- sprd,size-txbuf = <0x1000>; /* 4*1024 */
- };
+ sprd,dst = <0x3>;
+ sprd,channel = <0x4>;
+ sprd,ringnr = <0xc>;
+ sprd,size-rxbuf = <0x1000>;
+ sprd,size-txbuf = <0x1000>;
+ };
slog_cpwcn {
compatible = "sprd,spipe";
sprd,name = "slog_wcn";
- sprd,dst = <3>;
- sprd,channel = <5>;
- sprd,ringnr = <1>;
- sprd,size-rxbuf = <0x40000>; /* 256*1024*/
- sprd,size-txbuf = <0x8000>; /* 32*1024 */
+ sprd,dst = <0x3>;
+ sprd,channel = <0x5>;
+ sprd,ringnr = <0x1>;
+ sprd,size-rxbuf = <0x40000>;
+ sprd,size-txbuf = <0x8000>;
};
stty4bt_cpwcn {
compatible = "sprd,stty4bt";
sprd,name = "sttybt";
- sprd,dst = <3>;
- sprd,channel = <4>;
- sprd,bufid = <10>;
+ sprd,dst = <0x3>;
+ sprd,channel = <0x4>;
+ sprd,bufid = <0xa>;
};
-
- scproc_cpwcn: scproc@0x8a800000 {
+ scproc@0x8a800000 {
compatible = "sprd,scproc";
sprd,name = "cpwcn";
- sprd,ctrl-reg = <0x68 0x68 0xb0 0xb0>; /* <shut_down deep_sleep reset get_status> */
- sprd,ctrl-mask = <0x02000000 0x10000000 0x04 0x04>; /* masks <> */
- sprd,iram-data = <0xe59f0000 0xe12fff10 0x8a808000>; /* 3rd param equals modem_addr*/
- reg = <0x8a800000 0x201000>, /* <CP_start_addr total_size> = <+168M 2M+4k> */
- <0x50003000 0x1000>, /* <iram1_phys size> use iram1 phys because of cp2 iram not maped */
- <0x402b0000 0x10000>, /* <pmu_base size> */
- <0x402b0000 0x10000>, /* <pmu_base size> */
- <0x402b0000 0x10000>, /* <pmu_base size> */
- <0x402b0000 0x10000>; /* <pmu_base size> */
- interrupts = <0 85 0x0>; /* cp2_wdg_int */
- #address-cells = <1>;
- #size-cells = <1>;
- /* segnr=1 */
+ sprd,ctrl-reg = <0x68 0x68 0xb0 0xb0>;
+ sprd,ctrl-mask = <0x2000000 0x10000000 0x4 0x4>;
+ sprd,iram-data = <0xe59f0000 0xe12fff10 0x8a808000>;
+ reg = <0x8a800000 0x201000 0x50003000 0x1000 0x402b0000 0x10000 0x402b0000 0x10000 0x402b0000 0x10000 0x402b0000 0x10000>;
+ interrupts = <0x0 0x55 0x0>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
ranges = <0x8000 0x8a808000 0x201000>;
+
modem@0x8000 {
cproc,name = "modem";
- reg = <0x8000 0x201000>; /* <modem_addr size> */
+ reg = <0x8000 0x201000>;
};
};
- sprd_wlan{
+ sprd_wlan {
compatible = "sprd,sprd_wlan";
};
- sdios{
- #address-cells = <2>;
- #size-cells = <2>;
+ sdios {
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
ranges;
- sdio3: sdio@20600000{
- compatible = "sprd,sdhost-3.0";
- reg = <0 0x20600000 0 0x1000>;
- interrupts = <0 60 0x0>;
+
+ sdio@20600000 {
+ compatible = "sprd,sdhost-3.0";
+ reg = <0x0 0x20600000 0x0 0x1000>;
+ interrupts = <0x0 0x3c 0x0>;
sprd,name = "sdio_emmc";
- /* detect_gpio = <-1>; */
SD_Pwr_Name = "vddemmccore";
_1_8V_signal_Name = "vddgen0";
- signal_default_Voltage = <1800000>;
- ocr_avail = <0x00040000>;
- clocks = <&clk_emmc>, <&clk_192m>;
- base_clk = <192000000>;
- bus-width = <8>;
- caps = <0xC00F8D47>;
+ signal_default_Voltage = <0x1b7740>;
+ ocr_avail = <0x40000>;
+ clocks = <0x42 0x1a>;
+ base_clk = <0xb71b000>;
+ bus-width = <0x8>;
+ caps = <0xc00f8d47>;
caps2 = <0x202>;
pm_caps = <0x4>;
writeDelay = <0x17>;
@@ -792,20 +2574,19 @@
readNegDelay = <0x4>;
};
- sdio0: sdio@20300000{
- compatible = "sprd,sdhost-3.0";
- reg = <0 0x20300000 0 0x1000>;
- interrupts = <0 57 0x0>;
+ sdio@20300000 {
+ compatible = "sprd,sdhost-3.0";
+ reg = <0x0 0x20300000 0x0 0x1000>;
+ interrupts = <0x0 0x39 0x0>;
sprd,name = "sdio_sd";
- detect_gpio = <237>;
SD_Pwr_Name = "vddsdcore";
_1_8V_signal_Name = "vddsdio";
- signal_default_Voltage = <3000000>;
- ocr_avail = <0x00040000>;
- clocks = <&clk_sdio0>, <&clk_192m>;
- base_clk = <192000000>;
- bus-width = <4>;
- caps = <0xC0038407>;
+ signal_default_Voltage = <0x2dc6c0>;
+ ocr_avail = <0x40000>;
+ clocks = <0x43 0x1a>;
+ base_clk = <0xb71b000>;
+ bus-width = <0x4>;
+ caps = <0xc0038407>;
caps2 = <0x200>;
pm_caps = <0x4>;
writeDelay = <0x3>;
@@ -814,418 +2595,389 @@
};
};
- usb: usb@20200000{
- compatible = "sprd,usb";
- interrupts = <0 55 0x0>;
- vbus-gpios = <&a_eic_gpio 0 0>;
- id-gpios = <&d_gpio_gpio 72 0>;
- reg = <0x20200000 0x1000>;
- tune_value = <0xd3200020>;
- usb-supply = <&vddusb>;
- phy-type = "usb20_sprd_phy";
- #address-cells = <1>;
- #size-cells = <0>;
- };
- sprd_thermal: thermal@402F0000{
+ usb@20200000 {
+ compatible = "sprd,usb";
+ interrupts = <0x0 0x37 0x0>;
+ vbus-gpios = <0x31 0x0 0x0>;
+ id-gpios = <0x38 0x48 0x0>;
+ reg = <0x20200000 0x1000>;
+ tune_value = <0xd3200020>;
+ usb-supply = <0x44>;
+ phy-type = "usb20_sprd_phy";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ };
+
+ thermal@402F0000 {
compatible = "sprd,ddie-thermal";
- interrupts = <0 26 0x0>;
- reg = <0x402f0000 0x1000>;
+ interrupts = <0x0 0x1a 0x0>;
+ reg = <0x402f0000 0x1000>;
+
sensor_arm {
- id = <0>;
- temp-inteval=<0>;
- thermal-name = "sprd_arm_thm";
- trip0-temp-active = <65000>;
- trip0-type = "active";
- trip0-temp-lowoff = <0>;
- trip0-cdev-num = <1>;
- trip0-cdev-name0 = "thermal-cpufreq-0";
- trip1-temp-active = <72000>;
- trip1-type = "active";
- trip1-temp-lowoff = <57000>;
- trip1-cdev-num = <1>;
- trip1-cdev-name0 = "thermal-cpufreq-0";
- trip2-temp-active = <95000>;
- trip2-type = "active";
- trip2-temp-lowoff = <64000>;
- trip2-cdev-num = <1>;
- trip2-cdev-name0 = "thermal-cpufreq-0";
- trip3-temp-active = <110000>;
- trip3-type = "critical";
- trip3-temp-lowoff = <80000>;
- trip3-cdev-num = <1>;
- trip3-cdev-name0 = "thermal-cpufreq-0";
- trip-points-critical = <119000>;
- trip-num = <5>;
- };
- };
- pmic_thermal: thermal_adi@40038280{
+ id = <0x0>;
+ temp-inteval = <0x0>;
+ thermal-name = "sprd_arm_thm";
+ trip0-temp-active = <0xfde8>;
+ trip0-type = "active";
+ trip0-temp-lowoff = <0x0>;
+ trip0-cdev-num = <0x1>;
+ trip0-cdev-name0 = "thermal-cpufreq-0";
+ trip1-temp-active = <0x11940>;
+ trip1-type = "active";
+ trip1-temp-lowoff = <0xdea8>;
+ trip1-cdev-num = <0x1>;
+ trip1-cdev-name0 = "thermal-cpufreq-0";
+ trip2-temp-active = <0x17318>;
+ trip2-type = "active";
+ trip2-temp-lowoff = <0xfa00>;
+ trip2-cdev-num = <0x1>;
+ trip2-cdev-name0 = "thermal-cpufreq-0";
+ trip3-temp-active = <0x1adb0>;
+ trip3-type = "critical";
+ trip3-temp-lowoff = <0x13880>;
+ trip3-cdev-num = <0x1>;
+ trip3-cdev-name0 = "thermal-cpufreq-0";
+ trip-points-critical = <0x1d0d8>;
+ trip-num = <0x5>;
+ };
+ };
+
+ thermal_adi@40038280 {
compatible = "sprd,sc2723-thermal";
thermal-name = "sprd_pmic_thm";
- id = <2>;
- interrupt-parent = <&adi>;
- interrupts = <9 0x0>;
+ id = <0x2>;
+ interrupt-parent = <0x28>;
+ interrupts = <0x9 0x0>;
reg = <0x40038280 0x1000>;
- temp-inteval=<0>;
- trip0-temp-active = <110000>;
+ temp-inteval = <0x0>;
+ trip0-temp-active = <0x1adb0>;
trip0-type = "active";
- trip0-temp-lowoff = <90000>;
- trip0-cdev-num = <0>;
- trip-points-critical = <110000>;
- trip-num = <2>;
+ trip0-temp-lowoff = <0x15f90>;
+ trip0-cdev-num = <0x0>;
+ trip-points-critical = <0x1adb0>;
+ trip-num = <0x2>;
};
- sprd_cpu_cooling{
+
+ sprd_cpu_cooling {
compatible = "sprd,sprd-cpu-cooling";
- id = <0>;
- };
-
- spi0: spi@70a00000{
- compatible = "sprd,sprd-spi";
- interrupts = <0 7 0x0>;
- reg = <0x70a00000 0x1000>;
- clock-names = "clk_spi0";
- #address-cells = <1>;
- #size-cells = <0>;
- };
- spi1: spi@70b00000{
- compatible = "sprd,sprd-spi";
- interrupts = <0 8 0x0>;
- reg = <0x70b00000 0x1000>;
- clock-names = "clk_spi1";
- #address-cells = <1>;
- #size-cells = <0>;
- };
- spi2: spi@70c00000{
- compatible = "sprd,sprd-spi";
- interrupts = <0 9 0x0>;
- reg = <0x70c00000 0x1000>;
- clock-names = "clk_spi2";
- #address-cells = <1>;
- #size-cells = <0>;
- };
- dmac: dmac@20100000{
- compatible = "sprd,sprd-dma";
- interrupts = <0 50 0x0>;
- reg = <0x20100000 0x4000>;
- };
- adc: adc@40038300{
- compatible = "sprd,sprd-adc";
- reg = <0x40038300 0x400>;
- };
- hwspinlock0: hwspinlock0@20c00000{
- compatible = "sprd,sprd-hwspinlock";
- reg = <0x20c00000 0x1000>;
- };
- hwspinlock1: hwspinlock1@40060000{
- compatible = "sprd,sprd-hwspinlock";
- reg = <0x40060000 0x1000>;
- };
+ id = <0x0>;
+ };
+
+ spi@70a00000 {
+ compatible = "sprd,sprd-spi";
+ interrupts = <0x0 0x7 0x0>;
+ reg = <0x70a00000 0x1000>;
+ clock-names = "clk_spi0";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ };
+
+ spi@70b00000 {
+ compatible = "sprd,sprd-spi";
+ interrupts = <0x0 0x8 0x0>;
+ reg = <0x70b00000 0x1000>;
+ clock-names = "clk_spi1";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ };
+
+ spi@70c00000 {
+ compatible = "sprd,sprd-spi";
+ interrupts = <0x0 0x9 0x0>;
+ reg = <0x70c00000 0x1000>;
+ clock-names = "clk_spi2";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ };
+
+ dmac@20100000 {
+ compatible = "sprd,sprd-dma";
+ interrupts = <0x0 0x32 0x0>;
+ reg = <0x20100000 0x4000>;
+ };
+
+ adc@40038300 {
+ compatible = "sprd,sprd-adc";
+ reg = <0x40038300 0x400>;
+ };
+
+ hwspinlock0@20c00000 {
+ compatible = "sprd,sprd-hwspinlock";
+ reg = <0x20c00000 0x1000>;
+ };
+
+ hwspinlock1@40060000 {
+ compatible = "sprd,sprd-hwspinlock";
+ reg = <0x40060000 0x1000>;
+ };
+
gpu@60000000 {
compatible = "arm,mali-400", "arm,mali-utgard";
reg = <0x60000000 0x10000>;
- interrupts = <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>, <0 39 0>;
+ interrupts = <0x0 0x27 0x0 0x0 0x27 0x0 0x0 0x27 0x0 0x0 0x27 0x0 0x0 0x27 0x0>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPMU";
-
pmu_domain_config = <0x1000 0x1000 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1000 0x0 0x0>;
pmu_switch_delay = <0xffff>;
+ clocks = <0x45 0x46 0xd 0x20 0x1b 0x1c 0x1d 0x21 0x22>;
+ clock-names = "clk_gpu_axi", "clk_gpu", "clk_153m6", "clk_208m", "clk_256m", "clk_312m", "clk_384m", "clk_460m8", "clk_512m";
+ freq-list-len = <0x4>;
+ freq-lists = <0x25800 0x2 0x1 0x3e800 0x4 0x1 0x5dc00 0x6 0x1 0x7d000 0x8 0x1>;
+ freq-default = <0x1>;
+ freq-9 = <0x2>;
+ freq-8 = <0x1>;
+ freq-7 = <0x0>;
+ freq-5 = <0x0>;
+ freq-range-max = <0x3>;
+ freq-range-min = <0x0>;
+ };
+
+ ion {
+ compatible = "sprd,ion-sprd";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ sprd,ion-heap@1 {
+ reg = <0x1>;
+ reg-names = "ion_heap_system";
+ sprd,ion-heap-type = <0x0>;
+ sprd,ion-heap-mem = <0x0 0x0>;
+ };
- clocks = <&clk_gpu_axi>,<&clk_gpu>,<&clk_153m6>,<&clk_208m>,<&clk_256m>,<&clk_312m>,<&clk_384m>,<&clk_460m8>,<&clk_512m>;
- clock-names = "clk_gpu_axi","clk_gpu","clk_153m6","clk_208m","clk_256m","clk_312m","clk_384m","clk_460m8","clk_512m";
-
- freq-list-len = <4>;
- freq-lists = <153600 2 1>, <256000 4 1>, <384000 6 1>, <512000 8 1>;
- freq-default = <1>;
- freq-9 = <2>;
- freq-8 = <1>;
- freq-7 = <0>;
- freq-5 = <0>;
- freq-range-max = <3>;
- freq-range-min = <0>;
- };
- ion {
- compatible = "sprd,ion-sprd";
- #address-cells = <1>;
- #size-cells = <0>;
-
- sprd,ion-heap@1 {
- reg = <1>; /* SYSTEM */
- reg-names = "ion_heap_system";
- sprd,ion-heap-type = <0>; /* SYSTEM */
- sprd,ion-heap-mem = <0x0 0x0>;
- };
-
- sprd,ion-heap@2 {
- reg = <2>; /* MM */
- reg-names = "ion_heap_carveout_mm";
- sprd,ion-heap-type = <0>; /* carveout mm */
- sprd,ion-heap-mem = <0x98800000 0x7100000>;
- };
+ sprd,ion-heap@2 {
+ reg = <0x2>;
+ reg-names = "ion_heap_carveout_mm";
+ sprd,ion-heap-type = <0x0>;
+ sprd,ion-heap-mem = <0x98800000 0x7100000>;
+ };
sprd,ion-heap@3 {
- reg = <3>; /* OVERLAY */
+ reg = <0x3>;
reg-names = "ion_heap_carveout_overlay";
- sprd,ion-heap-type = <2>; /* CARVEOUT */
- sprd,ion-heap-reserved = <1>; /*This attribute use to indicate use reserved_memory node*/
- sprd,ion-heap-mem = <&overlay_reserved>;/* 480*854*4*2, 8K alignment, for display size*/
+ sprd,ion-heap-type = <0x2>;
+ sprd,ion-heap-reserved = <0x1>;
+ sprd,ion-heap-mem = <0x47>;
};
+
sprd,ion-heap@4 {
- reg = <4>; /* FB */
+ reg = <0x4>;
reg-names = "ion_heap_carveout_fb";
- sprd,ion-heap-type = <2>; /* CARVEOUT */
- sprd,ion-heap-reserved = <1>; /*This attribute use to indicate use reserved_memory node*/
- sprd,ion-heap-mem = <&fb_reserved>;
- };
-
- };
- sprd_iommu0:sprd_iommu@21400000 {
- compatible = "sprd,sprd_iommu";//gsp
- func-name = "sprd_iommu_gsp";
- reg = <0x10000000 0x2000000>, //iova
- <0x21400000 0x8000>, //pgt
- <0x21408000 0x8000>; //ctrl_reg
- reg_name = "iova","pgt","ctrl_reg";
- clock-names = "clk_gsp_emc","clk_153m6","clk_gsp";
- clocks = <&clk_gsp_emc>, <&clk_153m6>,<&clk_gsp>;
- status = "ok";
- };
- sprd_iommu1:sprd_iommu@60f00000 {
- compatible = "sprd,sprd_iommu";//mm
- func-name = "sprd_iommu_mm";
- reg = <0x20000000 0x8000000>, //iova
- <0x60f00000 0x20000>, //pgt
- <0x60f20000 0x2000>; //ctrl_reg
- reg_name = "iova","pgt","ctrl_reg";
- clock-names = "clk_mmu","clk_mm_i","clk_mm_axi";
- clocks = <&clk_mmu>,<&clk_mm>,<&clk_mm_axi>;
- status = "ok";
- };
-
- sprd_rf2351: sprd_rf2351@40070000{
- compatible = "sprd,sprd_rf2351";
- reg = <0X40070000 0x1000>, /*RFSPI*/
- <0X402E0000 0x10000>; /*APB_EB0*/
+ sprd,ion-heap-type = <0x2>;
+ sprd,ion-heap-reserved = <0x1>;
+ sprd,ion-heap-mem = <0x48>;
+ };
+ };
+
+ sprd_iommu@21400000 {
+ compatible = "sprd,sprd_iommu";
+ func-name = "sprd_iommu_gsp";
+ reg = <0x10000000 0x2000000 0x21400000 0x8000 0x21408000 0x8000>;
+ reg_name = "iova", "pgt", "ctrl_reg";
+ clock-names = "clk_gsp_emc", "clk_153m6", "clk_gsp";
+ clocks = <0x41 0xd 0x40>;
+ status = "ok";
+ };
+
+ sprd_iommu@60f00000 {
+ compatible = "sprd,sprd_iommu";
+ func-name = "sprd_iommu_mm";
+ reg = <0x20000000 0x8000000 0x60f00000 0x20000 0x60f20000 0x2000>;
+ reg_name = "iova", "pgt", "ctrl_reg";
+ clock-names = "clk_mmu", "clk_mm_i", "clk_mm_axi";
+ clocks = <0x49 0x23 0x24>;
+ status = "ok";
+ };
+
+ sprd_rf2351@40070000 {
+ compatible = "sprd,sprd_rf2351";
+ reg = <0x40070000 0x1000 0x402e0000 0x10000>;
clock-names = "clk_cpll";
- clocks = <&clk_cpll>;
- };
- gps_2351: gps_2351@21c00000{
- compatible = "sprd,gps_2351";
- interrupts = <0 52 0x0>;
- gpios = <&d_gpio_gpio 58 0>;
- reg = <0X21C00000 0x1000>, /*GPS CORE BASE*/
- <0X20D00000 0x10000>, /*AHB_ADDR*/
- <0X402B0000 0x10000>; /*PMU BASE*/
- };
+ clocks = <0x6>;
+ };
+
+ gps_2351@21c00000 {
+ compatible = "sprd,gps_2351";
+ interrupts = <0x0 0x34 0x0>;
+ gpios = <0x38 0x3a 0x0>;
+ reg = <0x21c00000 0x1000 0x20d00000 0x10000 0x402b0000 0x10000>;
+ };
sprd-io-base {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0x80000000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ ranges = <0x0 0x0 0x80000000>;
+
ahb {
compatible = "sprd,ahb";
reg = <0x20d00000 0x10000>;
};
+
aonapb {
compatible = "sprd,aonapb";
reg = <0x402e0000 0x10000>;
};
+
apbreg {
compatible = "sprd,apbreg";
reg = <0x71300000 0x10000>;
};
+
pmu {
compatible = "sprd,pmu";
reg = <0x402b0000 0x10000>;
};
+
mmahb {
compatible = "sprd,mmahb";
reg = <0x60d00000 0x4000>;
};
+
mmckg {
compatible = "sprd,mmckg";
reg = <0x60e00000 0x1000>;
};
+
adislave {
compatible = "sprd,adislave";
reg = <0x40038000 0x1000>;
};
+
gpuapb {
compatible = "sprd,gpuapb";
reg = <0x60100000 0x1000>;
};
+
aonckg {
compatible = "sprd,aonckg";
reg = <0x402d0000 0x1000>;
};
+
apbckg {
compatible = "sprd,apbckg";
reg = <0x71200000 0x10000>;
};
+
core {
compatible = "sprd,core";
reg = <0x12000000 0x10000>;
};
+
int {
compatible = "sprd,int";
reg = <0x40200000 0x1000>;
};
+
intc0 {
compatible = "sprd,intc0";
reg = <0x71400000 0x1000>;
};
+
intc1 {
compatible = "sprd,intc1";
reg = <0x71500000 0x1000>;
};
+
intc2 {
compatible = "sprd,intc2";
reg = <0x71600000 0x1000>;
};
+
intc3 {
compatible = "sprd,intc3";
reg = <0x71700000 0x1000>;
};
+
uidefuse {
compatible = "sprd,uidefuse";
reg = <0x40240000 0x1000>;
};
+
ca7wdg {
compatible = "sprd,ca7wdg";
reg = <0x40320000 0x1000>;
};
+
wdg {
compatible = "sprd,wdg";
reg = <0x40290000 0x1000>;
};
+
ipi {
compatible = "sprd,ipi";
reg = <0x402c0000 0x1000>;
};
+
syscnt {
compatible = "sprd,syscnt";
reg = <0x40230000 0x1000>;
};
+
dma0 {
compatible = "sprd,dma0";
reg = <0x20100000 0x4000>;
};
+
pub {
compatible = "sprd,pub";
reg = <0x300e0000 0x10000>;
};
+
pin {
compatible = "sprd,pin";
reg = <0x402a0000 0x1000>;
};
+
axibm0 {
- compatible = "sprd,axibm0";
- reg = <0 0x30040000 0 0x20000>;
- interrupts = <0 86 0x0>;
+ compatible = "sprd,axibm0";
+ reg = <0x0 0x30040000 0x0 0x20000>;
+ interrupts = <0x0 0x56 0x0>;
};
};
+
sprd_bm {
compatible = "sprd,sprd_bm";
- reg = <0x30040000 0xA0000>,
- <0x20E00000 0x300000>;
- interrupts = <0 86 0x0>;
- sprd,bm_status = <1>;
- sprd,bm_count = <10 10>;
- sprd,mm_chn = <0 1>;
- sprd,gpu_chn = <1 1>;
- sprd,disp_chn = <2 1>;
- sprd,cpu_chn = <3 1>;
- sprd,cp0_arm1_chn = <4 1>;
- sprd,cp0_arm0_chn = <5 1>;
- sprd,ap_chn = <6 1>;
- sprd,zip_chn = <7 1>;
- sprd,cp2_chn = <8 1>;
- sprd,cp0_dsp_chn = <9 1>;
- sprd,ap_cpu_chn = <0 0>;
- sprd,ap_dap_chn = <0 1>;
- sprd,ap_dma_w_chn = <1 0>;
- sprd,ap_dma_r_chn = <1 1>;
- sprd,ap_sdio_0_chn = <1 2>;
- sprd,ap_sdio_1_chn = <1 3>;
- sprd,ap_emmc_chn = <2 0>;
- sprd,ap_sdio_2_chn = <2 1>;
- sprd,ap_nfc_chn = <2 2>;
- sprd,ap_usb_chn = <2 3>;
+ reg = <0x30040000 0xa0000 0x20e00000 0x300000>;
+ interrupts = <0x0 0x56 0x0>;
+ sprd,bm_status = <0x1>;
+ sprd,bm_count = <0xa 0xa>;
+ sprd,mm_chn = <0x0 0x1>;
+ sprd,gpu_chn = <0x1 0x1>;
+ sprd,disp_chn = <0x2 0x1>;
+ sprd,cpu_chn = <0x3 0x1>;
+ sprd,cp0_arm1_chn = <0x4 0x1>;
+ sprd,cp0_arm0_chn = <0x5 0x1>;
+ sprd,ap_chn = <0x6 0x1>;
+ sprd,zip_chn = <0x7 0x1>;
+ sprd,cp2_chn = <0x8 0x1>;
+ sprd,cp0_dsp_chn = <0x9 0x1>;
+ sprd,ap_cpu_chn = <0x0 0x0>;
+ sprd,ap_dap_chn = <0x0 0x1>;
+ sprd,ap_dma_w_chn = <0x1 0x0>;
+ sprd,ap_dma_r_chn = <0x1 0x1>;
+ sprd,ap_sdio_0_chn = <0x1 0x2>;
+ sprd,ap_sdio_1_chn = <0x1 0x3>;
+ sprd,ap_emmc_chn = <0x2 0x0>;
+ sprd,ap_sdio_2_chn = <0x2 0x1>;
+ sprd,ap_nfc_chn = <0x2 0x2>;
+ sprd,ap_usb_chn = <0x2 0x3>;
};
+
wdt@40290000 {
compatible = "sprd,sprd-wdt";
- reg = <0x40290000 0x1000>,
- <0x40320000 0x1000>;
- interrupts = <0 124 0x0>;
+ reg = <0x40290000 0x1000 0x40320000 0x1000>;
+ interrupts = <0x0 0x7c 0x0>;
};
+
sprd_sysdump {
compatible = "sprd,sysdump";
- magic-addr = < 0x85500000 0x100000>;
- ram = &memory;
- modem = <0x88000000 0x1b00000>;/* e.g. cpw modem*/
- iomem = <0x40290000 0x1000>;/* e.g. wdt*/
+ magic-addr = <0x85500000 0x100000>;
+ ram = "/memory";
+ modem = <0x88000000 0x1b00000>;
+ iomem = <0x40290000 0x1000>;
};
-};
-
-&vbc_r2p0 {
- status = "okay";
-};
-
-&sprd_codec {
- status = "okay";
- sprd,audio_power_ver = <4>;
-};
-
-&i2s0 {
- sprd,config_type = "pcm";
- sprd,slave_timeout = <0xF11>;
- sprd,_hw_port = <0>;
- sprd,fs = <8000>;
- sprd,bus_type = <1>;
- sprd,rtx_mode = <3>;
- sprd,byte_per_chan = <1>;
- sprd,slave_mode = <0>;
- sprd,lsb = <1>;
- sprd,lrck = <1>;
- sprd,low_for_left = <1>;
- sprd,clk_inv = <0>;
- sprd,pcm_short_frame = <1>;
- sprd,pcm_slot = <0x1>;
- sprd,pcm_cycle = <1>;
- sprd,tx_watermark = <12>;
- sprd,rx_watermark = <20>;
- status = "okay";
-};
-&i2s1 {
- status = "okay";
-};
-
-
-
-&i2s_sound {
- sprd,i2s = <&i2s0>, <&i2s1>;
-};
-&sprd_battery {
- gpios = <&a_eic_gpio 0 0 /* chg int */
- &a_eic_gpio 4 0 /* cv state */
- &a_eic_gpio 6 0 /* chg ovi */
- &a_eic_gpio 9 0>; /* battery detect */
-
- fgu-mode = <0>;
- alm-soc = <5>;
- alm-vol = <3500>;
- soft-vbat-uvlo = <3100>;
- rint = <250>;
- cnom = <1900>;
- rsense-real = <200>;
- rsense-spec = <200>;
- relax-current = <50>;
- fgu-cal-ajust = <0>;
- ocv-tab-size = <21>;
- ocv-tab-vol = <4168 4113 4076 4016 3973 3953 3924 3894 3851 3821 3802 3789 3780 3777 3771 3758 3738 3703 3684 3609 3400>;
- ocv-tab-cap = <100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0>;
-};
-&vddcore{
- hide-offset = <1150>;/*kernel hide_offset = hide-offset - 1000*/
-};
-&vddarm{
- hide-offset = <1150>;/*kernel hide_offset = hide-offset - 1000*/
+ hall {
+ compatible = "sprd,hall-detect";
+ gpio_detect = <0xc1>;
+ hall,function = <0x3>;
+ };
};
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