e5dd049cba
working: Display, Touch, Charging, USB Network, X11
27 lines
1.6 KiB
Diff
27 lines
1.6 KiB
Diff
ARM based systems the udelay function imposes a maximum of 2000 and designed to fail when higher than that,
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so I lowered the number based off various mailinglists to prevent the fail.
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diff --git a/drivers/misc/mediatek/mach/mt6795/mt_cpufreq_64.c b/drivers/misc/mediatek/mach/mt6795/mt_cpufreq_64.c
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index 760025c2..918e2713 100755
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--- a/drivers/misc/mediatek/mach/mt6795/mt_cpufreq_64.c
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+++ b/drivers/misc/mediatek/mach/mt6795/mt_cpufreq_64.c
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@@ -1848,7 +1848,7 @@ static int set_cur_volt_extbuck(struct mt_cpu_dvfs *p, unsigned int mv) /* volt:
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ret = -1;
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}
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- udelay(PMIC_SETTLE_TIME(cur_vproc_mv - MAX_DIFF_VSRAM_VPROC, cur_vproc_mv)); // TODO: always fix max gap <- refine it???
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+ udelay(20); // TODO: always fix max gap <- refine it???
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// cpufreq_dbg("@%s(), UP, cur_vsram_mv = %d, cur_vproc_mv = %d, delay = %d\n", __func__, cur_vsram_mv, cur_vproc_mv, PMIC_SETTLE_TIME(cur_vproc_mv - MAX_DIFF_VSRAM_VPROC, cur_vproc_mv));
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} while (target_vsram_mv > cur_vsram_mv);
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@@ -1891,7 +1891,7 @@ static int set_cur_volt_extbuck(struct mt_cpu_dvfs *p, unsigned int mv) /* volt:
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mt_cpufreq_set_pmic_cmd(PMIC_WRAP_PHASE_NORMAL, IDX_NM_VSRAM_CA7, VOLT_TO_PMIC_VAL(cur_vsram_mv));
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mt_cpufreq_apply_pmic_cmd(IDX_NM_VSRAM_CA7);
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- udelay(PMIC_SETTLE_TIME(cur_vproc_mv + MAX_DIFF_VSRAM_VPROC, cur_vproc_mv)); // TODO: always fix max gap <- refine it???
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+ udelay(20); // TODO: always fix max gap <- refine it???
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// cpufreq_dbg("@%s(), DOWN, cur_vsram_mv = %d, cur_vproc_mv = %d, delay = %d\n", __func__, cur_vsram_mv, cur_vproc_mv, PMIC_SETTLE_TIME(cur_vproc_mv + MAX_DIFF_VSRAM_VPROC, cur_vproc_mv));
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} while (cur_vproc_mv > mv);
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