63e2807916
- switch sources to official repo https://source.denx.de/u-boot - use tag v2021.07 - extract patches from pine64-org - enable DMA transfers from eMMC and mSD (u-boot from Megi) [ci:skip-build] already built successfully in CI
50 lines
1.6 KiB
Diff
50 lines
1.6 KiB
Diff
From 1af4c86329397bc553122c650226bd5c7acb1ed0 Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megous@megous.com>
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Date: Fri, 13 Sep 2019 22:14:43 +0200
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Subject: [PATCH 28/29] mmc: sunxi: DDR/DMA support for SPL
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---
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drivers/mmc/sunxi_mmc.c | 16 +++++++++++++++-
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1 file changed, 15 insertions(+), 1 deletion(-)
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diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
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index 47c947cdb8..855dfd35d9 100644
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--- a/drivers/mmc/sunxi_mmc.c
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+++ b/drivers/mmc/sunxi_mmc.c
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@@ -579,7 +579,12 @@ static int sunxi_mmc_send_cmd_common(struct sunxi_mmc_priv *priv,
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bytecnt = data->blocksize * data->blocks;
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debug("trans data %d bytes\n", bytecnt);
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- if (bytecnt > 64 && !IS_ENABLED(SPL_BUILD)) {
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+ // DMA doesn't work when the target is SRAM for some reason.
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+ int reading = !!(data->flags & MMC_DATA_READ);
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+ uint8_t* buf = (uint8_t*)(reading ? data->dest : data->src);
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+ bool is_dram = (uintptr_t)buf >= 0x4000000;
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+
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+ if (bytecnt > 64 && is_dram) {
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debug(" using dma %d\n", bytecnt);
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error = mmc_trans_data_by_dma(priv, mmc, data);
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writel(cmdval | cmd->cmdidx, &priv->reg->cmd);
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@@ -715,10 +720,19 @@ struct mmc *sunxi_mmc_init(int sdc_no)
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cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
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cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
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+ if (sdc_no == 2)
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+ cfg->host_caps |= MMC_MODE_DDR_52MHz;
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cfg->f_min = 400000;
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cfg->f_max = 52000000;
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+ // enough descs for a realy big u-boot (4MiB)
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+ priv->n_dma_descs = 4*1024*1024 / DMA_BUF_MAX_SIZE;
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+ priv->dma_descs = malloc(sizeof(struct sunxi_idma_desc)
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+ * priv->n_dma_descs);
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+ if (priv->dma_descs == NULL)
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+ return NULL;
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+
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if (mmc_resource_init(sdc_no) != 0)
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return NULL;
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--
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2.31.1
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