aa1eefc44a
These are various debugging related patches that I have used over the time when attempting to get new features working for the mainline kernel. Given that the downstream kernel is just intended for debugging in this case, it seems convenient to add them to pmaports so I don't need to go search for them in case I need them again in the future. [ci:skip-build] Already built on CI
95 lines
2.8 KiB
Diff
95 lines
2.8 KiB
Diff
This change allows dumping the state of all GPIOs via debugfs. This is useful
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for debugging sometimes. The code is mostly copied from the mainline driver
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to allow comparison: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pinctrl/qcom/pinctrl-msm.c
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diff --git a/drivers/pinctrl/pinctrl-msm-tlmm.c b/drivers/pinctrl/pinctrl-msm-tlmm.c
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index fc8076162a0..fa628ca0dc1 100644
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--- a/drivers/pinctrl/pinctrl-msm-tlmm.c
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+++ b/drivers/pinctrl/pinctrl-msm-tlmm.c
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@@ -671,6 +671,78 @@ static int msm_tlmm_gp_dir_out(struct gpio_chip *gc, unsigned offset, int val)
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return 0;
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}
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+#ifdef CONFIG_DEBUG_FS
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+#include <linux/seq_file.h>
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+
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+/* GP PIN TYPE REG MASKS */
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+#define TLMM_GP_DRV_SHFT 6
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+#define TLMM_GP_DRV_MASK 0x7
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+#define TLMM_GP_PULL_SHFT 0
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+#define TLMM_GP_PULL_MASK 0x3
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+#define TLMM_GP_DIR_SHFT 9
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+#define TLMM_GP_DIR_MASK 1
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+#define TLMM_GP_FUNC_SHFT 2
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+#define TLMM_GP_FUNC_MASK 0xF
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+#define GPIO_OUT_BIT 1
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+#define GPIO_IN_BIT 0
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+#define GPIO_OE_BIT 9
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+
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+static void msm_gpio_dbg_show_one(struct seq_file *s,
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+ struct gpio_chip *gc,
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+ unsigned offset,
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+ unsigned gpio)
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+{
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+ struct msm_pintype_info *pinfo = gc_to_pintype(gc);
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+ void __iomem *cfg_regp = TLMM_GP_CFG(pinfo, offset);
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+ void __iomem *inout_regp = TLMM_GP_INOUT(pinfo, offset);
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+
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+ unsigned func;
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+ int is_out;
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+ int drive;
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+ int pull;
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+ int val;
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+ u32 ctl_reg, io_reg;
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+
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+ static const char * const pulls_keeper[] = {
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+ "no pull",
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+ "pull down",
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+ "keeper",
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+ "pull up"
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+ };
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+
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+ ctl_reg = readl_relaxed(cfg_regp);
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+ io_reg = readl_relaxed(inout_regp);
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+
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+ is_out = !!(ctl_reg & BIT(GPIO_OE_BIT));
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+ func = (ctl_reg >> TLMM_GP_FUNC_SHFT) & TLMM_GP_FUNC_MASK;
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+ drive = (ctl_reg >> TLMM_GP_DRV_SHFT) & TLMM_GP_DRV_SHFT;
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+ pull = (ctl_reg >> TLMM_GP_PULL_SHFT) & TLMM_GP_PULL_MASK;
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+
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+ if (is_out)
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+ val = !!(io_reg & BIT(GPIO_OUT_BIT));
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+ else
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+ val = !!(io_reg & BIT(GPIO_IN_BIT));
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+
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+ seq_printf(s, " gpio%d: %-3s", offset, is_out ? "out" : "in");
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+ seq_printf(s, " %-4s func%d", val ? "high" : "low", func);
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+ seq_printf(s, " %dmA", rval_to_drv_str(drive));
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+ seq_printf(s, " %s", pulls_keeper[pull]);
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+ seq_puts(s, "\n");
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+}
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+
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+static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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+{
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+ unsigned gpio = chip->base;
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+ unsigned i;
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+
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+ for (i = 0; i < chip->ngpio; i++, gpio++)
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+ msm_gpio_dbg_show_one(s, chip, i, gpio);
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+}
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+
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+#else
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+#define msm_gpio_dbg_show NULL
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+#endif
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+
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static int msm_tlmm_gp_to_irq(struct gpio_chip *gc, unsigned offset)
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{
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struct msm_pintype_info *pinfo = gc_to_pintype(gc);
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@@ -1073,6 +1145,7 @@ static struct msm_pintype_info tlmm_pininfo[] = {
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.get = msm_tlmm_gp_get,
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.set = msm_tlmm_gp_set,
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.to_irq = msm_tlmm_gp_to_irq,
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+ .dbg_show = msm_gpio_dbg_show,
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},
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.init_irq = msm_tlmm_gp_irq_init,
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.irq_chip = &msm_tlmm_gp_irq,
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