5ccbcf999d
- OTG support - Charger - WiFi 5GHz - RTC bug "fixed" (always-on interrupt - made device overheat!) - Kernel version bumped to 5.2.1 - Memory timings - New WM8994 codec board driver (fixes suspend/resume) - Camera's regulator supported now (saves power at least!) - Updated panel driver (still not in mainline, idk why) - MHL support in kernel (fixes boot times and screen, currently disabled in X, not tested) - Other minor kernel chagnes [ci:skip-build]: already built successfully in CI
1331 lines
33 KiB
Diff
1331 lines
33 KiB
Diff
From 30dfad94dda522bce62cb635c26fadf9bbf5a24e Mon Sep 17 00:00:00 2001
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From: Sergey Larin <cerg2010cerg2010@mail.ru>
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Date: Sat, 26 Jan 2019 20:50:51 +0300
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Subject: [PATCH] ARM: dts: tegra20-glide: Samsung SGH-I927 support
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Initial DTS for this Samsung device. For now, kernel with this Device
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Tree boots to FBCON successfully, probing drivers without failures.
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At this point, everything is untested except display output (no MHL),
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since I use Android's boot.img.
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Signed-off-by: Sergey Larin <cerg2010cerg2010@mail.ru>
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---
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arch/arm/boot/dts/Makefile | 3 +-
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arch/arm/boot/dts/tegra20-glide.dts | 1291 +++++++++++++++++++++++++++
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2 files changed, 1293 insertions(+), 1 deletion(-)
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create mode 100644 arch/arm/boot/dts/tegra20-glide.dts
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diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
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index dab2914fa293..a7834dcc3d40 100644
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -1131,7 +1131,8 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
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tegra20-seaboard.dtb \
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tegra20-tec.dtb \
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tegra20-trimslice.dtb \
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- tegra20-ventana.dtb
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+ tegra20-ventana.dtb \
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+ tegra20-glide.dtb
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dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
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tegra30-apalis-eval.dtb \
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tegra30-apalis-v1.1-eval.dtb \
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diff --git a/arch/arm/boot/dts/tegra20-glide.dts b/arch/arm/boot/dts/tegra20-glide.dts
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new file mode 100644
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index 000000000000..32f59e7889be
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--- /dev/null
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+++ b/arch/arm/boot/dts/tegra20-glide.dts
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@@ -0,0 +1,1291 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/dts-v1/;
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+
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+#include <dt-bindings/input/input.h>
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+#include "tegra20.dtsi"
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+
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+// GPS
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+&uarta {
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+ status = "okay";
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+
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+ gnss {
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+ // Actual chip is unknown
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+ // (I don't want to teardown this thing)
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+ compatible = "wi2wi,w2sg0084i";
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+
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+ sirf,onoff-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_HIGH>;
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+ // reset GPIO: B2
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+ // Also depends on this, but no way to specify it
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+ clocks = <&tegra_car TEGRA20_CLK_BLINK>;
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+ };
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+
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+};
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+
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+// Debug console
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+&uartb {
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+ status = "okay";
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+};
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+
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+// Bluetooth
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+&uartc {
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+ status = "okay";
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+
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+ bluetooth {
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+ // can be changed to 4330 in linux v5.0
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+ compatible = "brcm,bcm43438-bt";
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+ max-speed = <921600>;
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+ shutdown-gpios = <&gpio TEGRA_GPIO(J, 5) GPIO_ACTIVE_HIGH>;
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+ device-wakeup-gpios = <&gpio TEGRA_GPIO(S, 1) GPIO_ACTIVE_HIGH>;
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+ host-wakeup-gpios = <&gpio TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
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+ clock-names = "lpo";
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+ clocks = <&tegra_car TEGRA20_CLK_BLINK>;
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+ };
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+};
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+
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+/ {
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+ model = "Samsung SGH-I927 Captivate Glide";
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+ compatible = "samsung,i927", "nvidia,tegra20";
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+
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+ aliases {
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+ rtc0 = "/i2c@7000d000/max8907@3c";
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+ rtc1 = "/rtc@7000e000";
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+ serial0 = &uartb;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ memory {
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+ device_type = "memory";
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+ reg = <0x00000000 0x40000000>;
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+ };
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+
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+
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+ reserved-memory {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+
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+ /* bootloader reads/writes magic values in this region */
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+ bootloader_data: bootloader_data@1FF00000 {
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+ reg = <0x1FF00000 0x00100000>;
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+ no-map;
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+ };
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+ };
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+
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+ host1x@50000000 {
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+ dc@54200000 {
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+ rgb {
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+ status = "okay";
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+ nvidia,panel = <&panel>;
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+ };
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+ };
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+
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+ hdmi@54280000 {
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+ status = "okay";
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+
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+ vdd-supply = <&hdmi_vdd_reg>;
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+ pll-supply = <&hdmi_pll_reg>;
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+ hdmi-supply = <&vdd_5v0_hdmi>;
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+
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+ nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
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+
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+ port {
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+ hdmi_to_mhl: endpoint {
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+ remote-endpoint = <&mhl_to_hdmi>;
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+ };
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+ };
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+ };
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+ };
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+
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+ pinmux@70000014 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&state_default>;
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+
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+ state_default: pinmux {
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+ ata {
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+ nvidia,pins = "ata", "atc", "atd", "ate",
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+ "gmb", "gmd", "irrx", "irtx",
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+ "spid", "spie";
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+ nvidia,function = "gmi";
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+ };
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+ atb {
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+ nvidia,pins = "atb", "gma", "gme";
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+ nvidia,function = "sdio4";
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+ };
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+ cdev1 {
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+ nvidia,pins = "cdev1";
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+ nvidia,function = "plla_out";
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+ };
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+ cdev2 {
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+ nvidia,pins = "cdev2";
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+ nvidia,function = "pllp_out4";
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+ };
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+ crtp {
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+ nvidia,pins = "crtp";
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+ nvidia,function = "crt";
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+ };
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+ csus {
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+ nvidia,pins = "csus";
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+ nvidia,function = "vi_sensor_clk";
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+ };
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+ dap1 {
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+ nvidia,pins = "dap1";
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+ nvidia,function = "dap1";
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+ };
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+ dap2 {
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+ nvidia,pins = "dap2";
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+ nvidia,function = "dap2";
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+ };
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+ dap3 {
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+ nvidia,pins = "dap3";
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+ nvidia,function = "dap3";
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+ };
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+ dap4 {
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+ nvidia,pins = "dap4";
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+ nvidia,function = "dap4";
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+ };
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+ spif {
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+ nvidia,pins = "spif", "uac";
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+ nvidia,function = "rsvd4";
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+ };
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+ dta {
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+ nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
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+ nvidia,function = "vi";
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+ };
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+ dtf {
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+ nvidia,pins = "dtf";
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+ nvidia,function = "i2c3";
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+ };
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+ gmc {
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+ nvidia,pins = "gmc";
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+ nvidia,function = "uartd";
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+ };
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+ gpu {
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+ nvidia,pins = "gpu", "uaa", "uab";
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+ nvidia,function = "uarta";
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+ };
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+ gpu7 {
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+ nvidia,pins = "gpu7";
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+ nvidia,function = "rtck";
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+ };
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+ gpv {
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+ nvidia,pins = "gpv", "slxa", "slxk";
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+ nvidia,function = "pcie";
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+ };
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+ hdint {
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+ nvidia,pins = "hdint", "spdi", "spdo";
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+ nvidia,function = "rsvd2";
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+ };
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+ i2cp {
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+ nvidia,pins = "i2cp";
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+ nvidia,function = "i2cp";
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+ };
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+ kbca {
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+ nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", "kbce", "kbcf";
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+ nvidia,function = "kbc";
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+ };
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+ lcsn {
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+ nvidia,pins = "lcsn", "lsck", "lsda", "lsdi";
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+ nvidia,function = "spi3";
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+ };
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+ ld0 {
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+ nvidia,pins = "ld0", "ld1", "ld2",
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+ "ld3", "ld4", "ld5", "ld6", "ld7",
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+ "ld8", "ld9", "ld10", "ld11", "ld12",
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+ "ld13", "ld14", "ld15", "ld16", "ld17",
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+ "ldc", "ldi", "lhp0", "lhp1", "lhp2",
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+ "lhs", "lm0", "lm1", "lpp", "lpw0",
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+ "lpw1", "lpw2", "lsc0", "lsc1", "lspi",
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+ "lvp0", "lvp1", "lvs";
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+ nvidia,function = "displaya";
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+ };
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+ owc {
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+ nvidia,pins = "owc";
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+ nvidia,function = "owr";
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+ };
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+ pmc {
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+ nvidia,pins = "pmc";
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+ nvidia,function = "pwr_on";
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+ };
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+ rm {
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+ nvidia,pins = "rm";
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+ nvidia,function = "i2c1";
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+ };
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+ sdb {
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+ nvidia,pins = "sdb", "sdc", "sdd";
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+ nvidia,function = "sdio3";
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+ };
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+ sdio1 {
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+ nvidia,pins = "sdio1";
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+ nvidia,function = "sdio1";
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+ };
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+ slxc {
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+ nvidia,pins = "slxc", "slxd";
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+ nvidia,function = "spi4";
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+ };
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+ spdi {
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+ nvidia,pins = "spdi", "spdo";
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+ nvidia,function = "rsvd2";
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+ };
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+ spig {
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+ nvidia,pins = "spig", "spih";
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+ nvidia,function = "spi2_alt";
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+ };
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+ uda {
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+ nvidia,pins = "uda";
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+ nvidia,function = "spi1";
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+ };
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+ uad {
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+ nvidia,pins = "uad";
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+ nvidia,function = "irda";
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+ };
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+ uca {
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+ nvidia,pins = "uca", "ucb";
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+ nvidia,function = "uartc";
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+ };
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+ spia {
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+ nvidia,pins = "spia", "spib", "spic";
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+ nvidia,function = "spi2";
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+ };
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+ conf_cdev1 {
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+ nvidia,pins = "cdev1", "cdev2", "dap1", "dap2",
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+ "dap3", "dap4", "ddc", "dte", "gma",
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+ "gmc", "gmd", "gme", "gpu7", "gpv",
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+ "i2cp", "pta", "rm", "sdio1", // "sdb",
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+ "uac", "uda";
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+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
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+ };
|
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+ conf_ck32 {
|
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+ nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
|
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+ "pmcc", "pmcd", "xm2c", "xm2d";
|
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+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
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+ };
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+ conf_crtp {
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+ nvidia,pins = "crtp";
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+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
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+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
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+ };
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+ conf_csus {
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+ nvidia,pins = "csus", "spid";
|
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+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
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+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
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+ };
|
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+ conf_ata {
|
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+ nvidia,pins = "ata", "atb", "atc", "ate",
|
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+ "dtf", "gmb", "gpu", "irrx", "irtx",
|
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+ "kbca", "kbcc", "kbcd", "kbce",
|
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+ "kbcf", "sdc", "sdd", "spdi",
|
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+ "spib", "spig", "spih", "uaa", "uab",
|
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+ "uad", "uca", "ucb";
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+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
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+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
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+ };
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+ conf_owc {
|
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+ nvidia,pins = "owc";
|
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+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
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+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
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+ };
|
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+ conf_hdint {
|
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+ nvidia,pins = "hdint", "lcsn", "lhs", "lm0",
|
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+ "lm1", "lpw1", "lsc0", "lsck", "lsda",
|
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+ "lsdi", "lspi", "lvs", "pmc", "sdb",
|
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+ "ldc", "lpw0", "lpw2", "lsc1", "ld0",
|
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+ "ld1", "ld10", "ld11", "ld12", "ld13",
|
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+ "ld14", "ld15", "ld16", "ld17", "ld2",
|
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+ "ld3", "ld4", "ld5", "ld6", "ld7",
|
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+ "ld8", "ld9", "ldi", "lhp0", "lhp1",
|
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+ "lhp2", "lpp", "lvp1";
|
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+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
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+ };
|
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+ conf_lvp0 {
|
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+ nvidia,pins = "lvp0";
|
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+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
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+ };
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+ conf_atd {
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+ nvidia,pins = "atd", "dta", "dtb", "dtc",
|
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+ "kbcb", "slxa", "slxc", "slxd", "slxk",
|
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+ "spdo", "spia", "spic", "spie", "spif";
|
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+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
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+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
+ };
|
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+ conf_pmce {
|
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+ nvidia,pins = "pmce";
|
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+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
+ };
|
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+
|
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+ drive_ao1 {
|
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+ nvidia,pins = "drive_ao1";
|
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+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
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+ nvidia,pull-down-strength = <31>;
|
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+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ };
|
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+
|
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+ drive_at1 {
|
|
+ nvidia,pins = "drive_at1";
|
|
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
+ nvidia,pull-down-strength = <31>;
|
|
+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ };
|
|
+
|
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+ drive_dbg {
|
|
+ nvidia,pins = "drive_dbg";
|
|
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
+ nvidia,pull-down-strength = <31>;
|
|
+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ };
|
|
+
|
|
+ drive_vi1 {
|
|
+ nvidia,pins = "drive_vi1";
|
|
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
+ nvidia,pull-down-strength = <31>;
|
|
+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ };
|
|
+
|
|
+ drive_vi2 {
|
|
+ nvidia,pins = "drive_vi2";
|
|
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
+ nvidia,pull-down-strength = <31>;
|
|
+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ };
|
|
+
|
|
+ drive_sdio1 {
|
|
+ nvidia,pins = "drive_sdio1";
|
|
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
+ nvidia,pull-down-strength = <31>;
|
|
+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ };
|
|
+
|
|
+ drive_ddc {
|
|
+ nvidia,pins = "drive_ddc";
|
|
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
+ nvidia,pull-down-strength = <31>;
|
|
+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * DTF, I2CP and RM drive pingroups originaly specified, but they're
|
|
+ * nonexistent here...
|
|
+ */
|
|
+
|
|
+ drive_dap2 {
|
|
+ nvidia,pins = "drive_dap2";
|
|
+ nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
+ nvidia,pull-down-strength = <31>;
|
|
+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ };
|
|
+
|
|
+ drive_dap3 {
|
|
+ nvidia,pins = "drive_dap3";
|
|
+ nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
+ nvidia,pull-down-strength = <31>;
|
|
+ nvidia,pull-up-strength = <31>;
|
|
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ state_i2cmux_ddc: pinmux_i2cmux_ddc {
|
|
+ ddc {
|
|
+ nvidia,pins = "ddc";
|
|
+ nvidia,function = "i2c2";
|
|
+ };
|
|
+ pta {
|
|
+ nvidia,pins = "pta";
|
|
+ nvidia,function = "rsvd4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ state_i2cmux_pta: pinmux_i2cmux_pta {
|
|
+ ddc {
|
|
+ nvidia,pins = "ddc";
|
|
+ nvidia,function = "rsvd4";
|
|
+ };
|
|
+ pta {
|
|
+ nvidia,pins = "pta";
|
|
+ nvidia,function = "i2c2";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ state_i2cmux_idle: pinmux_i2cmux_idle {
|
|
+ ddc {
|
|
+ nvidia,pins = "ddc";
|
|
+ nvidia,function = "rsvd4";
|
|
+ };
|
|
+ pta {
|
|
+ nvidia,pins = "pta";
|
|
+ nvidia,function = "rsvd4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ state_isa1200_on: state_isa1200_on {
|
|
+ cdev2 {
|
|
+ nvidia,pins = "cdev2";
|
|
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ state_isa1200_off: state_isa1200_off {
|
|
+ cdev2 {
|
|
+ nvidia,pins = "cdev2";
|
|
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ i2s@70002800 {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ serial@70006040 {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ i2c@7000c000 {
|
|
+ status = "okay";
|
|
+ clock-frequency = <400000>;
|
|
+
|
|
+ gyro@68 {
|
|
+ compatible = "invensense,mpu3050";
|
|
+ reg = <0x68>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(A, 0) IRQ_TYPE_EDGE_FALLING>;
|
|
+ mount-matrix = "0", "1", "0",
|
|
+ "-1", "0", "0",
|
|
+ "0", "0", "-1";
|
|
+
|
|
+ i2c-gate {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ accel@f {
|
|
+ compatible = "kionix,kxtf9";
|
|
+ reg = <0xf>;
|
|
+ mount-matrix = "1", "0", "0",
|
|
+ "0", "1", "0",
|
|
+ "0", "0", "1";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@7000c400 {
|
|
+ status = "okay";
|
|
+ clock-frequency = <100000>;
|
|
+ };
|
|
+
|
|
+ i2cmux {
|
|
+ compatible = "i2c-mux-pinctrl";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ i2c-parent = <&{/i2c@7000c400}>;
|
|
+
|
|
+ pinctrl-names = "ddc", "pta", "idle";
|
|
+ pinctrl-0 = <&state_i2cmux_ddc>;
|
|
+ pinctrl-1 = <&state_i2cmux_pta>;
|
|
+ pinctrl-2 = <&state_i2cmux_idle>;
|
|
+
|
|
+ i2c@0 {
|
|
+ reg = <0>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mxt224e@4a {
|
|
+ compatible = "atmel,maxtouch";
|
|
+ reg = <0x4a>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(D, 7) IRQ_TYPE_LEVEL_LOW>;
|
|
+
|
|
+ avdd-supply = <&tsp_avdd>;
|
|
+ lvsio-supply = <&tsp_lvsio>;
|
|
+ vdd-supply = <&tsp_vdd>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Unused?
|
|
+ i2c@1 {
|
|
+ reg = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@7000d000 {
|
|
+ status = "okay";
|
|
+ clock-frequency = <400000>;
|
|
+
|
|
+ /* Not supported - no DT binding */
|
|
+ /* m5mo@1f {
|
|
+ reg = <0x1f>;
|
|
+ }; */
|
|
+
|
|
+ /* Not supported - no DT binding */
|
|
+ /* s5k6aafx@3c {
|
|
+ reg = <0x3c>;
|
|
+ }; */
|
|
+ };
|
|
+
|
|
+ i2c@7000d000 {
|
|
+ status = "okay";
|
|
+ clock-frequency = <400000>;
|
|
+
|
|
+ pmic: max8907@3c {
|
|
+ compatible = "maxim,max8907";
|
|
+ reg = <0x3c>;
|
|
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ maxim,system-power-controller;
|
|
+
|
|
+ mbatt-supply = <&usb0_vbus_reg>;
|
|
+ in-v1-supply = <&mbatt_reg>;
|
|
+ in-v2-supply = <&mbatt_reg>;
|
|
+ in-v3-supply = <&mbatt_reg>;
|
|
+ in1-supply = <&mbatt_reg>;
|
|
+ in2-supply = <&mbatt_reg>;
|
|
+ in3-supply = <&mbatt_reg>;
|
|
+ in4-supply = <&mbatt_reg>;
|
|
+ in5-supply = <&mbatt_reg>;
|
|
+ in6-supply = <&mbatt_reg>;
|
|
+ in7-supply = <&mbatt_reg>;
|
|
+ in8-supply = <&mbatt_reg>;
|
|
+ in9-supply = <&mbatt_reg>;
|
|
+ in10-supply = <&mbatt_reg>;
|
|
+ in11-supply = <&mbatt_reg>;
|
|
+ in12-supply = <&mbatt_reg>;
|
|
+ in13-supply = <&mbatt_reg>;
|
|
+ in14-supply = <&mbatt_reg>;
|
|
+ in15-supply = <&mbatt_reg>;
|
|
+ in16-supply = <&mbatt_reg>;
|
|
+ in17-supply = <&mbatt_reg>;
|
|
+ in18-supply = <&mbatt_reg>;
|
|
+ in19-supply = <&mbatt_reg>;
|
|
+ in20-supply = <&mbatt_reg>;
|
|
+
|
|
+ regulators {
|
|
+ mbatt_reg: mbatt {
|
|
+ regulator-name = "vbat_pmu";
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ sd1 {
|
|
+ regulator-name = "nvvdd_sv1";
|
|
+ regulator-min-microvolt = <637500>;
|
|
+ regulator-max-microvolt = <1425000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ sd2 {
|
|
+ regulator-name = "nvvdd_sv2,vdd_core,vdd_aon";
|
|
+ regulator-min-microvolt = <637500>;
|
|
+ regulator-max-microvolt = <1425000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ cpu_reg_supply: sd3 {
|
|
+ regulator-name = "nvvdd_sv3";
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <3900000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ reg_thrm: ldo1 {
|
|
+ regulator-name = "nvvdd_ldo1,vadc_3v3";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ ldo2 {
|
|
+ regulator-name = "nvvdd_ldo2,vap_pll_1v1";
|
|
+ regulator-min-microvolt = <1100000>;
|
|
+ regulator-max-microvolt = <1100000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ vlcd_1v8: ldo3 {
|
|
+ regulator-name = "nvvdd_ldo3,vlcd_1v8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+
|
|
+ ldo4 {
|
|
+ regulator-name = "nvvdd_ldo4,vap_usb_3v3";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ };
|
|
+
|
|
+ vcc_3v3_mhl: ldo5 {
|
|
+ regulator-name = "nvvdd_ldo5,vcc_3v3_mhl";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ };
|
|
+
|
|
+ hdmi_pll_reg: ldo6 {
|
|
+ regulator-name = "nvvdd_ldo6,avdd_hdmi_pll_1v8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+
|
|
+ vcc_1v8_mhl: ldo7 {
|
|
+ regulator-name = "nvvdd_ldo7,vcc_1v8_mhl";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+
|
|
+ ldo8 {
|
|
+ regulator-name = "nvvdd_ldo8,led_a_2v8";
|
|
+ regulator-min-microvolt = <2800000>;
|
|
+ regulator-max-microvolt = <2800000>;
|
|
+ };
|
|
+
|
|
+ ldo9 {
|
|
+ regulator-name = "nvvdd_ldo9";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ };
|
|
+
|
|
+ ldo10 {
|
|
+ regulator-name = "nvvdd_ldo10,vsensor_1v8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ ldo11 {
|
|
+ regulator-name = "nvvdd_ldo11,vcc_2v8_pda";
|
|
+ regulator-min-microvolt = <2800000>;
|
|
+ regulator-max-microvolt = <2800000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ vlcd_3v0: ldo12 {
|
|
+ regulator-name = "nvvdd_ldo12,vlcd_3v0";
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ };
|
|
+
|
|
+ tsp_avdd: ldo13 {
|
|
+ regulator-name = "nvvdd_ldo13,tsp_avdd_3v3";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ ldo14 {
|
|
+ regulator-name = "nvvdd_ldo14";
|
|
+ regulator-min-microvolt = <2800000>;
|
|
+ regulator-max-microvolt = <2800000>;
|
|
+ };
|
|
+
|
|
+ tsp_lvsio: ldo15 {
|
|
+ regulator-name = "nvvdd_ldo15,tsp_vdd_lvsio";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ ldo16 {
|
|
+ regulator-name = "nvvdd_ldo16,vtf_3v3,vmmc";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ ldo17 {
|
|
+ regulator-name = "nvvdd_ldo17,vap_mipi_1v2";
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ };
|
|
+
|
|
+ tsp_vdd: ldo18 {
|
|
+ regulator-name = "nvvdd_ldo18,tsp_vdd_1v8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ hdmi_vdd_reg: ldo19 {
|
|
+ regulator-name = "nvvdd_ldo19,avdd_hdmi_3v3";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ };
|
|
+
|
|
+ ldo20 {
|
|
+ regulator-name = "nvvdd_ldo20,t_key_3v0";
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ };
|
|
+
|
|
+ out5v {
|
|
+ regulator-name = "usb0_vbus_reg";
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ out33v {
|
|
+ regulator-name = "out33v";
|
|
+ };
|
|
+
|
|
+ bbat {
|
|
+ regulator-name = "bbat";
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ sdby {
|
|
+ regulator-name = "sdby";
|
|
+ };
|
|
+
|
|
+ vrtc {
|
|
+ regulator-name = "vrtc";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ max8952@60 {
|
|
+ compatible = "maxim,max8952";
|
|
+ reg = <0x60>;
|
|
+ max8952,dvs-mode-microvolt = <1100000>, <1100000>, <1100000>, <1100000>;
|
|
+ max8952,default-mode = <1>;
|
|
+ vin-supply = <&cpu_reg_supply>;
|
|
+
|
|
+ regulator-name = "vdd_arm";
|
|
+ regulator-min-microvolt = <770000>;
|
|
+ regulator-max-microvolt = <1100000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@5 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(O, 0) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(O, 7) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ //interrupt-parent = <&gpio>;
|
|
+ //interrupts = <TEGRA_GPIO(I, 5) IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ // Use 17040 as 17043 is compatible - no ALRT feature
|
|
+ max17043@36 {
|
|
+ compatible = "maxim,max17040";
|
|
+ reg = <0x36>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@7 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(O, 4) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(O, 2) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <2>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ak8975@c {
|
|
+ compatible = "asahi-kasei,ak8975";
|
|
+ reg = <0xc>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(K, 4) IRQ_TYPE_LEVEL_HIGH>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@8 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(G, 3) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(I, 0) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ wm8994@1a {
|
|
+ compatible = "wlf,wm8994";
|
|
+ reg = <0x1a>;
|
|
+
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@9 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(Y, 2) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(Y, 0) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <2>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(O, 1) IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ /* Not supported - no driver */
|
|
+ /* cm3663@11 {
|
|
+ reg = <0x11>;
|
|
+ }; */
|
|
+ };
|
|
+
|
|
+ i2c@11 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(BB, 4) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(BB, 1) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(L, 1) IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ /* Not supported - no DT bindings */
|
|
+ /* fsa9480@25 {
|
|
+ reg = <0x25>;
|
|
+ }; */
|
|
+ };
|
|
+
|
|
+ hdmi_ddc: i2c@13 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(D, 4) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(D, 3) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <5>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ };
|
|
+
|
|
+ i2c@14 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(K, 3) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(J, 0) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <5>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sii9234@39 {
|
|
+ compatible = "sil,sii9234";
|
|
+ reg = <0x39>;
|
|
+ avcc33-supply = <&vcc_3v3_mhl>;
|
|
+ iovcc18-supply = <&vcc_1v8_mhl>;
|
|
+ avcc12-supply = <&vdd_hdmi_ldo>;
|
|
+ cvcc12-supply = <&vdd_hdmi_ldo>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(H, 0) IRQ_TYPE_LEVEL_HIGH>;
|
|
+ reset-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_LOW>;
|
|
+
|
|
+ port {
|
|
+ mhl_to_hdmi: endpoint {
|
|
+ remote-endpoint = <&hdmi_to_mhl>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@15 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(Y, 3) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(Y, 1) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ nct1008@4c {
|
|
+ compatible = "onnn,nct1008";
|
|
+ reg = <0x4c>;
|
|
+ vcc-supply = <®_thrm>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_LEVEL_LOW>;
|
|
+ #thermal-sensor-cells = <1>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@16 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(L, 7) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(L, 6) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ /* Not supported - no driver?/no DT binding? */
|
|
+ /* m5mo_pmic@3e {
|
|
+ reg = <0x3e>;
|
|
+ }; */
|
|
+ };
|
|
+
|
|
+ i2c@17 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(Z, 3) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(C, 6) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ isa1200@48 {
|
|
+ compatible = "samsung_p3,isa1200_vibrator";
|
|
+ reg = <0x48>;
|
|
+ enable-gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ max-timeout = <10000>;
|
|
+ ctrl0 = <17>;
|
|
+ ctrl1 = <192>;
|
|
+ ctrl2 = <0>;
|
|
+ ctrl4 = <0>;
|
|
+ pll = <0x23>;
|
|
+ duty = <0x85>;
|
|
+ period = <0x86>;
|
|
+
|
|
+ clocks = <&tegra_car TEGRA20_CLK_CDEV2>;
|
|
+ clock-names = "vibrator-clk";
|
|
+
|
|
+ pinctrl-names = "on", "off";
|
|
+ pinctrl-0 = <&state_isa1200_on>;
|
|
+ pinctrl-1 = <&state_isa1200_off>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@19 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(T, 6) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(T, 5) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ /* Not supported - no driver */
|
|
+ /* melfas-touchkey@20 {
|
|
+ reg = <0x20>;
|
|
+ }; */
|
|
+ };
|
|
+
|
|
+ i2c@20 {
|
|
+ compatible = "i2c-gpio";
|
|
+ sda-gpios = <&gpio TEGRA_GPIO(X, 2) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ scl-gpios = <&gpio TEGRA_GPIO(X, 0) (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
+ i2c-gpio,delay-us = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ stmpe1801@40 {
|
|
+ compatible = "st,stmpe1801";
|
|
+ reg = <0x40>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_EDGE_FALLING>;
|
|
+
|
|
+ stmpe_keypad {
|
|
+ compatible = "st,stmpe-keypad";
|
|
+ debounce-interval = <10>;
|
|
+ st,scan-count = <5>;
|
|
+ st,no-autorepeat;
|
|
+ keypad,num-rows = <8>;
|
|
+ keypad,num-columns = <6>;
|
|
+
|
|
+ linux,keymap = <
|
|
+ /* row, col, code */
|
|
+ MATRIX_KEY(0, 0, KEY_R)
|
|
+ MATRIX_KEY(0, 1, KEY_G)
|
|
+ MATRIX_KEY(0, 2, KEY_V)
|
|
+ MATRIX_KEY(0, 3, KEY_LEFTMETA)
|
|
+ MATRIX_KEY(0, 4, KEY_MENU)
|
|
+ MATRIX_KEY(0, 5, KEY_HOME)
|
|
+
|
|
+ MATRIX_KEY(1, 0, KEY_T)
|
|
+ MATRIX_KEY(1, 1, KEY_H)
|
|
+ MATRIX_KEY(1, 2, KEY_B)
|
|
+ MATRIX_KEY(1, 3, KEY_RIGHTMETA)
|
|
+ MATRIX_KEY(1, 4, KEY_Q)
|
|
+ MATRIX_KEY(1, 5, KEY_FN)
|
|
+
|
|
+ MATRIX_KEY(2, 0, KEY_Y)
|
|
+ MATRIX_KEY(2, 1, KEY_J)
|
|
+ MATRIX_KEY(2, 2, KEY_N)
|
|
+ MATRIX_KEY(2, 3, KEY_SPACE)
|
|
+ MATRIX_KEY(2, 4, KEY_A)
|
|
+ MATRIX_KEY(2, 5, KEY_LEFTSHIFT)
|
|
+
|
|
+ MATRIX_KEY(3, 0, KEY_U)
|
|
+ MATRIX_KEY(3, 1, KEY_K)
|
|
+ MATRIX_KEY(3, 2, KEY_M)
|
|
+ MATRIX_KEY(3, 3, KEY_COMMA)
|
|
+ MATRIX_KEY(3, 4, KEY_S)
|
|
+ MATRIX_KEY(3, 5, KEY_Z)
|
|
+
|
|
+ MATRIX_KEY(4, 0, KEY_I)
|
|
+ MATRIX_KEY(4, 1, KEY_L)
|
|
+ MATRIX_KEY(4, 2, KEY_LEFT)
|
|
+ MATRIX_KEY(4, 3, KEY_DOT)
|
|
+ MATRIX_KEY(4, 4, KEY_W)
|
|
+ MATRIX_KEY(4, 5, KEY_X)
|
|
+
|
|
+ MATRIX_KEY(5, 0, KEY_O)
|
|
+ MATRIX_KEY(5, 1, KEY_UP)
|
|
+ MATRIX_KEY(5, 2, KEY_OK)
|
|
+ MATRIX_KEY(5, 3, KEY_QUESTION)
|
|
+ MATRIX_KEY(5, 4, KEY_E)
|
|
+ MATRIX_KEY(5, 5, KEY_C)
|
|
+
|
|
+ MATRIX_KEY(6, 0, KEY_P)
|
|
+ MATRIX_KEY(6, 1, KEY_ENTER)
|
|
+ MATRIX_KEY(6, 2, KEY_RIGHT)
|
|
+ MATRIX_KEY(6, 3, KEY_DOWN)
|
|
+ MATRIX_KEY(6, 4, KEY_D)
|
|
+
|
|
+ MATRIX_KEY(7, 0, KEY_DELETE)
|
|
+ MATRIX_KEY(7, 1, KEY_BACK)
|
|
+ MATRIX_KEY(7, 2, KEY_SEARCH)
|
|
+ MATRIX_KEY(7, 3, KEY_WWW)
|
|
+ MATRIX_KEY(7, 4, KEY_F)
|
|
+ MATRIX_KEY(7, 5, KEY_FN) >;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmc@7000e400 {
|
|
+ nvidia,invert-interrupt;
|
|
+ nvidia,suspend-mode = <0>;
|
|
+ nvidia,cpu-pwr-good-time = <2000>;
|
|
+ nvidia,cpu-pwr-off-time = <0>;
|
|
+ nvidia,core-pwr-good-time = <0x7e7e 0x7e7e>;
|
|
+ nvidia,core-pwr-off-time = <0>;
|
|
+ nvidia,core-power-req-active-high;
|
|
+ nvidia,sys-clock-req-active-high;
|
|
+ nvidia,combined-power-req;
|
|
+ nvidia,lp0-vec = <0x1819E000 8192>;
|
|
+ };
|
|
+
|
|
+ // Enabling this makes device to hang at boot
|
|
+#if 0
|
|
+ usb@c5000000 {
|
|
+ compatible = "nvidia,tegra20-udc";
|
|
+ status = "okay";
|
|
+ dr_mode = "otg";
|
|
+ };
|
|
+
|
|
+ usb-phy@c5000000 {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ usb@c5004000 {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ usb-phy@c5004000 {
|
|
+ status = "okay";
|
|
+ };
|
|
+#endif
|
|
+ wifi_pwrseq: bcm4330_pwrseq {
|
|
+ compatible = "mmc-pwrseq-simple";
|
|
+ clocks = <&tegra_car TEGRA20_CLK_BLINK>;
|
|
+ clock-names = "ext_clock";
|
|
+ power-off-delay-us = <100000>;
|
|
+ post-power-on-delay-ms = <100>;
|
|
+ };
|
|
+
|
|
+ sdhci@c8000000 {
|
|
+ status = "okay";
|
|
+ bus-width = <4>;
|
|
+ power-gpios = <&gpio TEGRA_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
|
|
+ mmc-pwrseq = <&wifi_pwrseq>;
|
|
+ non-removable;
|
|
+ wakeup-source;
|
|
+ post-power-on-delay-ms = <100>;
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ bcm4330@1 {
|
|
+ reg = <1>;
|
|
+ comaptible = "brcm,bcm4329-fmac";
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <TEGRA_GPIO(S, 2) IRQ_TYPE_EDGE_BOTH>;
|
|
+ interrupt-names = "host-wake";
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ // SD card
|
|
+ sdhci@c8000400 {
|
|
+ status = "okay";
|
|
+ bus-width = <4>;
|
|
+ cd-gpios = <&gpio TEGRA_GPIO(V, 6) GPIO_ACTIVE_LOW>;
|
|
+ keep-power-in-suspend;
|
|
+ };
|
|
+
|
|
+ // internal memory
|
|
+ sdhci@c8000600 {
|
|
+ status = "okay";
|
|
+ bus-width = <8>;
|
|
+ non-removable;
|
|
+ keep-power-in-suspend;
|
|
+ };
|
|
+
|
|
+ // This is supposed to be vibra, but it operates on a controller, which is not supported
|
|
+ /* backlight: backlight {
|
|
+ compatible = "pwm-backlight";
|
|
+
|
|
+ enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
|
|
+ pwms = <&pwm 0 5000000>;
|
|
+
|
|
+ brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
|
|
+ default-brightness-level = <10>;
|
|
+
|
|
+ backlight-boot-off;
|
|
+ }; */
|
|
+
|
|
+ clocks {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ clk32k_in: clock@0 {
|
|
+ compatible = "fixed-clock";
|
|
+ reg = <0>;
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <32768>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gpio-keys {
|
|
+ compatible = "gpio-keys";
|
|
+
|
|
+ power {
|
|
+ label = "Power";
|
|
+ gpios = <&gpio TEGRA_GPIO(U, 5) GPIO_ACTIVE_HIGH>;
|
|
+ linux,code = <KEY_POWER>;
|
|
+ debounce-interval = <10>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+
|
|
+ vol_up {
|
|
+ label = "Volume up";
|
|
+ gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_VOLUMEUP>;
|
|
+ debounce-interval = <10>;
|
|
+ };
|
|
+
|
|
+ vol_down {
|
|
+ label = "Volume down";
|
|
+ gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
|
|
+ linux,code = <KEY_VOLUMEDOWN>;
|
|
+ debounce-interval = <10>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi@7000d800 {
|
|
+ status = "okay";
|
|
+ spi-max-frequency = <1000000>;
|
|
+
|
|
+ panel: panel@2 {
|
|
+ compatible = "samsung,s6e63m0";
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <1000000>;
|
|
+ spi-cpol;
|
|
+ spi-cpha;
|
|
+ vdd3-supply = <&vlcd_1v8>;
|
|
+ vci-supply = <&vlcd_3v0>;
|
|
+ reset-gpios = <&gpio TEGRA_GPIO(C, 1) GPIO_ACTIVE_HIGH>;
|
|
+ panel-width-mm = <52>;
|
|
+ panel-height-mm = <87>;
|
|
+ /* 25 + 1 for regulator */
|
|
+ power-on-delay = <26>;
|
|
+ reset-delay = <10>;
|
|
+
|
|
+ display-timings {
|
|
+ timing {
|
|
+ clock-frequency = <24000000>;
|
|
+ hactive = <480>;
|
|
+ vactive = <800>;
|
|
+ hfront-porch = <16>;
|
|
+ vfront-porch = <28>;
|
|
+ hback-porch = <14>;
|
|
+ vback-porch = <1>;
|
|
+ hsync-len = <2>;
|
|
+ vsync-len = <2>;
|
|
+ hsync-active = <0>;
|
|
+ vsync-active = <0>;
|
|
+ nvidia,h-ref-to-sync = <0>;
|
|
+ nvidia,v-ref-to-sync = <1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ regulators {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ usb0_vbus_reg: regulator@0 {
|
|
+ compatible = "regulator-fixed";
|
|
+ reg = <0>;
|
|
+ regulator-name = "usb0_vbus";
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ };
|
|
+
|
|
+ vdd_5v0_hdmi: regulator@4 {
|
|
+ compatible = "regulator-fixed";
|
|
+ reg = <4>;
|
|
+ regulator-name = "+5V_HDMI_CON";
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ };
|
|
+
|
|
+ vdd_hdmi_ldo: regulator@5 {
|
|
+ compatible = "regulator-fixed";
|
|
+ reg = <5>;
|
|
+ regulator-name = "vdd-hdmi-ldo";
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
|
|
+ enable-active-high;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--
|
|
2.22.0
|
|
|