From 9ac48782303b8e86c4fee7c52ae9a26e13e8005e Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 13 Dec 2020 20:22:42 -0600 Subject: [PATCH 4/8] allwinner: Do not map BL32 DRAM at EL3 BL31 does not appear to ever access the DRAM allocated to BL32, so there is no need to map it at EL3. Signed-off-by: Samuel Holland Change-Id: Ie8727b793e53ea14517894942266f6da0333eb74 --- plat/allwinner/common/include/platform_def.h | 8 +++----- plat/allwinner/common/sunxi_common.c | 2 -- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h index e6ca6010f..de44174b2 100644 --- a/plat/allwinner/common/include/platform_def.h +++ b/plat/allwinner/common/include/platform_def.h @@ -39,12 +39,10 @@ #define MAX_XLAT_TABLES 1 #define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 28) -#define SUNXI_BL33_VIRT_BASE (SUNXI_DRAM_VIRT_BASE + SUNXI_DRAM_SEC_SIZE) -#endif /* SUNXI_BL31_IN_DRAM */ +#define SUNXI_BL33_VIRT_BASE SUNXI_DRAM_VIRT_BASE -/* How much memory to reserve as secure for BL32, if configured */ -#define SUNXI_DRAM_SEC_SIZE (32U << 20) +#endif /* SUNXI_BL31_IN_DRAM */ /* How much DRAM to map (to map BL33, for fetching the DTB from U-Boot) */ #define SUNXI_DRAM_MAP_SIZE (64U << 20) @@ -52,7 +50,7 @@ #define CACHE_WRITEBACK_SHIFT 6 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) -#define MAX_STATIC_MMAP_REGIONS 4 +#define MAX_STATIC_MMAP_REGIONS 3 #define MAX_MMAP_REGIONS (5 + MAX_STATIC_MMAP_REGIONS) #define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \ diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c index d60d767ae..82410b1ed 100644 --- a/plat/allwinner/common/sunxi_common.c +++ b/plat/allwinner/common/sunxi_common.c @@ -19,8 +19,6 @@ static const mmap_region_t sunxi_mmap[MAX_STATIC_MMAP_REGIONS + 1] = { MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE, MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER), - MAP_REGION(SUNXI_DRAM_BASE, SUNXI_DRAM_VIRT_BASE, SUNXI_DRAM_SEC_SIZE, - MT_RW_DATA | MT_SECURE), MAP_REGION(PRELOADED_BL33_BASE, SUNXI_BL33_VIRT_BASE, SUNXI_DRAM_MAP_SIZE, MT_RW_DATA | MT_NS), {}, -- 2.31.1