device-acer-aspire1: new device (MR 4322)
Acer Aspire 1 is an WoA aarch64 laptop. This commit introduces support for it by including some patches that were already accepted upstream.
This commit is contained in:
parent
415714ec4d
commit
e7ec3ae165
10 changed files with 1256 additions and 1 deletions
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From 659a3b8a7ff330a1007bf2844253451b6fdbe9c3 Mon Sep 17 00:00:00 2001
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From: Nikita Travkin <nikita@trvn.ru>
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Date: Tue, 1 Aug 2023 12:23:37 +0500
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Subject: [PATCH 1/5] drm/panel-edp: Add enable timings for N140HCA-EAC panel
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Add timings for InnoLux N140HCA-EAC. This panel is found on some laptops
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such as Acer Aspire 1.
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Signed-off-by: Nikita Travkin <nikita@trvn.ru>
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Reviewed-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Douglas Anderson <dianders@chromium.org>
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Link: https://patchwork.freedesktop.org/patch/msgid/20230801-aspire1-cmn-panel-v1-1-c3d88e389805@trvn.ru
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---
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drivers/gpu/drm/panel/panel-edp.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
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index a163585a2a52..31ac50138c48 100644
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--- a/drivers/gpu/drm/panel/panel-edp.c
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+++ b/drivers/gpu/drm/panel/panel-edp.c
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@@ -1887,6 +1887,7 @@ static const struct edp_panel_entry edp_panels[] = {
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EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"),
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EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"),
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EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"),
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+ EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"),
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EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"),
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EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"),
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--
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2.41.0
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@ -0,0 +1,63 @@
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From c093d7dee08532d3171fab9308939308441944ea Mon Sep 17 00:00:00 2001
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From: Nikita Travkin <nikita@trvn.ru>
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Date: Sat, 8 Apr 2023 13:20:14 +0500
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Subject: [PATCH 2/5] drm/bridge: ti-sn65dsi86: Implement wait_hpd_asserted
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This bridge doesn't actually implement HPD due to it being way too slow
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but instead expects the panel driver to wait enough to assume HPD is
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asserted. However some panels (such as the generic 'edp-panel') expect
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the bridge to deal with the delay and pass maximum delay to the aux
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instead.
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In order to support such panels, add a dummy implementation of wait
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that would just sleep the maximum delay and assume no failure has
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happened.
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Signed-off-by: Nikita Travkin <nikita@trvn.ru>
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Reviewed-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Douglas Anderson <dianders@chromium.org>
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Link: https://patchwork.freedesktop.org/patch/msgid/20230408082014.235425-1-nikita@trvn.ru
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---
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drivers/gpu/drm/bridge/ti-sn65dsi86.c | 19 +++++++++++++++++++
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1 file changed, 19 insertions(+)
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diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
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index b89f7f7ca188..60930d35ea50 100644
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--- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
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+++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
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@@ -631,6 +631,24 @@ static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux,
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return len;
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}
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+static int ti_sn_aux_wait_hpd_asserted(struct drm_dp_aux *aux, unsigned long wait_us)
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+{
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+ /*
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+ * The HPD in this chip is a bit useless (See comment in
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+ * ti_sn65dsi86_enable_comms) so if our driver is expected to wait
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+ * for HPD, we just assume it's asserted after the wait_us delay.
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+ *
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+ * In case we are asked to wait forever (wait_us=0) take conservative
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+ * 500ms delay.
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+ */
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+ if (wait_us == 0)
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+ wait_us = 500000;
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+
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+ usleep_range(wait_us, wait_us + 1000);
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+
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+ return 0;
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+}
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+
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static int ti_sn_aux_probe(struct auxiliary_device *adev,
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const struct auxiliary_device_id *id)
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{
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@@ -640,6 +658,7 @@ static int ti_sn_aux_probe(struct auxiliary_device *adev,
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pdata->aux.name = "ti-sn65dsi86-aux";
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pdata->aux.dev = &adev->dev;
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pdata->aux.transfer = ti_sn_aux_transfer;
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+ pdata->aux.wait_hpd_asserted = ti_sn_aux_wait_hpd_asserted;
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drm_dp_aux_init(&pdata->aux);
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ret = devm_of_dp_aux_populate_ep_devices(&pdata->aux);
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--
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2.41.0
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@ -0,0 +1,76 @@
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From 9b72464591d389f422b5e4485aa8c97afd79356a Mon Sep 17 00:00:00 2001
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From: Nikita Travkin <nikita@trvn.ru>
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Date: Mon, 15 May 2023 14:37:41 +0500
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Subject: [PATCH 3/5] arm64: dts: qcom: sc7180: Don't enable lpass clocks by
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default
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lpass clocks are usually blocked from HLOS by the firmware and
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instead are managed by the ADSP. Mark them as reserved and explicitly
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enable in the CrOS boards that have special, cooperative firmware.
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The IDP board gets lpass clocks disabled as it doesn't make use of sound
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anyway and might use Qualcomm firmware that blocks those clocks. [1]
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[1] https://lore.kernel.org/all/ZBJhmDd3zK%2FAiwBD@google.com/
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Signed-off-by: Nikita Travkin <nikita@trvn.ru>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Reviewed-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20230515093744.289045-2-nikita@trvn.ru
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---
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arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 8 ++++++++
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arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++++
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2 files changed, 12 insertions(+)
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diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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index eae22e6e97c1..6508628fd5ba 100644
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--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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@@ -777,6 +777,10 @@ alc5682: codec@1a {
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};
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};
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+&lpasscc {
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+ status = "okay";
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+};
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+
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&lpass_cpu {
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status = "okay";
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@@ -802,6 +806,10 @@ hdmi@5 {
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};
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};
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+&lpass_hm {
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+ status = "okay";
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+};
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+
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&mdp {
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status = "okay";
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};
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diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
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index 6f0ee4e13ef1..a7cd017b3ece 100644
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--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
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+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
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@@ -3576,6 +3576,8 @@ lpasscc: clock-controller@62d00000 {
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power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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+
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+ status = "reserved"; /* Controlled by ADSP */
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};
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lpass_cpu: lpass@62d87000 {
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@@ -3621,6 +3623,8 @@ lpass_hm: clock-controller@63000000 {
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clock-names = "iface", "bi_tcxo";
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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+
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+ status = "reserved"; /* Controlled by ADSP */
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};
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};
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--
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2.41.0
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@ -0,0 +1,66 @@
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From d03ea6cf66d36e55b0a57643c1f294b0e828a784 Mon Sep 17 00:00:00 2001
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From: Nikita Travkin <nikita@trvn.ru>
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Date: Mon, 15 May 2023 14:37:42 +0500
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Subject: [PATCH 4/5] arm64: dts: qcom: sc7180: Drop redundant disable in mdp
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mdss is useless without a display controller which makes explicitly
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enabling mdp redundant. Have it enabled by default to drop the extra
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node for all users.
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Signed-off-by: Nikita Travkin <nikita@trvn.ru>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Reviewed-by: Douglas Anderson <dianders@chromium.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20230515093744.289045-3-nikita@trvn.ru
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---
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arch/arm64/boot/dts/qcom/sc7180-idp.dts | 4 ----
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arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 4 ----
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arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 --
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3 files changed, 10 deletions(-)
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diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
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index 9dee131b1e24..d3c4b5804a69 100644
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--- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts
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+++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
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@@ -333,10 +333,6 @@ &dsi_phy {
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vdds-supply = <&vreg_l4a_0p8>;
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};
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-&mdp {
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- status = "okay";
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-};
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-
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&mdss {
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status = "okay";
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};
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diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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index 6508628fd5ba..f4db4ccf48e5 100644
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--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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@@ -810,10 +810,6 @@ &lpass_hm {
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status = "okay";
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};
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-&mdp {
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- status = "okay";
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-};
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-
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&mdss {
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status = "okay";
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};
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diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
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index a7cd017b3ece..3f02f1ce6f1e 100644
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--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
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+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
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@@ -2937,8 +2937,6 @@ mdp: display-controller@ae01000 {
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interrupt-parent = <&mdss>;
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interrupts = <0>;
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- status = "disabled";
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-
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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--
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2.41.0
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@ -0,0 +1,889 @@
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From f190c467210f639ca33f072f31dd4e2f1c2bcd8b Mon Sep 17 00:00:00 2001
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From: Nikita Travkin <nikita@trvn.ru>
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Date: Mon, 15 May 2023 14:37:44 +0500
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Subject: [PATCH 5/5] arm64: dts: qcom: Add Acer Aspire 1
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Acer Aspire 1 is a WoA laptop based on Snapdragon 7c gen1 platform.
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The laptop design is similar to trogdor in the choice of primary
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components but the specifics on usage of those differ slightly.
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Add the devicetree for the laptop with support for most of the
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hardware present.
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Signed-off-by: Nikita Travkin <nikita@trvn.ru>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20230515093744.289045-5-nikita@trvn.ru
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---
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arch/arm64/boot/dts/qcom/Makefile | 1 +
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.../boot/dts/qcom/sc7180-acer-aspire1.dts | 845 ++++++++++++++++++
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2 files changed, 846 insertions(+)
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create mode 100644 arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
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diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
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index d7669a7cee9f..cf482aaf7156 100644
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--- a/arch/arm64/boot/dts/qcom/Makefile
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+++ b/arch/arm64/boot/dts/qcom/Makefile
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@@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
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dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
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+dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb
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diff --git a/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts b/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
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new file mode 100644
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index 000000000000..2a80f4090085
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--- /dev/null
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+++ b/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
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@@ -0,0 +1,845 @@
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+// SPDX-License-Identifier: BSD-3-Clause
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
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+
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+#include "sc7180.dtsi"
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+
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+#include "pm6150.dtsi"
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+#include "pm6150l.dtsi"
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+
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+/delete-node/ &tz_mem;
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+/delete-node/ &ipa_fw_mem;
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+
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+/ {
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+ model = "Acer Aspire 1";
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+ compatible = "acer,aspire1", "qcom,sc7180";
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+ chassis-type = "laptop";
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+
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+ aliases {
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+ bluetooth0 = &bluetooth;
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+ hsuart0 = &uart3;
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+ serial0 = &uart8;
|
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+ wifi0 = &wifi;
|
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+ };
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+
|
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+ chosen {
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+ stdout-path = "serial0:115200n8";
|
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+ };
|
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+
|
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+ reserved-memory {
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+ zap_mem: zap-shader@80840000 {
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+ reg = <0x0 0x80840000 0 0x2000>;
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+ no-map;
|
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+ };
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+
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+ venus_mem: venus@85b00000 {
|
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+ reg = <0x0 0x85b00000 0 0x500000>;
|
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+ no-map;
|
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+ };
|
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+
|
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+ mpss_mem: mpss@86000000 {
|
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+ reg = <0x0 0x86000000 0x0 0x2000000>;
|
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+ no-map;
|
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+ };
|
||||
+
|
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+ adsp_mem: adsp@8e400000 {
|
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+ reg = <0x0 0x8e400000 0x0 0x2800000>;
|
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+ no-map;
|
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+ };
|
||||
+
|
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+ wlan_mem: wlan@93900000 {
|
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+ reg = <0x0 0x93900000 0x0 0x200000>;
|
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+ no-map;
|
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+ };
|
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+ };
|
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+
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+ max98357a: audio-codec {
|
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+ compatible = "maxim,max98357a";
|
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+ sdmode-gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
|
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+
|
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+ pinctrl-0 = <&_sd_mode_default>;
|
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+ pinctrl-names = "default";
|
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+
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+ #sound-dai-cells = <0>;
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+ };
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+
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+ backlight: backlight {
|
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+ compatible = "pwm-backlight";
|
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+ pwms = <&sn65dsi86_bridge 1000000>;
|
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+ enable-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
|
||||
+
|
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+ pinctrl-0 = <&soc_bkoff_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+ };
|
||||
+
|
||||
+ reg_brij_1p2: bridge-1p2-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "brij_1p2";
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+
|
||||
+ gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>;
|
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+ enable-active-high;
|
||||
+
|
||||
+ pinctrl-0 = <®_edp_1p2_en_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+ };
|
||||
+
|
||||
+ reg_brij_1p8: bridge-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "brij_1p8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ vin-supply = <&vreg_l8c_1p8>;
|
||||
+
|
||||
+ gpio = <&tlmm 20 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+
|
||||
+ pinctrl-0 = <®_edp_1p8_en_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+ };
|
||||
+
|
||||
+ reg_codec_3p3: codec-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "codec_3p3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ gpio = <&tlmm 83 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+
|
||||
+ pinctrl-0 = <®_audio_en_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+ };
|
||||
+
|
||||
+ reg_lcm_3p3: panel-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "lcm_3p3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+
|
||||
+ pinctrl-0 = <®_lcm_en_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+ };
|
||||
+
|
||||
+ reg_tp_3p3: touchpad-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "tp_3p3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
|
||||
+ enable-active-high;
|
||||
+
|
||||
+ pinctrl-0 = <®_tp_en_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&dsi0 {
|
||||
+ vdda-supply = <&vreg_l3c_1p2>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&dsi0_out {
|
||||
+ remote-endpoint = <&sn65dsi86_in>;
|
||||
+ data-lanes = <0 1 2 3>;
|
||||
+};
|
||||
+
|
||||
+&dsi_phy {
|
||||
+ vdds-supply = <&vreg_l4a_0p8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c2 {
|
||||
+ clock-frequency = <400000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ /* embedded-controller@76 */
|
||||
+};
|
||||
+
|
||||
+&i2c4 {
|
||||
+ clock-frequency = <400000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ /*
|
||||
+ * NOTE: DSDT defines two possible touchpads, other one is
|
||||
+ *
|
||||
+ * reg = <0x15>;
|
||||
+ * hid-descr-addr = <0x1>;
|
||||
+ */
|
||||
+
|
||||
+ touchpad@2c {
|
||||
+ compatible = "hid-over-i2c";
|
||||
+ reg = <0x2c>;
|
||||
+ hid-descr-addr = <0x20>;
|
||||
+
|
||||
+ vdd-supply = <®_tp_3p3>;
|
||||
+
|
||||
+ interrupts-extended = <&tlmm 94 IRQ_TYPE_LEVEL_LOW>;
|
||||
+
|
||||
+ pinctrl-0 = <&hid_touchpad_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+
|
||||
+ keyboard@3a {
|
||||
+ compatible = "hid-over-i2c";
|
||||
+ reg = <0x3a>;
|
||||
+ hid-descr-addr = <0x1>;
|
||||
+
|
||||
+ interrupts-extended = <&tlmm 33 IRQ_TYPE_LEVEL_LOW>;
|
||||
+
|
||||
+ pinctrl-0 = <&hid_keyboard_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c9 {
|
||||
+ clock-frequency = <400000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ alc5682: codec@1a {
|
||||
+ compatible = "realtek,rt5682i";
|
||||
+ reg = <0x1a>;
|
||||
+
|
||||
+ #sound-dai-cells = <1>;
|
||||
+
|
||||
+ interrupt-parent = <&tlmm>;
|
||||
+ interrupts = <28 IRQ_TYPE_EDGE_BOTH>;
|
||||
+
|
||||
+ pinctrl-0 = <&codec_irq_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ AVDD-supply = <&vreg_l15a_1p8>;
|
||||
+ MICVDD-supply = <®_codec_3p3>;
|
||||
+ VBAT-supply = <®_codec_3p3>;
|
||||
+
|
||||
+ realtek,dmic1-data-pin = <1>;
|
||||
+ realtek,dmic1-clk-pin = <1>;
|
||||
+ realtek,jd-src = <1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c10 {
|
||||
+ clock-frequency = <400000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ sn65dsi86_bridge: bridge@2c {
|
||||
+ compatible = "ti,sn65dsi86";
|
||||
+ reg = <0x2c>;
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ #pwm-cells = <1>;
|
||||
+
|
||||
+ interrupt-parent = <&tlmm>;
|
||||
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+
|
||||
+ enable-gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
|
||||
+ suspend-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
|
||||
+
|
||||
+ pinctrl-0 = <&bridge_en_default>,
|
||||
+ <&edp_bridge_irq_default>,
|
||||
+ <&bridge_suspend_default>;
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ vpll-supply = <®_brij_1p8>;
|
||||
+ vccio-supply = <®_brij_1p8>;
|
||||
+ vcca-supply = <®_brij_1p2>;
|
||||
+ vcc-supply = <®_brij_1p2>;
|
||||
+
|
||||
+ clocks = <&rpmhcc RPMH_LN_BB_CLK3>;
|
||||
+ clock-names = "refclk";
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ sn65dsi86_in: endpoint {
|
||||
+ remote-endpoint = <&dsi0_out>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+
|
||||
+ sn65dsi86_out: endpoint {
|
||||
+ data-lanes = <0 1>;
|
||||
+ remote-endpoint = <&panel_in_edp>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ aux-bus {
|
||||
+ panel: panel {
|
||||
+ compatible = "edp-panel";
|
||||
+ power-supply = <®_lcm_3p3>;
|
||||
+ backlight = <&backlight>;
|
||||
+ hpd-absent-delay-ms = <200>;
|
||||
+
|
||||
+ port {
|
||||
+ panel_in_edp: endpoint {
|
||||
+ remote-endpoint = <&sn65dsi86_out>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ zap-shader {
|
||||
+ memory-region = <&zap_mem>;
|
||||
+ firmware-name = "qcom/sc7180/acer/aspire1/qcdxkmsuc7180.mbn";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mdss {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pm6150_adc {
|
||||
+ thermistor@4e {
|
||||
+ reg = <ADC5_AMUX_THM2_100K_PU>;
|
||||
+ qcom,ratiometric;
|
||||
+ qcom,hw-settle-time = <200>;
|
||||
+ };
|
||||
+
|
||||
+ charger-thermistor@4f {
|
||||
+ reg = <ADC5_AMUX_THM3_100K_PU>;
|
||||
+ qcom,ratiometric;
|
||||
+ qcom,hw-settle-time = <200>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pm6150_adc_tm {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ charger-thermistor@0 {
|
||||
+ reg = <0>;
|
||||
+ io-channels = <&pm6150_adc ADC5_AMUX_THM3_100K_PU>;
|
||||
+ qcom,ratiometric;
|
||||
+ qcom,hw-settle-time-us = <200>;
|
||||
+ };
|
||||
+
|
||||
+ thermistor@1 {
|
||||
+ reg = <1>;
|
||||
+ io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>;
|
||||
+ qcom,ratiometric;
|
||||
+ qcom,hw-settle-time-us = <200>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pm6150_pon {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&qupv3_id_0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&qupv3_id_1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&remoteproc_mpss {
|
||||
+ firmware-name = "qcom/sc7180/acer/aspire1/qcmpss7180_nm.mbn";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdhc_1 {
|
||||
+ pinctrl-0 = <&sdc1_default>;
|
||||
+ pinctrl-1 = <&sdc1_sleep>;
|
||||
+ pinctrl-names = "default", "sleep";
|
||||
+ vmmc-supply = <&vreg_l19a_2p9>;
|
||||
+ vqmmc-supply = <&vreg_l12a_1p8>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart3 {
|
||||
+ /delete-property/interrupts;
|
||||
+ interrupts-extended = <&intc GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
|
||||
+ <&tlmm 41 IRQ_TYPE_EDGE_FALLING>;
|
||||
+
|
||||
+ pinctrl-1 = <&qup_uart3_sleep>;
|
||||
+ pinctrl-names = "default", "sleep";
|
||||
+
|
||||
+ status = "okay";
|
||||
+
|
||||
+ bluetooth: bluetooth {
|
||||
+ compatible = "qcom,wcn3991-bt";
|
||||
+ vddio-supply = <&vreg_l10a_1p8>;
|
||||
+ vddxo-supply = <&vreg_l1c_1p8>;
|
||||
+ vddrf-supply = <&vreg_l2c_1p3>;
|
||||
+ vddch0-supply = <&vreg_l10c_3p3>;
|
||||
+ max-speed = <3200000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart8 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_1_dwc3 {
|
||||
+ dr_mode = "host";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ usb_hub_2_x: hub@1 {
|
||||
+ compatible = "usbbda,5411";
|
||||
+ reg = <1>;
|
||||
+ peer-hub = <&usb_hub_3_x>;
|
||||
+ };
|
||||
+
|
||||
+ usb_hub_3_x: hub@2 {
|
||||
+ compatible = "usbbda,411";
|
||||
+ reg = <2>;
|
||||
+ peer-hub = <&usb_hub_2_x>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&usb_1_hsphy {
|
||||
+ vdd-supply = <&vreg_l4a_0p8>;
|
||||
+ vdda-pll-supply = <&vreg_l11a_1p8>;
|
||||
+ vdda-phy-dpdm-supply = <&vreg_l17a_3p0>;
|
||||
+ qcom,imp-res-offset-value = <8>;
|
||||
+ qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_15_PERCENT>;
|
||||
+ qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
|
||||
+ qcom,bias-ctrl-value = <0x22>;
|
||||
+ qcom,charge-ctrl-value = <3>;
|
||||
+ qcom,hsdisc-trim-value = <0>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_1_qmpphy {
|
||||
+ vdda-phy-supply = <&vreg_l3c_1p2>;
|
||||
+ vdda-pll-supply = <&vreg_l4a_0p8>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&venus {
|
||||
+ firmware-name = "qcom/sc7180/acer/aspire1/qcvss7180.mbn";
|
||||
+};
|
||||
+
|
||||
+&wifi {
|
||||
+ vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>;
|
||||
+ vdd-1.8-xo-supply = <&vreg_l1c_1p8>;
|
||||
+ vdd-1.3-rfa-supply = <&vreg_l2c_1p3>;
|
||||
+ vdd-3.3-ch0-supply = <&vreg_l10c_3p3>;
|
||||
+ vdd-3.3-ch1-supply = <&vreg_l11c_3p3>;
|
||||
+
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&apps_rsc {
|
||||
+ regulators-0 {
|
||||
+ compatible = "qcom,pm6150-rpmh-regulators";
|
||||
+ qcom,pmic-id = "a";
|
||||
+
|
||||
+ vreg_s1a_1p1: smps1 {
|
||||
+ regulator-min-microvolt = <1128000>;
|
||||
+ regulator-max-microvolt = <1128000>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l4a_0p8: ldo4 {
|
||||
+ regulator-min-microvolt = <824000>;
|
||||
+ regulator-max-microvolt = <928000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l9a_0p6: ldo9 {
|
||||
+ regulator-min-microvolt = <488000>;
|
||||
+ regulator-max-microvolt = <800000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l10a_1p8: ldo10 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l11a_1p8: ldo11 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l12a_1p8: ldo12 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l13a_1p8: ldo13 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l14a_1p8: ldo14 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l15a_1p8: ldo15 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l16a_2p7: ldo16 {
|
||||
+ regulator-min-microvolt = <2496000>;
|
||||
+ regulator-max-microvolt = <3304000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l17a_3p0: ldo17 {
|
||||
+ regulator-min-microvolt = <2920000>;
|
||||
+ regulator-max-microvolt = <3232000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l18a_2p8: ldo18 {
|
||||
+ regulator-min-microvolt = <2496000>;
|
||||
+ regulator-max-microvolt = <3304000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l19a_2p9: ldo19 {
|
||||
+ regulator-min-microvolt = <2960000>;
|
||||
+ regulator-max-microvolt = <2960000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ regulators-1 {
|
||||
+ compatible = "qcom,pm6150l-rpmh-regulators";
|
||||
+ qcom,pmic-id = "c";
|
||||
+
|
||||
+ vreg_s8c_1p3: smps8 {
|
||||
+ regulator-min-microvolt = <1120000>;
|
||||
+ regulator-max-microvolt = <1408000>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l1c_1p8: ldo1 {
|
||||
+ regulator-min-microvolt = <1616000>;
|
||||
+ regulator-max-microvolt = <1984000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l2c_1p3: ldo2 {
|
||||
+ regulator-min-microvolt = <1168000>;
|
||||
+ regulator-max-microvolt = <1304000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l3c_1p2: ldo3 {
|
||||
+ regulator-min-microvolt = <1144000>;
|
||||
+ regulator-max-microvolt = <1304000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l4c_1p8: ldo4 {
|
||||
+ regulator-min-microvolt = <1648000>;
|
||||
+ regulator-max-microvolt = <3304000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l5c_1p8: ldo5 {
|
||||
+ regulator-min-microvolt = <1648000>;
|
||||
+ regulator-max-microvolt = <3304000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l6c_2p9: ldo6 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <2950000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l7c_3p0: ldo7 {
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3312000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l8c_1p8: ldo8 {
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l9c_2p9: ldo9 {
|
||||
+ regulator-min-microvolt = <2952000>;
|
||||
+ regulator-max-microvolt = <2952000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l10c_3p3: ldo10 {
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3400000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_l11c_3p3: ldo11 {
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3400000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
+ };
|
||||
+
|
||||
+ vreg_bob: bob {
|
||||
+ regulator-min-microvolt = <3008000>;
|
||||
+ regulator-max-microvolt = <3960000>;
|
||||
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&qup_i2c2_default {
|
||||
+ drive-strength = <2>;
|
||||
+
|
||||
+ /* Has external pullup */
|
||||
+ bias-disable;
|
||||
+};
|
||||
+
|
||||
+&qup_i2c4_default {
|
||||
+ drive-strength = <2>;
|
||||
+
|
||||
+ /* Has external pullup */
|
||||
+ bias-disable;
|
||||
+};
|
||||
+
|
||||
+&qup_i2c9_default {
|
||||
+ drive-strength = <2>;
|
||||
+
|
||||
+ /* Has external pullup */
|
||||
+ bias-disable;
|
||||
+};
|
||||
+
|
||||
+&qup_i2c10_default {
|
||||
+ drive-strength = <2>;
|
||||
+
|
||||
+ /* Has external pullup */
|
||||
+ bias-disable;
|
||||
+};
|
||||
+
|
||||
+&tlmm {
|
||||
+ /*
|
||||
+ * The TZ seem to protect those because some boards can have
|
||||
+ * fingerprint sensor connected to this range. Not connected
|
||||
+ * on this board
|
||||
+ */
|
||||
+ gpio-reserved-ranges = <58 5>;
|
||||
+
|
||||
+ amp_sd_mode_default: amp-sd-mode-deault-state {
|
||||
+ pins = "gpio23";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ bridge_en_default: bridge-en-default-state {
|
||||
+ pins = "gpio51";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ bridge_suspend_default: bridge-suspend-default-state {
|
||||
+ pins = "gpio22";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ codec_irq_default: codec-irq-deault-state {
|
||||
+ pins = "gpio28";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ edp_bridge_irq_default: edp-bridge-irq-default-state {
|
||||
+ pins = "gpio11";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+
|
||||
+ hid_keyboard_default: hid-keyboard-default-state {
|
||||
+ pins = "gpio33";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ hid_touchpad_default: hid-touchpad-default-state {
|
||||
+ pins = "gpio94";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ qup_uart3_sleep: qup-uart3-sleep-state {
|
||||
+ cts-pins {
|
||||
+ /*
|
||||
+ * Configure a pull-down on CTS to match the pull of
|
||||
+ * the Bluetooth module.
|
||||
+ */
|
||||
+ pins = "gpio38";
|
||||
+ function = "gpio";
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+
|
||||
+ rts-pins {
|
||||
+ /*
|
||||
+ * Configure pull-down on RTS. As RTS is active low
|
||||
+ * signal, pull it low to indicate the BT SoC that it
|
||||
+ * can wakeup the system anytime from suspend state by
|
||||
+ * pulling RX low (by sending wakeup bytes).
|
||||
+ */
|
||||
+ pins = "gpio39";
|
||||
+ function = "gpio";
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+
|
||||
+ tx-pins {
|
||||
+ /*
|
||||
+ * Configure pull-up on TX when it isn't actively driven
|
||||
+ * to prevent BT SoC from receiving garbage during sleep.
|
||||
+ */
|
||||
+ pins = "gpio40";
|
||||
+ function = "gpio";
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ rx-pins {
|
||||
+ /*
|
||||
+ * Configure a pull-up on RX. This is needed to avoid
|
||||
+ * garbage data when the TX pin of the Bluetooth module
|
||||
+ * is floating which may cause spurious wakeups.
|
||||
+ */
|
||||
+ pins = "gpio41";
|
||||
+ function = "gpio";
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ reg_edp_1p2_en_default: reg-edp-1p2-en-deault-state {
|
||||
+ pins = "gpio19";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ reg_edp_1p8_en_default: reg-edp-1p8-en-deault-state {
|
||||
+ pins = "gpio20";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ reg_lcm_en_default: reg-lcm-en-deault-state {
|
||||
+ pins = "gpio26";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ reg_audio_en_default: reg-audio-en-deault-state {
|
||||
+ pins = "gpio83";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ reg_tp_en_default: reg-tp-en-deault-state {
|
||||
+ pins = "gpio25";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ soc_bkoff_default: soc-bkoff-deault-state {
|
||||
+ pins = "gpio10";
|
||||
+ function = "gpio";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ sdc1_default: sdc1-default-state {
|
||||
+ clk-pins {
|
||||
+ pins = "sdc1_clk";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ cmd-pins {
|
||||
+ pins = "sdc1_cmd";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ data-pins {
|
||||
+ pins = "sdc1_data";
|
||||
+ drive-strength = <16>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ rclk-pins {
|
||||
+ pins = "sdc1_rclk";
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ sdc1_sleep: sdc1-sleep-state {
|
||||
+ clk-pins {
|
||||
+ pins = "sdc1_clk";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+
|
||||
+ cmd-pins {
|
||||
+ pins = "sdc1_cmd";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ data-pins {
|
||||
+ pins = "sdc1_data";
|
||||
+ drive-strength = <2>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ rclk-pins {
|
||||
+ pins = "sdc1_rclk";
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.41.0
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
# Maintainer: Jenneron <jenneron@protonmail.com>
|
||||
pkgname=linux-postmarketos-qcom-sc7180
|
||||
pkgver=6.1.39
|
||||
pkgrel=1
|
||||
pkgrel=2
|
||||
pkgdesc="Mainline kernel fork for Qualcomm Snapdragon 7c devices"
|
||||
arch="aarch64"
|
||||
_carch="arm64"
|
||||
|
@ -34,6 +34,11 @@ case $pkgver in
|
|||
esac
|
||||
source="
|
||||
https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-${pkgver//_/-}.tar.xz
|
||||
0001-drm-panel-edp-Add-enable-timings-for-N140HCA-EAC-pan.patch
|
||||
0002-drm-bridge-ti-sn65dsi86-Implement-wait_hpd_asserted.patch
|
||||
0003-arm64-dts-qcom-sc7180-Don-t-enable-lpass-clocks-by-d.patch
|
||||
0004-arm64-dts-qcom-sc7180-Drop-redundant-disable-in-mdp.patch
|
||||
0005-arm64-dts-qcom-Add-Acer-Aspire-1.patch
|
||||
$_config
|
||||
"
|
||||
builddir="$srcdir/linux-${_kernver//_/-}"
|
||||
|
@ -65,5 +70,10 @@ package() {
|
|||
|
||||
sha512sums="
|
||||
20d468ae89b57dda82d7c7b814c3d8b1b510e1623775b09a8a0b0a8a0431461e0a1d2df2bfa01f3102932c8eef91405546898b50ec3e6f30015098bb39722b41 linux-6.1.39.tar.xz
|
||||
eee1c168ef24ecff55d01358f806f6aa31bb470d4ce547b812bda64bf78f916834e210d83aaf45955c44577981de5b12c196bff5f7236c7959e7f3df2985d035 0001-drm-panel-edp-Add-enable-timings-for-N140HCA-EAC-pan.patch
|
||||
f1c85f9e7b2dbebba54eca7080589ee35be501854510fd54f1fb3db07b8cfb62276cb9359a40096ac0a98bd01bc587de89dbf227aad6b371f64b78b5c806e583 0002-drm-bridge-ti-sn65dsi86-Implement-wait_hpd_asserted.patch
|
||||
03b638baea7703227c398ba37824eeb17a96138aced4cc1e0769a265eb38788ac1fd150166a0af9e22f1364d053f20219b2b269310d01c32c4089682939021bf 0003-arm64-dts-qcom-sc7180-Don-t-enable-lpass-clocks-by-d.patch
|
||||
82761a3c53167dfb02091fb5305dca67b52872db3ecb14a42d782ba1346f046160d47a379fd88f0e3cb7ee91aa35a2eebe89304edb618df3895e2d469c9c8863 0004-arm64-dts-qcom-sc7180-Drop-redundant-disable-in-mdp.patch
|
||||
639784302e28afc562fc6d9673b12fbce49f11b5e2400ed5c460d5e157e7196092f33e1c67a1ee6bf8ad5b4dbb81f2f0263439662a1b68ea49c9201f63afe153 0005-arm64-dts-qcom-Add-Acer-Aspire-1.patch
|
||||
d5be79c2affe17face7e964f21804536a8c7e0fa32347b89c2aa972c3e6e327754f68e468d0be32794a5a165015f9a3fdc46636f69837567a38fb09dee503131 config-postmarketos-qcom-sc7180.aarch64
|
||||
"
|
||||
|
|
76
device/testing/device-acer-aspire1/APKBUILD
Normal file
76
device/testing/device-acer-aspire1/APKBUILD
Normal file
|
@ -0,0 +1,76 @@
|
|||
# Reference: <https://postmarketos.org/devicepkg>
|
||||
# Maintainer: Nikita Travkin <nikita@trvn.ru>
|
||||
pkgname=device-acer-aspire1
|
||||
pkgdesc="Acer Aspire 1"
|
||||
pkgver=1
|
||||
pkgrel=0
|
||||
url="https://postmarketos.org"
|
||||
license="MIT"
|
||||
arch="aarch64"
|
||||
# pmb:strict: avoid grub-related install error during build with pmbootstrap
|
||||
options="!check !archcheck pmb:strict"
|
||||
depends="
|
||||
linux-postmarketos-qcom-sc7180
|
||||
postmarketos-base
|
||||
soc-qcom-sc8180x
|
||||
"
|
||||
makedepends="devicepkg-dev grub grub-efi"
|
||||
subpackages="$pkgname-nonfree-firmware:nonfree_firmware"
|
||||
source="
|
||||
deviceinfo
|
||||
modules-initfs
|
||||
"
|
||||
|
||||
build() {
|
||||
devicepkg_build $startdir $pkgname
|
||||
|
||||
grub-mkimage \
|
||||
--prefix="/grub" \
|
||||
--output="bootaa64.efi" \
|
||||
--format="arm64-efi" \
|
||||
--compression="xz" \
|
||||
\
|
||||
all_video \
|
||||
cat \
|
||||
configfile \
|
||||
disk \
|
||||
echo \
|
||||
efi_gop \
|
||||
fat \
|
||||
gzio \
|
||||
help \
|
||||
iso9660 \
|
||||
linux \
|
||||
ls \
|
||||
normal \
|
||||
part_gpt \
|
||||
part_msdos \
|
||||
search \
|
||||
search_label \
|
||||
test \
|
||||
true
|
||||
}
|
||||
|
||||
package() {
|
||||
devicepkg_package $startdir $pkgname
|
||||
|
||||
install -Dm644 "$srcdir"/bootaa64.efi \
|
||||
-t "$pkgdir"/boot/EFI/Boot
|
||||
}
|
||||
|
||||
nonfree_firmware() {
|
||||
pkgdesc="Modem, WiFi, Bluetooth and GPU Firmware"
|
||||
depends="
|
||||
firmware-acer-aspire1
|
||||
firmware-qcom-adreno-a630
|
||||
linux-firmware-ath10k
|
||||
linux-firmware-qca
|
||||
soc-qcom-sc8180x-nonfree-firmware
|
||||
"
|
||||
mkdir "$subpkgdir"
|
||||
}
|
||||
|
||||
sha512sums="
|
||||
d1464b00c217c39fc7cfa446de802886114c2bc54b9c6b93fea4d3a139f5e51b605c879541b457dbfe0e3bca226dae216d5ecbd5ede4263533406042ae9615c6 deviceinfo
|
||||
99b3c6fee1e4088ad0246170b6884c5f342893efa4d4846c4e9fa47fbf58f2dc655b8379f465e7d690621630804634533392254fc4305fea6d292a9d5eb4795a modules-initfs
|
||||
"
|
24
device/testing/device-acer-aspire1/deviceinfo
Normal file
24
device/testing/device-acer-aspire1/deviceinfo
Normal file
|
@ -0,0 +1,24 @@
|
|||
# Reference: <https://postmarketos.org/deviceinfo>
|
||||
# Please use double quotes only. You can source this file in shell scripts.
|
||||
|
||||
deviceinfo_format_version="0"
|
||||
deviceinfo_name="Acer Aspire 1"
|
||||
deviceinfo_manufacturer="Acer"
|
||||
deviceinfo_codename="acer-aspire1"
|
||||
deviceinfo_dtb="qcom/sc7180-acer-aspire1"
|
||||
deviceinfo_arch="aarch64"
|
||||
|
||||
# Device related
|
||||
deviceinfo_chassis="laptop"
|
||||
deviceinfo_keyboard="true"
|
||||
deviceinfo_external_storage="true"
|
||||
deviceinfo_gpu_accelerated="true"
|
||||
deviceinfo_screen_width="1920"
|
||||
deviceinfo_screen_height="1080"
|
||||
|
||||
# Bootloader related
|
||||
deviceinfo_flash_method="none"
|
||||
deviceinfo_kernel_cmdline="efi=novamap,noruntime deferred_probe_timeout=30 console=null"
|
||||
deviceinfo_generate_grub_config="true"
|
||||
deviceinfo_boot_filesystem="fat32"
|
||||
deviceinfo_partition_type="gpt"
|
1
device/testing/device-acer-aspire1/modules-initfs
Normal file
1
device/testing/device-acer-aspire1/modules-initfs
Normal file
|
@ -0,0 +1 @@
|
|||
i2c-hid-of
|
19
device/testing/firmware-acer-aspire1/APKBUILD
Normal file
19
device/testing/firmware-acer-aspire1/APKBUILD
Normal file
|
@ -0,0 +1,19 @@
|
|||
pkgname=firmware-acer-aspire1
|
||||
pkgver=1
|
||||
pkgrel=0
|
||||
pkgdesc="Firmware for Acer Aspire 1"
|
||||
url="https://laughlonely.gitlab.io"
|
||||
arch="aarch64"
|
||||
license="proprietary"
|
||||
options="!check !strip !archcheck !tracedeps pmb:cross-native"
|
||||
source="https://laughlonely.gitlab.io/firmware/aspire1.tar.xz"
|
||||
|
||||
package() {
|
||||
mkdir -p "$pkgdir"
|
||||
install -Dm644 "$srcdir"/*.jsn "$srcdir"/*.mbn \
|
||||
-t "$pkgdir"/lib/firmware/qcom/sc7180/acer/aspire1/
|
||||
}
|
||||
|
||||
sha512sums="
|
||||
534ed9024e54e7acabda1ce1c97ce5e16ad9be5c635da6b11dae7553152ea2a8baf9ab3dd77c7d42f719de1249cbe27f61f6884f35bc0ed9a072ab1e0479badd aspire1.tar.xz
|
||||
"
|
Loading…
Reference in a new issue