main/u-boot-pinephone: upgrade to v2023.01 (MR 3806)
[ci:skip-build]: Already built successfully in CI
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2 changed files with 21 additions and 30 deletions
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@ -1,40 +1,32 @@
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From a568d5efe609fec974d44fec4cba31288ab0f621 Mon Sep 17 00:00:00 2001
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From 4061bf81c366ccb309e2e597c5012ca246809b3a Mon Sep 17 00:00:00 2001
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From: Bobby The Builder <bob@najdan.com>
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Date: Mon, 29 Mar 2021 16:42:07 -0400
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Subject: [PATCH 4/5] common: expose DRAM clock speed
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Date: Thu, 12 Jan 2023 10:23:39 -0500
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Subject: [PATCH] common: expose DRAM clock speed
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add memory/ram_freq
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---
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common/board_f.c | 6 ++++--
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common/main.c | 7 +++++++
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2 files changed, 11 insertions(+), 2 deletions(-)
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common/board_f.c | 3 +++
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common/main.c | 6 ++++++
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2 files changed, 9 insertions(+)
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diff --git a/common/board_f.c b/common/board_f.c
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index 0cddf0359d..e481c70ef0 100644
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index e6117a7ba5..1fcfd3da86 100644
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--- a/common/board_f.c
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+++ b/common/board_f.c
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@@ -227,12 +227,14 @@ static int show_dram_config(void)
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print_size(gd->bd->bi_dram[i].size, "\n");
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#endif
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}
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- debug("\nDRAM: ");
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+ debug("\nDRAM Size: ");
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@@ -251,6 +251,9 @@ static int show_dram_config(void)
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debug("\nDRAM: ");
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print_size(size, "");
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board_add_ram_info(0);
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putc('\n');
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-
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print_size(gd->ram_size, "");
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+#if defined(CONFIG_DRAM_CLK)
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+ printf("DRAM Clock: %d MHz\n", CONFIG_DRAM_CLK);
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+ printf(" @ %d MHz", CONFIG_DRAM_CLK);
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+#endif
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return 0;
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}
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if (!sizes_near(gd->ram_size, size)) {
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printf(" (effective ");
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print_size(size, ")");
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diff --git a/common/main.c b/common/main.c
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index ae5bcdb32f..85adcc6c13 100644
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index 682f3359ea..877df4c858 100644
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--- a/common/main.c
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+++ b/common/main.c
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@@ -46,6 +46,13 @@ void main_loop(void)
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@@ -46,6 +46,12 @@ void main_loop(void)
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if (IS_ENABLED(CONFIG_VERSION_VARIABLE))
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env_set("ver", version_string); /* set version variable */
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@ -42,12 +34,11 @@ index ae5bcdb32f..85adcc6c13 100644
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+ char ram_clk_string[11];
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+ sprintf(ram_clk_string, "%d", CONFIG_DRAM_CLK);
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+ env_set("ram_freq", ram_clk_string);
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+ printf("Set ram_freq : %s\n", ram_clk_string);
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+#endif
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+
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cli_init();
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if (IS_ENABLED(CONFIG_USE_PREBOOT))
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--
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2.31.1
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2.38.1
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@ -4,8 +4,8 @@
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# Co-Maintainer: Dylan Van Assche <me@dylanvanassche.be>
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# U-boot with patches to make the PinePhone boot faster and have control over the ddr clock speed
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pkgname=u-boot-pinephone
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pkgver=2022.07
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pkgrel=1
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pkgver=2023.01
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pkgrel=0
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pkgdesc="U-Boot bootloader for the PINE64 PinePhone"
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url="https://source.denx.de/u-boot"
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arch="aarch64"
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@ -63,8 +63,8 @@ package() {
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}
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sha512sums="
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7cd524d5c4b692c99d61fae4e7d99287ce4bca06884dc02b62bd69dfdf594cc9232c13c5b8dbb3aeac125bf7907591dbc6a40e2ea3e39f024bd5a5d42aeaa4cd u-boot-v2022.07.tar.gz
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c25aae1b0d2f677d295587c6d318f23d52bc3a79e968bed9093645943a9840c56b1f6f44e5649d236e76e3dc85f0473c1da4a5205c02dcf437bca820acaf6fb8 u-boot-v2023.01.tar.gz
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8dc0a8847ed26d91d3acc9b7b9dd300f95a68049207b09c3cfca1ec485f6f976aa65e0d101a4b46ecc4e85e943cbdec35e81ab0da07b1d5d0b68b4b10858b44b update-u-boot
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86d9587cb2b0ca99fb4090bd0daacd47c0043858654f6f7114c8d0ed6c660eb2b8bc0b37de6723e738df9b1137d62482f00764c284f4aa0a6054db9efe754db9 0001-common-expose-DRAM-clock-speed.patch
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0a05291f5d544854b6e27c7c3290878c55382c50e0374c880d457e7c21425eaec23fd67047fd7e629dba3fa060aa041dec5880e7edc9e52dea897fb93af5d2aa 0001-common-expose-DRAM-clock-speed.patch
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9b9a5bd2cb5c04715a5bb2d34bfc06e63817dba7ec40fa2b09000a0827590623e85ed5877d6b6bb39f2bb917e5e9d8e1379e3df9128e3304be06abc487c68df2 0002-disable-bootdelay.patch
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"
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