linux-postmarketos-rockchip: upgrade to 5.13, enable nftables (MR 2299)
This switches the config over to one based on Alpine's linux-gru which is for an rk3399 chromebook. It produces way smaller kernels and has more general purpose hardware support.
This commit is contained in:
Clayton Craft
Martijn Braam
parent
bd85700dea
commit
b7cad1a182
8 changed files with 2240 additions and 2887 deletions
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@ -0,0 +1,49 @@
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From db4e9ffdb985752ae3c3436ff86f8f376ae8fd22 Mon Sep 17 00:00:00 2001
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From: Tobias Schramm <t.schramm@manjaro.org>
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Date: Thu, 28 May 2020 14:25:32 +0200
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Subject: [PATCH] phy: rockchip: typec: Set extcon capabilities
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Do not mainline, hack.
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Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
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---
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drivers/phy/rockchip/phy-rockchip-typec.c | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
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index 70a31251b202..5385bb4f0bd4 100644
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--- a/drivers/phy/rockchip/phy-rockchip-typec.c
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+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
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@@ -40,6 +40,7 @@
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#include <linux/clk-provider.h>
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#include <linux/delay.h>
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#include <linux/extcon.h>
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+#include <linux/extcon-provider.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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@@ -1160,6 +1161,22 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev)
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dev_err(dev, "Invalid or missing extcon\n");
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return PTR_ERR(tcphy->extcon);
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}
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+ } else {
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+ extcon_set_property_capability(tcphy->extcon, EXTCON_USB,
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+ EXTCON_PROP_USB_SS);
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+ extcon_set_property_capability(tcphy->extcon, EXTCON_USB_HOST,
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+ EXTCON_PROP_USB_SS);
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+ extcon_set_property_capability(tcphy->extcon, EXTCON_DISP_DP,
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+ EXTCON_PROP_USB_SS);
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+ extcon_set_property_capability(tcphy->extcon, EXTCON_USB,
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+ EXTCON_PROP_USB_TYPEC_POLARITY);
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+ extcon_set_property_capability(tcphy->extcon, EXTCON_USB_HOST,
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+ EXTCON_PROP_USB_TYPEC_POLARITY);
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+ extcon_set_property_capability(tcphy->extcon, EXTCON_DISP_DP,
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+ EXTCON_PROP_USB_TYPEC_POLARITY);
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+ extcon_sync(tcphy->extcon, EXTCON_USB);
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+ extcon_sync(tcphy->extcon, EXTCON_USB_HOST);
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+ extcon_sync(tcphy->extcon, EXTCON_DISP_DP);
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}
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pm_runtime_enable(dev);
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--
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GitLab
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@ -0,0 +1,44 @@
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From 948d7ade0ddcf292b91d91cb8b6819a19ab3f604 Mon Sep 17 00:00:00 2001
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From: Tobias Schramm <t.schramm@manjaro.org>
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Date: Thu, 28 May 2020 14:44:15 +0200
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Subject: [PATCH] arm64: dts: rockchip: add typec extcon hack
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Not for mainline
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Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
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---
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arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
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index decb212e2dca..37f967a89401 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
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@@ -401,6 +401,7 @@ opp08 {
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&cdn_dp {
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status = "okay";
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+ extcon = <&fusb0>;
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};
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&cpu_b0 {
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@@ -735,6 +736,9 @@ connector {
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<PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>;
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try-power-role = "sink";
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+ extcon-cables = <1 2 5 6 9 10 12 44>;
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+ typec-altmodes = <0xff01 1 0x001c0000 1>;
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+
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -1002,6 +1006,7 @@ spiflash: flash@0 {
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};
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&tcphy0 {
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+ extcon = <&fusb0>;
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status = "okay";
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};
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--
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GitLab
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@ -0,0 +1,29 @@
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From a8f3e4ffe533f952a468cb8f3d067865bd58144f Mon Sep 17 00:00:00 2001
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From: Tobias Schramm <t.schramm@manjaro.org>
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Date: Sat, 6 Jun 2020 23:45:10 +0200
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Subject: [PATCH] arm64: dts: rockchip: setup USB type c port as dual data role
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Some chargers try to put the charged device into device data role.
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Before this commit this condition caused the tcpm state machine to
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issue a hard reset due to a capability missmatch.
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Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
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---
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arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
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index c505c88b5d9b..d77dca5524ff 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
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@@ -726,7 +726,7 @@ fusb0: fusb30x@22 {
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connector {
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compatible = "usb-c-connector";
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- data-role = "host";
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+ data-role = "dual";
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label = "USB-C";
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op-sink-microwatt = <1000000>;
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power-role = "dual";
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--
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GitLab
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@ -0,0 +1,130 @@
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From 52e17051609757eca49cc31acb6e1ed9b19a7d54 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= <ayufan@ayufan.eu>
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Date: Sun, 18 Oct 2020 21:37:42 +0200
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Subject: [PATCH 06/11] ayufan: dts: rockpro64: add type-c DP ALT
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---
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.../boot/dts/rockchip/rk3399-rockpro64.dtsi | 54 +++++++++++++++++++
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1 file changed, 54 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
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index 6e553ff47534..ec2de6622f4c 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
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@@ -6,6 +6,7 @@
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/pwm/pwm.h>
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+#include <dt-bindings/usb/pd.h>
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#include "rk3399.dtsi"
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#include "rk3399-opp.dtsi"
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@@ -191,6 +192,11 @@ vdd_log: vdd-log {
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};
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};
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+&cdn_dp {
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+ status = "okay";
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+ extcon = <&fusb0>;
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+};
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+
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_l>;
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};
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@@ -505,6 +511,54 @@ fusb0: typec-portc@22 {
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pinctrl-0 = <&fusb0_int>;
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vbus-supply = <&vcc5v0_typec>;
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status = "okay";
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+
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+ connector {
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+ compatible = "usb-c-connector";
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+ data-role = "host";
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+ label = "USB-C";
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+ op-sink-microwatt = <1000000>;
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+ power-role = "dual";
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+ sink-pdos =
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+ <PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
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+ source-pdos =
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+ <PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>;
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+ try-power-role = "sink";
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+
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+ extcon-cables = <1 2 5 6 9 10 12 44>;
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+ typec-altmodes = <0xff01 1 0x001c0c00 1>;
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ port@0 {
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+ reg = <0>;
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+
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+ usbc_hs: endpoint {
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+ remote-endpoint =
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+ <&u2phy0_typec_hs>;
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+ };
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+ };
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+
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+ port@1 {
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+ reg = <1>;
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+
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+ usbc_ss: endpoint {
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+ remote-endpoint =
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+ <&tcphy0_typec_ss>;
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+ };
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+ };
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+
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+ port@2 {
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+ reg = <2>;
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+
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+ usbc_dp: endpoint {
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+ remote-endpoint =
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+ <&tcphy0_typec_dp>;
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+ };
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+ };
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+ };
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+ };
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};
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};
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@@ -735,9 +811,26 @@
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};
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&tcphy0 {
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+ extcon = <&fusb0>;
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status = "okay";
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};
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+&tcphy0_dp {
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+ port {
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+ tcphy0_typec_dp: endpoint {
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+ remote-endpoint = <&usbc_dp>;
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+ };
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+ };
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+};
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+
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+&tcphy0_usb3 {
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+ port {
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+ tcphy0_typec_ss: endpoint {
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+ remote-endpoint = <&usbc_ss>;
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+ };
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+ };
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+};
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+
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&tcphy1 {
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status = "okay";
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};
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@@ -761,6 +854,12 @@
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phy-supply = <&vcc5v0_host>;
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status = "okay";
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};
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+
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+ port {
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+ u2phy0_typec_hs: endpoint {
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+ remote-endpoint = <&usbc_hs>;
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+ };
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+ };
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};
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&u2phy1 {
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--
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2.25.1
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From bdd540aa2a4eb304afb6e9d6e469b856c7b441c7 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= <ayufan@ayufan.eu>
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Date: Fri, 10 Apr 2020 00:24:03 +0200
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Subject: [PATCH 2/2] ayufan: drm: rockchip: add support for modeline 32MHz
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(ex. `1024x600@43`)
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---
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drivers/clk/rockchip/clk-rk3399.c | 1 +
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drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 ++++++
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2 files changed, 7 insertions(+)
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diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
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index 7df2f1e00347..5dcf9b5778a3 100644
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--- a/drivers/clk/rockchip/clk-rk3399.c
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+++ b/drivers/clk/rockchip/clk-rk3399.c
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@@ -101,6 +101,7 @@ static struct rockchip_pll_rate_table rk3399_pll_rates[] = {
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RK3036_PLL_RATE( 74250000, 2, 99, 4, 4, 1, 0),
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RK3036_PLL_RATE( 65000000, 1, 65, 6, 4, 1, 0),
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RK3036_PLL_RATE( 54000000, 1, 54, 6, 4, 1, 0),
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+ RK3036_PLL_RATE( 32000000, 3, 112, 7, 4, 0, 0),
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RK3036_PLL_RATE( 27000000, 1, 27, 6, 4, 1, 0),
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{ /* sentinel */ },
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};
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diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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index 23de359a1dec..9ad35ed3018e 100644
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--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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@@ -84,6 +84,12 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
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{ 0x2153, 0x0000},
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{ 0x40f3, 0x0000}
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},
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+ }, {
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+ 32000000, {
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+ { 0x0072, 0x0001},
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+ { 0x2153, 0x0000},
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+ { 0x40f3, 0x0000}
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+ },
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}, {
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36000000, {
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{ 0x00b3, 0x0000},
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--
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2.25.1
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@ -0,0 +1,194 @@
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From ceae51b1cc0e5a5b42999274657bd55606193661 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Jari=20H=C3=A4m=C3=A4l=C3=A4inen?= <nuumiofi@gmail.com>
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Date: Sun, 22 Nov 2020 15:24:49 +0200
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Subject: [PATCH] nuumio: pcie: Reimplement rockchip PCIe bus scan delay
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Reimplementation of my old Rockchip PCIe bus scan delay patch for
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kernels >= 5.9.
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Delay may fix panix with some PCIe devices, like LSI SAS 9201-8i with
|
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SAS2008 chipset in my case.
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Crash dump (customized Manjaro kernel before this patch):
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[ 1.229856] SError Interrupt on CPU4, code 0xbf000002 -- SError
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[ 1.229860] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 5.9.9-2.0-MANJARO-ARM #1
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[ 1.229862] Hardware name: Pine64 RockPro64 v2.1 (DT)
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[ 1.229864] pstate: 60000085 (nZCv daIf -PAN -UAO BTYPE=--)
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[ 1.229866] pc : rockchip_pcie_rd_conf+0xb4/0x270
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[ 1.229868] lr : rockchip_pcie_rd_conf+0x1b4/0x270
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[ 1.229870] sp : ffff80001004b850
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[ 1.229872] x29: ffff80001004b850 x28: 0000000000000001
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[ 1.229877] x27: 0000000000000000 x26: ffff00007a795000
|
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[ 1.229882] x25: ffff00007a7910b0 x24: 0000000000000000
|
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[ 1.229887] x23: 0000000000000000 x22: ffff00007b3a4380
|
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[ 1.229891] x21: ffff80001004b8c4 x20: 0000000000000004
|
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[ 1.229895] x19: 0000000000100000 x18: 0000000000000020
|
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[ 1.229900] x17: 0000000000000001 x16: 0000000000000019
|
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[ 1.229904] x15: ffff00007b222fd8 x14: ffffffffffffffff
|
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[ 1.229908] x13: ffff00007a79ba1c x12: ffff00007a79b290
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[ 1.229912] x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f
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[ 1.229917] x9 : ff72646268756463 x8 : 0000000000000391
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[ 1.229921] x7 : ffff80001004b880 x6 : 0000000000000001
|
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[ 1.229925] x5 : 0000000000000000 x4 : 0000000000000000
|
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[ 1.229930] x3 : 0000000000c00008 x2 : 000000000080000a
|
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[ 1.229934] x1 : 0000000000000000 x0 : ffff800014000000
|
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[ 1.229939] Kernel panic - not syncing: Asynchronous SError Interrupt
|
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[ 1.229942] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 5.9.9-2.0-MANJARO-ARM #1
|
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[ 1.229944] Hardware name: Pine64 RockPro64 v2.1 (DT)
|
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[ 1.229946] Call trace:
|
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[ 1.229948] dump_backtrace+0x0/0x1d0
|
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[ 1.229949] show_stack+0x18/0x24
|
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[ 1.229951] dump_stack+0xc0/0x118
|
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[ 1.229953] panic+0x148/0x320
|
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[ 1.229955] nmi_panic+0x8c/0x90
|
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[ 1.229956] arm64_serror_panic+0x78/0x84
|
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[ 1.229958] do_serror+0x15c/0x160
|
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[ 1.229960] el1_error+0x84/0x100
|
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[ 1.229962] rockchip_pcie_rd_conf+0xb4/0x270
|
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[ 1.229964] pci_bus_read_config_dword+0x6c/0xd0
|
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[ 1.229966] pci_bus_generic_read_dev_vendor_id+0x34/0x1b0
|
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[ 1.229968] pci_scan_single_device+0xa4/0x144
|
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[ 1.229970] pci_scan_slot+0x40/0x12c
|
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[ 1.229972] pci_scan_child_bus_extend+0x58/0x34c
|
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[ 1.229974] pci_scan_bridge_extend+0x310/0x590
|
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[ 1.229976] pci_scan_child_bus_extend+0x210/0x34c
|
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[ 1.229978] pci_scan_root_bus_bridge+0x68/0xdc
|
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[ 1.229980] pci_host_probe+0x18/0xc4
|
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[ 1.229981] rockchip_pcie_probe+0x204/0x330
|
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[ 1.229984] platform_drv_probe+0x54/0xb0
|
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[ 1.229985] really_probe+0xe8/0x500
|
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[ 1.229987] driver_probe_device+0xd8/0xf0
|
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[ 1.229989] device_driver_attach+0xc0/0xcc
|
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[ 1.229991] __driver_attach+0xa4/0x170
|
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[ 1.229993] bus_for_each_dev+0x70/0xc0
|
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[ 1.229994] driver_attach+0x24/0x30
|
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[ 1.229996] bus_add_driver+0x140/0x234
|
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[ 1.229998] driver_register+0x78/0x130
|
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[ 1.230000] __platform_driver_register+0x4c/0x60
|
||||
[ 1.230002] rockchip_pcie_driver_init+0x1c/0x28
|
||||
[ 1.230004] do_one_initcall+0x54/0x1c0
|
||||
[ 1.230005] do_initcalls+0xf4/0x130
|
||||
[ 1.230007] kernel_init_freeable+0x144/0x19c
|
||||
[ 1.230009] kernel_init+0x14/0x11c
|
||||
[ 1.230011] ret_from_fork+0x10/0x34
|
||||
[ 1.230035] SMP: stopping secondary CPUs
|
||||
[ 1.230037] Kernel Offset: disabled
|
||||
[ 1.230039] CPU features: 0x0240022,2100200c
|
||||
[ 1.230041] Memory Limit: none
|
||||
---
|
||||
.../admin-guide/kernel-parameters.txt | 8 ++++++
|
||||
.../boot/dts/rockchip/rk3399-rockpro64.dtsi | 1 +
|
||||
drivers/pci/controller/pcie-rockchip-host.c | 25 +++++++++++++++++++
|
||||
drivers/pci/controller/pcie-rockchip.c | 6 +++++
|
||||
drivers/pci/controller/pcie-rockchip.h | 2 ++
|
||||
5 files changed, 42 insertions(+)
|
||||
|
||||
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
|
||||
index 44fde25bb221..941dc943eb84 100644
|
||||
--- a/Documentation/admin-guide/kernel-parameters.txt
|
||||
+++ b/Documentation/admin-guide/kernel-parameters.txt
|
||||
@@ -3816,6 +3816,14 @@
|
||||
nomsi Do not use MSI for native PCIe PME signaling (this makes
|
||||
all PCIe root ports use INTx for all services).
|
||||
|
||||
+ pcie_rockchip_host.bus_scan_delay= [PCIE] Delay in ms before
|
||||
+ scanning PCIe bus in Rockchip PCIe host driver. Some PCIe
|
||||
+ cards seem to need delays that can be several hundred ms.
|
||||
+ If set to greater than or equal to 0 this parameter will
|
||||
+ override delay that can be set in device tree.
|
||||
+ Values less than 0 mean that this parameter is ignored.
|
||||
+ default=-1
|
||||
+
|
||||
pcmv= [HW,PCMCIA] BadgePAD 4
|
||||
|
||||
pd_ignore_unused
|
||||
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
|
||||
index 9705059523a6..632dac43a037 100644
|
||||
--- a/drivers/pci/controller/pcie-rockchip-host.c
|
||||
+++ b/drivers/pci/controller/pcie-rockchip-host.c
|
||||
@@ -24,6 +24,7 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/module.h>
|
||||
+#include <linux/moduleparam.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_pci.h>
|
||||
@@ -39,6 +40,9 @@
|
||||
#include "../pci.h"
|
||||
#include "pcie-rockchip.h"
|
||||
|
||||
+static int bus_scan_delay = -1;
|
||||
+module_param_named(bus_scan_delay, bus_scan_delay, int, S_IRUGO);
|
||||
+
|
||||
static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip)
|
||||
{
|
||||
u32 status;
|
||||
@@ -942,6 +946,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
|
||||
struct device *dev = &pdev->dev;
|
||||
struct pci_host_bridge *bridge;
|
||||
int err;
|
||||
+ u32 delay = 0;
|
||||
|
||||
if (!dev->of_node)
|
||||
return -ENODEV;
|
||||
@@ -993,6 +998,26 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
|
||||
bridge->sysdata = rockchip;
|
||||
bridge->ops = &rockchip_pcie_ops;
|
||||
|
||||
+ /* Checking if bus scan delay was given from command line and prefer
|
||||
+ * that over the value in device tree (which defaults to 0 if not set).
|
||||
+ */
|
||||
+ if (bus_scan_delay >= 0) {
|
||||
+ delay = bus_scan_delay;
|
||||
+ dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay);
|
||||
+ } else {
|
||||
+ delay = rockchip->bus_scan_delay;
|
||||
+ dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay);
|
||||
+ }
|
||||
+ /* Workaround for some devices crashing on pci_host_probe / pci_scan_root_bus_bridge
|
||||
+ * calls: sleep a bit before bus scan. Call trace gets to rockchip_pcie_rd_conf when
|
||||
+ * trying to read vendor id (pci_bus_generic_read_dev_vendor_id is in call stack)
|
||||
+ * before panicing. I have no idea why this works or what causes the panic. I just
|
||||
+ * found this hack by luck when trying to "make it break differently if possible".
|
||||
+ */
|
||||
+ if (delay > 0) {
|
||||
+ msleep(delay);
|
||||
+ }
|
||||
+
|
||||
err = pci_host_probe(bridge);
|
||||
if (err < 0)
|
||||
goto err_remove_irq_domain;
|
||||
diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c
|
||||
index 904dec0d3a88..e6c97f9944ba 100644
|
||||
--- a/drivers/pci/controller/pcie-rockchip.c
|
||||
+++ b/drivers/pci/controller/pcie-rockchip.c
|
||||
@@ -149,6 +149,12 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
|
||||
return PTR_ERR(rockchip->clk_pcie_pm);
|
||||
}
|
||||
|
||||
+ err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay);
|
||||
+ if (err) {
|
||||
+ dev_info(dev, "no bus scan delay, default to 0 ms\n");
|
||||
+ rockchip->bus_scan_delay = 0;
|
||||
+ }
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);
|
||||
diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
|
||||
index c7d0178fc8c2..52fd2108b704 100644
|
||||
--- a/drivers/pci/controller/pcie-rockchip.h
|
||||
+++ b/drivers/pci/controller/pcie-rockchip.h
|
||||
@@ -306,6 +306,8 @@ struct rockchip_pcie {
|
||||
phys_addr_t msg_bus_addr;
|
||||
bool is_rc;
|
||||
struct resource *mem_res;
|
||||
+ /* Bus scan delay is a workaround for some pcie devices causing crashes */
|
||||
+ u32 bus_scan_delay;
|
||||
};
|
||||
|
||||
static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg)
|
||||
--
|
||||
2.29.2
|
||||
|
||||
|
|
@ -10,15 +10,21 @@
|
|||
# boot failure
|
||||
|
||||
pkgname=linux-postmarketos-rockchip
|
||||
pkgver=5.11.2
|
||||
pkgrel=1
|
||||
pkgver=5.13.0
|
||||
pkgrel=0
|
||||
pkgdesc="Mainline kernel for rockchip devices"
|
||||
arch="aarch64"
|
||||
_carch="arm64"
|
||||
_flavor="${pkgname#linux-}"
|
||||
url="https://kernel.org"
|
||||
license="GPL-2.0-only"
|
||||
options="!strip !check !tracedeps pmb:cross-native pmb:kconfigcheck-anbox"
|
||||
options="!strip !check !tracedeps
|
||||
pmb:cross-native
|
||||
pmb:kconfigcheck-anbox
|
||||
pmb:kconfigcheck-nftables
|
||||
pmb:kconfigcheck-containers
|
||||
pmb:kconfigcheck-zram
|
||||
"
|
||||
makedepends="
|
||||
bison
|
||||
devicepkg-dev
|
||||
|
|
@ -28,7 +34,11 @@ makedepends="
|
|||
openssl-dev
|
||||
perl
|
||||
rsync
|
||||
gzip
|
||||
xz
|
||||
clang
|
||||
lld
|
||||
llvm11
|
||||
"
|
||||
|
||||
# Source
|
||||
|
|
@ -37,8 +47,18 @@ case $pkgver in
|
|||
*.*.*) _kernver=${pkgver%.0};;
|
||||
*.*) _kernver=$pkgver;;
|
||||
esac
|
||||
|
||||
export LLVM=1
|
||||
export LLVM_IAS=1
|
||||
|
||||
source="
|
||||
https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-$_kernver.tar.xz
|
||||
0001-phy-rockchip-typec-Set-extcon-capabilities.patch
|
||||
0002-arm64-dts-rockchip-add-typec-extcon-hack.patch
|
||||
0003-arm64-dts-rockchip-setup-USB-type-c-port-as-dual-data-role.patch
|
||||
0004-arm64-rockchip-add-DP-ALT-rockpro64.patch
|
||||
0005-ayufan-drm-rockchip-add-support-for-modeline-32MHz-e.patch
|
||||
0006-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch
|
||||
$_config
|
||||
"
|
||||
builddir="$srcdir/linux-$_kernver"
|
||||
|
|
@ -51,8 +71,9 @@ prepare() {
|
|||
|
||||
build() {
|
||||
unset LDFLAGS
|
||||
make ARCH="$_carch" CC="${CC:-gcc}" \
|
||||
make ARCH="$_carch" CC=clang \
|
||||
KBUILD_BUILD_VERSION="$((pkgrel + 1 ))-$_flavor"
|
||||
|
||||
}
|
||||
|
||||
package() {
|
||||
|
|
@ -63,8 +84,18 @@ package() {
|
|||
INSTALL_MOD_STRIP=1 \
|
||||
INSTALL_MOD_PATH="$pkgdir" \
|
||||
INSTALL_DTBS_PATH="$pkgdir/boot/dtbs-$_flavor"
|
||||
gzip -v "$pkgdir"/boot/vmlinuz-postmarketos-rockchip
|
||||
mv "$pkgdir"/boot/vmlinuz-postmarketos-rockchip.gz "$pkgdir"/boot/vmlinuz-postmarketos-rockchip
|
||||
}
|
||||
|
||||
|
||||
sha512sums="16090ec6dea7a8c417ca7483b296902c9b55b423482ad8a881dffcaae76411806bc9502373efd6a51b0acefec3a44c19c5a7d42c5b76c1321183a4798a5959d3 linux-5.11.2.tar.xz
|
||||
25103c98349c1e91e2161b2cfe995f4fc376483d7660f47000cc67db2c0698bcd77cecda73379d9114a26c56d338bda1081f2a2faee63ee420d95434bda56138 config-postmarketos-rockchip.aarch64"
|
||||
sha512sums="
|
||||
a8edf97e9d38a49f1be2bde1e29ad96274bb2c6f7e8a2bebaa1161dd4df9cabcbaec4ff644c45bee94f86ae47725087d6deed0cd954209cec717621d137db85e linux-5.13.tar.xz
|
||||
10949558a6e3316ea57497f377fd120d6704f3b81725317556e49d10b570a40edb06643b06738116abbe3096be485761d436f1a0d1861bd34fc18ea45068b6b0 0001-phy-rockchip-typec-Set-extcon-capabilities.patch
|
||||
b7291eecfddc7ebe9393eea864e0ee28960e8cc2f87dfc42d09426b5619f46ded97c38fb8bf26f4eea1f26bfe21396094505b3efb8676691f8751e2ffabe50ec 0002-arm64-dts-rockchip-add-typec-extcon-hack.patch
|
||||
427b81472de2a473344269b2da06ac338af42e68620a281a9cb8543e545e6ed7f719acaf68c688e518b65d2132e0c66676ba5e30376ec980fd6eeaea05c2a8be 0003-arm64-dts-rockchip-setup-USB-type-c-port-as-dual-data-role.patch
|
||||
206fc67879c883e5ce72e748f4afb7135c21a447a5fa3c59c2863355c24c7134b89768801ddef15fdc38602f6c7978bb63eb8f68871e8dc8440eabef4de0e627 0004-arm64-rockchip-add-DP-ALT-rockpro64.patch
|
||||
e2afcf9db5bb033c545fcb938ee5179adc7993368d89312ae484a7fbf1987a0b6566f17c6677f2c6f6a13c7d4bea227592206d55b35209269ff9f4704473b3f7 0005-ayufan-drm-rockchip-add-support-for-modeline-32MHz-e.patch
|
||||
e820ddd51fd03106b56a1ce325b1316259a4d0dbf0565b2f3888f64beb44e0b4ef049be08888db4557b5c14945ae3f5ac782896fb84fc2b8c8f130fb7be44bd5 0006-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch
|
||||
188c0c3504f6b5a22053314881b125e56b3522bcd48adcfbc69a6147375727f82dd4795453244e2d973375c922bf6de077fc39e54ebb51a2ef2a95fe19cbb0f1 config-postmarketos-rockchip.aarch64
|
||||
"
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
Loading…
Reference in a new issue