linux-postmarketos-exynos5: upgrade to 5.18.5 (MR 3516)
Also: Fix camera on google-snow. Enable video decoder. Make boot.img smaller making kernel more modular and making FS-related modules =y instead of =m (built-in file systems consume less space than initramfs modules).
This commit is contained in:
parent
03ceddb284
commit
8acf002c17
32 changed files with 592 additions and 1862 deletions
|
@ -1,24 +1,19 @@
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From dcde1b82bbf5bb4b4f58beb1dfa593d4d8e1501e Mon Sep 17 00:00:00 2001
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From bccdde521bb64c23902f64303d12de5a4a11635d Mon Sep 17 00:00:00 2001
|
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From: Anton Bambura <jenneron@protonmail.com>
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Date: Sat, 5 Feb 2022 03:19:07 +0200
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Subject: [PATCH 1/3] WIP: ASoC: samsung: snow: add jack detection support
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Subject: [PATCH] ASoC: samsung: snow: add jack detection
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Add jack detection support with two GPIOs:
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- samsung,hp-det;
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- samsung,mic-det.
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This change works (alsa sends events, pulseaudio switches devices), but
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there are such messages in kmsg on each plug/unplug:
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[ 85.673023] snow-audio sound: ASoC: DAPM unknown pin Headphone
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[ 86.005010] snow-audio sound: ASoC: DAPM unknown pin Mic Jack
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Signed-off-by: Anton Bambura <jenneron@protonmail.com>
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---
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sound/soc/samsung/snow.c | 86 ++++++++++++++++++++++++++++++++++++++++
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1 file changed, 86 insertions(+)
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sound/soc/samsung/snow.c | 94 ++++++++++++++++++++++++++++++++++++++++
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1 file changed, 94 insertions(+)
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diff --git a/sound/soc/samsung/snow.c b/sound/soc/samsung/snow.c
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index 6da674e90..bd534c56f 100644
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index 6da674e90..2d85e05cd 100644
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--- a/sound/soc/samsung/snow.c
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+++ b/sound/soc/samsung/snow.c
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@@ -3,10 +3,12 @@
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|
@ -34,7 +29,7 @@ index 6da674e90..bd534c56f 100644
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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@@ -22,6 +24,32 @@ SND_SOC_DAILINK_DEFS(links,
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@@ -22,6 +24,37 @@ SND_SOC_DAILINK_DEFS(links,
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struct snow_priv {
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struct snd_soc_dai_link dai_link;
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struct clk *clk_i2s_bus;
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@ -45,7 +40,7 @@ index 6da674e90..bd534c56f 100644
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+static struct snd_soc_jack snow_hp_jack;
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+
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+static struct snd_soc_jack_pin snow_hp_jack_pins[] = {
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+ { .pin = "Headphone", .mask = SND_JACK_HEADPHONE },
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+ { .pin = "Headphone Jack", .mask = SND_JACK_HEADPHONE },
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+};
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+
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+static struct snd_soc_jack_gpio snow_hp_jack_gpio = {
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@ -64,10 +59,15 @@ index 6da674e90..bd534c56f 100644
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+ .name = "Microphone detection",
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+ .report = SND_JACK_MICROPHONE,
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+ .debounce_time = 150,
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+};
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+
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+static const struct snd_soc_dapm_widget snow_dapm_widgets[] = {
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+ SND_SOC_DAPM_HP("Headphone Jack", NULL),
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+ SND_SOC_DAPM_MIC("Mic Jack", NULL),
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};
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static int snow_card_hw_params(struct snd_pcm_substream *substream,
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@@ -105,9 +133,56 @@ static int snow_late_probe(struct snd_soc_card *card)
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@@ -105,9 +138,56 @@ static int snow_late_probe(struct snd_soc_card *card)
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{
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struct snd_soc_pcm_runtime *rtd;
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struct snd_soc_dai *codec_dai;
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@ -124,7 +124,7 @@ index 6da674e90..bd534c56f 100644
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/* In the multi-codec case codec_dais 0 is MAX98095 and 1 is HDMI. */
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codec_dai = asoc_rtd_to_codec(rtd, 0);
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@@ -129,6 +204,7 @@ static int snow_probe(struct platform_device *pdev)
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@@ -129,6 +209,7 @@ static int snow_probe(struct platform_device *pdev)
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struct device_node *cpu, *codec;
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struct snd_soc_dai_link *link;
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struct snow_priv *priv;
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@ -132,7 +132,7 @@ index 6da674e90..bd534c56f 100644
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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@@ -137,6 +213,16 @@ static int snow_probe(struct platform_device *pdev)
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@@ -137,6 +218,16 @@ static int snow_probe(struct platform_device *pdev)
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link = &priv->dai_link;
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@ -149,6 +149,16 @@ index 6da674e90..bd534c56f 100644
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link->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
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SND_SOC_DAIFMT_CBS_CFS;
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@@ -154,6 +245,9 @@ static int snow_probe(struct platform_device *pdev)
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card->num_links = 1;
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card->dev = dev;
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+ card->dapm_widgets = snow_dapm_widgets;
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+ card->num_dapm_widgets = ARRAY_SIZE(snow_dapm_widgets);
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+
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/* Try new DT bindings with HDMI support first. */
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cpu = of_get_child_by_name(dev->of_node, "cpu");
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--
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2.34.1
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2.36.1
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|
|
@ -1,30 +0,0 @@
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From ef6559982b265ccc27a68085c521ed26b5efbd85 Mon Sep 17 00:00:00 2001
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From: Henrik Grimler <henrik@grimler.se>
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Date: Mon, 20 Dec 2021 11:47:38 +0100
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Subject: [PATCH 10/16] dt-bindings: arm: samsung: document Chagall WiFi board
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binding
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Add binding for Samsung Galaxy Tab S 10.5", based on Exynos 5420 with
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codename chagall-wifi. It was released in 2014 and has several siblings
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with similar hardware.
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Signed-off-by: Henrik Grimler <henrik@grimler.se>
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---
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.../devicetree/bindings/arm/samsung/samsung-boards.yaml | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
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index ef6dc14be4b5..c385e6bfaed1 100644
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--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
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+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
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@@ -140,6 +140,7 @@ properties:
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items:
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- enum:
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- insignal,arndale-octa # Insignal Arndale Octa
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+ - samsung,chagall-wifi # Samsung SM-T800
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- samsung,smdk5420 # Samsung SMDK5420 eval
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- const: samsung,exynos5420
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- const: samsung,exynos5
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--
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2.34.1
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|
|
@ -1,62 +0,0 @@
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From dae39d461569897f3ae0aedde041dfb8cfcc4f96 Mon Sep 17 00:00:00 2001
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From: Henrik Grimler <henrik@grimler.se>
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Date: Mon, 18 Oct 2021 21:43:08 +0200
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Subject: [PATCH 11/16] ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4
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On Exynos5 the call is simply ignored by most variants of the
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trustzone firmware. However, on some devices it instead causes the
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device to hang, so let's avoid the call for the SoCs where it should
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not be needed.
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To see that the call is ignored, we can look into sboot/tzsw. On most
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of the Exynos{4,5} devices the part of sboot/tzsw that seem to handle
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the secure monitor calls is quite easy to recognise, the SMC number is
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compared to known ones, and if equal it branches to the relevant
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function. In assembly this looks something like:
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;-- handle_smc:
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0x00000514 650070e3 cmn r0, 0x65
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0x00000518 0a00000a beq loc.smc_cmd_reg
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0x0000051c 010070e3 cmn r0, 1
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0x00000520 6c00000a beq loc.smc_cmd_init
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0x00000524 020070e3 cmn r0, 2
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0x00000528 6b00000a beq loc.smc_cmd_info
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0x0000052c 030070e3 cmn r0, 3
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0x00000530 6e00000a beq loc.smc_cmd_sleep
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0x00000534 060070e3 cmn r0, 6
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0x00000538 ae00000a beq loc.smc_cmd_save_state
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0x0000053c 070070e3 cmn r0, 7
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0x00000540 b400000a beq loc.smc_cmd_standby
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0x00000544 2b01001a bne loc.smc_return_minus1
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where above example is from exynos5420-arndale-octa. As can be seen
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the case where r0 is 4 (i.e. SMC_CMD_CPU1BOOT) is not handled. The
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annotations are taken from github.com/hsnaves/exynos5410-firmware,
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where a large part of the exynos5410 trustzone firmware has been
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reverse-engineered.
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Signed-off-by: Henrik Grimler <henrik@grimler.se>
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Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
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---
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arch/arm/mach-exynos/firmware.c | 4 +++-
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1 file changed, 3 insertions(+), 1 deletion(-)
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diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
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index 2eaf2dbb8e81..2da5b60b59e2 100644
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--- a/arch/arm/mach-exynos/firmware.c
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+++ b/arch/arm/mach-exynos/firmware.c
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@@ -60,8 +60,10 @@ static int exynos_cpu_boot(int cpu)
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/*
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* Exynos3250 doesn't need to send smc command for secondary CPU boot
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* because Exynos3250 removes WFE in secure mode.
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+ *
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+ * On Exynos5 devices the call is ignored by trustzone firmware.
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*/
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- if (soc_is_exynos3250())
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+ if (!soc_is_exynos4210() && !soc_is_exynos4412())
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return 0;
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/*
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--
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2.34.1
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|
|
@ -1,826 +0,0 @@
|
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From 5464814ae6af0b7abbcce9a76f772fee7977d4f5 Mon Sep 17 00:00:00 2001
|
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From: Henrik Grimler <henrik@grimler.se>
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Date: Wed, 27 Jan 2021 16:04:46 +0100
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Subject: [PATCH 12/16] ARM: dts: Add support for Samsung Chagall WiFi
|
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|
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Chagall WiFi, with product name Samsung Galaxy Tab S 10.5", is based
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on Exynos 5420. This device is one of several tablet models released
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in 2014 based on Exynos 5420.
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The device tree added here contains support for:
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|
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- UART
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- eMMC
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- SD card
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- USB
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|
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CCI has been disabled in the hardware, enabling it would require
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(de-)soldering a resistor on the board. Trying to boot with it
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enabled in kernel makes the device hang when CCI is probed.
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Exynos5420-arndale-octa also has had CCI disabled due to issues, see
|
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commit 25217fef3551 ("ARM: dts: disable CCI on exynos5420 based
|
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arndale-octa").
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|
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Signed-off-by: Henrik Grimler <henrik@grimler.se>
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---
|
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arch/arm/boot/dts/Makefile | 1 +
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arch/arm/boot/dts/exynos5420-chagall-wifi.dts | 75 ++
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.../dts/exynos5420-galaxy-tab-common.dtsi | 692 ++++++++++++++++++
|
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3 files changed, 768 insertions(+)
|
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create mode 100644 arch/arm/boot/dts/exynos5420-chagall-wifi.dts
|
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create mode 100644 arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
|
||||
|
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diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
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index 0de64f237cd8..088fcedb3212 100644
|
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--- a/arch/arm/boot/dts/Makefile
|
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+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -220,6 +220,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
|
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exynos5420-arndale-octa.dtb \
|
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exynos5420-peach-pit.dtb \
|
||||
exynos5420-smdk5420.dtb \
|
||||
+ exynos5420-chagall-wifi.dtb \
|
||||
exynos5422-odroidhc1.dtb \
|
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exynos5422-odroidxu3.dtb \
|
||||
exynos5422-odroidxu3-lite.dtb \
|
||||
diff --git a/arch/arm/boot/dts/exynos5420-chagall-wifi.dts b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
|
||||
new file mode 100644
|
||||
index 000000000000..1319344a2c74
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
|
||||
@@ -0,0 +1,75 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Samsung's Exynos5420 Chagall WiFi board device tree source
|
||||
+ *
|
||||
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
|
||||
+ * http://www.samsung.com
|
||||
+ * Copyright (c) 2022 Henrik Grimler
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "exynos5420-galaxy-tab-common.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Samsung Chagall WiFi based on Exynos5420";
|
||||
+ compatible = "samsung,chagall-wifi", "samsung,exynos5420", \
|
||||
+ "samsung,exynos5";
|
||||
+};
|
||||
+
|
||||
+&ldo15_reg {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO15";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+};
|
||||
+
|
||||
+&ldo17_reg {
|
||||
+ regulator-name = "VDD_IRLED_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3350000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ldo28_reg {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO28";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+};
|
||||
+
|
||||
+&ldo29_reg {
|
||||
+ regulator-name = "VDD_TCON_1V8";
|
||||
+ regulator-min-microvolt = <1900000>;
|
||||
+ regulator-max-microvolt = <1900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ldo31_reg {
|
||||
+ regulator-name = "VDD_GRIP_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ldo32_reg {
|
||||
+ regulator-name = "VDD_TSP_1V8";
|
||||
+ regulator-min-microvolt = <1900000>;
|
||||
+ regulator-max-microvolt = <1900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
|
||||
new file mode 100644
|
||||
index 000000000000..b3f5a50ef6d5
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
|
||||
@@ -0,0 +1,692 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Base DT for Samsung's family of tablets based on Exynos5420.
|
||||
+ *
|
||||
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
|
||||
+ * http://www.samsung.com
|
||||
+ * Copyright (c) 2022 Henrik Grimler
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "exynos5420.dtsi"
|
||||
+#include "exynos5420-cpus.dtsi"
|
||||
+#include <dt-bindings/input/input.h>
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/clock/samsung,s2mps11.h>
|
||||
+
|
||||
+/ {
|
||||
+ chassis-type = "tablet";
|
||||
+
|
||||
+ /*
|
||||
+ * To successfully boot the mainline kernel with the stock
|
||||
+ * bootloader (SBOOT), the tlb needs to be flushed after the
|
||||
+ * page table pointer has been updated in __common_mmu_cache_on.
|
||||
+ * The same hack is also needed to boot exynos4412-i9300 with
|
||||
+ * stock bootloader, and probably other Samsung devices of
|
||||
+ * similar age. See
|
||||
+ * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
|
||||
+ * for more details.
|
||||
+ */
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial2:115200n8";
|
||||
+ };
|
||||
+
|
||||
+ memory@20000000 {
|
||||
+ device_type = "memory";
|
||||
+ reg = <0x20000000 0xc0000000>;
|
||||
+ };
|
||||
+
|
||||
+ firmware@2073000 {
|
||||
+ compatible = "samsung,secure-firmware";
|
||||
+ reg = <0x02073000 0x1000>;
|
||||
+ };
|
||||
+
|
||||
+ fixed-rate-clocks {
|
||||
+ oscclk {
|
||||
+ compatible = "samsung,exynos5420-oscclk";
|
||||
+ clock-frequency = <24000000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ gpio-keys {
|
||||
+ compatible = "gpio-keys";
|
||||
+ pinctrl-names = "default";
|
||||
+
|
||||
+ key-power {
|
||||
+ debounce-interval = <10>;
|
||||
+ gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
|
||||
+ label = "Power";
|
||||
+ linux,code = <KEY_POWER>;
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+
|
||||
+ key-home {
|
||||
+ debounce-interval = <10>;
|
||||
+ gpios = <&gpx0 5 GPIO_ACTIVE_LOW>;
|
||||
+ label = "Home";
|
||||
+ linux,code = <KEY_HOME>;
|
||||
+ wakeup-source;
|
||||
+ };
|
||||
+
|
||||
+ key-volume-up {
|
||||
+ debounce-interval = <10>;
|
||||
+ gpios = <&gpx0 2 GPIO_ACTIVE_LOW>;
|
||||
+ label = "Volume Up";
|
||||
+ linux,code = <KEY_VOLUMEUP>;
|
||||
+ };
|
||||
+
|
||||
+ key-volume-down {
|
||||
+ debounce-interval = <10>;
|
||||
+ gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
|
||||
+ label = "Volume Down";
|
||||
+ linux,code = <KEY_VOLUMEDOWN>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&cci {
|
||||
+ /* CCI is disabled in hardware */
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&buck2_reg>;
|
||||
+};
|
||||
+
|
||||
+&cpu4 {
|
||||
+ cpu-supply = <&buck6_reg>;
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ status = "okay";
|
||||
+ mali-supply = <&buck4_reg>;
|
||||
+};
|
||||
+
|
||||
+&hsi2c_7 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pmic@66 {
|
||||
+ compatible = "samsung,s2mps11-pmic";
|
||||
+ reg = <0x66>;
|
||||
+
|
||||
+ interrupt-parent = <&gpx3>;
|
||||
+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&s2mps11_irq>;
|
||||
+
|
||||
+ s2mps11_osc: clocks {
|
||||
+ compatible = "samsung,s2mps11-clk";
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-output-names = "s2mps11_ap", "s2mps11_cp",
|
||||
+ "s2mps11_bt";
|
||||
+ };
|
||||
+
|
||||
+ regulators {
|
||||
+ buck1_reg: BUCK1 {
|
||||
+ regulator-name = "VDD_MIF_1V1";
|
||||
+ regulator-min-microvolt = <700000>;
|
||||
+ regulator-max-microvolt = <1300000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ buck2_reg: BUCK2 {
|
||||
+ regulator-name = "VDD_ARM_1V0";
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ buck3_reg: BUCK3 {
|
||||
+ regulator-name = "VDD_INT_1V0";
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1400000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ buck4_reg: BUCK4 {
|
||||
+ regulator-name = "VDD_G3D_1V0";
|
||||
+ regulator-min-microvolt = <700000>;
|
||||
+ regulator-max-microvolt = <1400000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ buck5_reg: BUCK5 {
|
||||
+ regulator-name = "VDD_MEM_1V2";
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ buck6_reg: BUCK6 {
|
||||
+ regulator-name = "VDD_KFC_1V0";
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ buck7_reg: BUCK7 {
|
||||
+ regulator-name = "VIN_LLDO_1V4";
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1500000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ buck8_reg: BUCK8 {
|
||||
+ regulator-name = "VIN_MLDO_2V0";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <2100000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ buck9_reg: BUCK9 {
|
||||
+ regulator-name = "VIN_HLDO_3V5";
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3500000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ buck10_reg: BUCK10 {
|
||||
+ regulator-name = "VDD_CAM_ISP_1V0";
|
||||
+ regulator-min-microvolt = <750000>;
|
||||
+ regulator-max-microvolt = <3550000>;
|
||||
+ };
|
||||
+
|
||||
+ ldo1_reg: LDO1 {
|
||||
+ regulator-name = "VDD_ALIVE_1.0V";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ ldo2_reg: LDO2 {
|
||||
+ regulator-name = "VDD_APIO_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo3_reg: LDO3 {
|
||||
+ regulator-name = "VDD_APIO_MMC01_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo4_reg: LDO4 {
|
||||
+ regulator-name = "VDD_ADC_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo5_reg: LDO5 {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO5";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ ldo6_reg: LDO6 {
|
||||
+ regulator-name = "VDD_MIPI_1V0";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo7_reg: LDO7 {
|
||||
+ regulator-name = "VDD_MIPI_PLL_ABB1_18V";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo8_reg: LDO8 {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+ ldo9_reg: LDO9 {
|
||||
+ regulator-name = "VDD_UOTG_3V0";
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo10_reg: LDO10 {
|
||||
+ regulator-name = "VDDQ_PRE_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo11_reg: LDO11 {
|
||||
+ regulator-name = "VDD_HSIC_1V0";
|
||||
+ regulator-min-microvolt = <1000000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo12_reg: LDO12 {
|
||||
+ regulator-name = "VDD_HSIC_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo13_reg: LDO13 {
|
||||
+ regulator-name = "VDD_APIO_MMC2_2V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo14_reg: LDO14 {
|
||||
+ regulator-name = "VDD_MOTOR_3V0";
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3000000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo15_reg: LDO15 {
|
||||
+ regulator-name = "VDD_LDO15";
|
||||
+ /*
|
||||
+ * LDO15 varies between devices and is
|
||||
+ * specified in the device dts
|
||||
+ */
|
||||
+ };
|
||||
+
|
||||
+ ldo16_reg: LDO16 {
|
||||
+ regulator-name = "VDD_AP_2V8";
|
||||
+ regulator-min-microvolt = <2800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo17_reg: LDO17 {
|
||||
+ regulator-name = "VDD_LDO17";
|
||||
+ /*
|
||||
+ * LDO17 varies between devices and is
|
||||
+ * specified in the device dts
|
||||
+ */
|
||||
+ };
|
||||
+
|
||||
+ ldo18_reg: LDO18 {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO18";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ };
|
||||
+
|
||||
+
|
||||
+ ldo19_reg: LDO19 {
|
||||
+ regulator-name = "VDD_VTF_2V8";
|
||||
+ regulator-min-microvolt = <2800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo20_reg: LDO20 {
|
||||
+ regulator-name = "VDD_CAM1_CAM_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo21_reg: LDO21 {
|
||||
+ regulator-name = "VDD_CAM_IO_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo22_reg: LDO22 {
|
||||
+ regulator-name = "VDD_CAM0_S_CORE_1V1";
|
||||
+ regulator-min-microvolt = <1050000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo23_reg: LDO23 {
|
||||
+ regulator-name = "VDD_MIFS_1V1";
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1100000>;
|
||||
+ regulator-always-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo24_reg: LDO24 {
|
||||
+ regulator-name = "VDD_TSP_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo25_reg: LDO25 {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO25";
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <3950000>;
|
||||
+ };
|
||||
+
|
||||
+ ldo26_reg: LDO26 {
|
||||
+ regulator-name = "VDD_CAM0_AF_2V8";
|
||||
+ regulator-min-microvolt = <2800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo27_reg: LDO27 {
|
||||
+ regulator-name = "VDD_G3DS_1V0";
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <1000000>;
|
||||
+ regulator-always-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo28_reg: LDO28 {
|
||||
+ regulator-name = "VDD_LDO28";
|
||||
+ /*
|
||||
+ * LDO28 varies between devices and is
|
||||
+ * specified in the device dts
|
||||
+ */
|
||||
+ };
|
||||
+
|
||||
+ ldo29_reg: LDO29 {
|
||||
+ regulator-name = "VDD_LDO29";
|
||||
+ /*
|
||||
+ * LDO29 varies between devices and is
|
||||
+ * specified in the device dts
|
||||
+ */
|
||||
+ };
|
||||
+
|
||||
+ ldo30_reg: LDO30 {
|
||||
+ regulator-name = "VDD_TOUCH_1V8";
|
||||
+ regulator-min-microvolt = <1900000>;
|
||||
+ regulator-max-microvolt = <1900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo31_reg: LDO31 {
|
||||
+ regulator-name = "VDD_LDO31";
|
||||
+ /*
|
||||
+ * LDO31 varies between devices and is
|
||||
+ * specified in the device dts
|
||||
+ */
|
||||
+ };
|
||||
+
|
||||
+ ldo32_reg: LDO32 {
|
||||
+ regulator-name = "VDD_LDO32";
|
||||
+ /*
|
||||
+ * LDO32 varies between devices and is
|
||||
+ * specified in the device dts
|
||||
+ */
|
||||
+ };
|
||||
+
|
||||
+ ldo33_reg: LDO33 {
|
||||
+ regulator-name = "VDD_MHL_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo34_reg: LDO34 {
|
||||
+ regulator-name = "VDD_MHL_3V3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo35_reg: LDO35 {
|
||||
+ regulator-name = "VDD_SIL_1V2";
|
||||
+ regulator-min-microvolt = <1200000>;
|
||||
+ regulator-max-microvolt = <1200000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ldo36_reg: LDO36 {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO36";
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <3950000>;
|
||||
+ };
|
||||
+
|
||||
+ ldo37_reg: LDO37 {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO37";
|
||||
+ regulator-min-microvolt = <800000>;
|
||||
+ regulator-max-microvolt = <3950000>;
|
||||
+ };
|
||||
+
|
||||
+ ldo38_reg: LDO38 {
|
||||
+ regulator-name = "VDD_KEY_LED_3V3";
|
||||
+ regulator-min-microvolt = <2500000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mixer {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+/* Internal storage */
|
||||
+&mmc_0 {
|
||||
+ status = "okay";
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ card-detect-delay = <200>;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ non-removable;
|
||||
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
|
||||
+ pinctrl-names = "default";
|
||||
+ samsung,dw-mshc-ciu-div = <3>;
|
||||
+ samsung,dw-mshc-ddr-timing = <0 2>;
|
||||
+ samsung,dw-mshc-sdr-timing = <0 4>;
|
||||
+ vqmmc-supply = <&ldo3_reg>;
|
||||
+};
|
||||
+
|
||||
+/* External sdcard */
|
||||
+&mmc_2 {
|
||||
+ status = "okay";
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ card-detect-delay = <200>;
|
||||
+ cd-gpios = <&gpx2 4 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
|
||||
+ pinctrl-names = "default";
|
||||
+ samsung,dw-mshc-ciu-div = <3>;
|
||||
+ samsung,dw-mshc-ddr-timing = <0 2>;
|
||||
+ samsung,dw-mshc-sdr-timing = <0 4>;
|
||||
+ sd-uhs-sdr50;
|
||||
+ vmmc-supply = <&ldo19_reg>;
|
||||
+ vqmmc-supply = <&ldo13_reg>;
|
||||
+};
|
||||
+
|
||||
+&pinctrl_0 {
|
||||
+ mmc2_cd: mmc2-cd {
|
||||
+ samsung,pins = "gpx2-4";
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
+ };
|
||||
+
|
||||
+ s2mps11_irq: s2mps11-irq {
|
||||
+ samsung,pins = "gpx3-0";
|
||||
+ samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&rtc {
|
||||
+ status = "okay";
|
||||
+ clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
|
||||
+ clock-names = "rtc", "rtc_src";
|
||||
+};
|
||||
+
|
||||
+&tmu_cpu0 {
|
||||
+ vtmu-supply = <&ldo10_reg>;
|
||||
+};
|
||||
+
|
||||
+&tmu_cpu1 {
|
||||
+ vtmu-supply = <&ldo10_reg>;
|
||||
+};
|
||||
+
|
||||
+&tmu_cpu2 {
|
||||
+ vtmu-supply = <&ldo10_reg>;
|
||||
+};
|
||||
+
|
||||
+&tmu_cpu3 {
|
||||
+ vtmu-supply = <&ldo10_reg>;
|
||||
+};
|
||||
+
|
||||
+&tmu_gpu {
|
||||
+ vtmu-supply = <&ldo10_reg>;
|
||||
+};
|
||||
+
|
||||
+&usbdrd_dwc3_0 {
|
||||
+ dr_mode = "peripheral";
|
||||
+};
|
||||
+
|
||||
+&usbdrd_dwc3_1 {
|
||||
+ dr_mode = "peripheral";
|
||||
+};
|
||||
+
|
||||
+&usbdrd3_0 {
|
||||
+ vdd33-supply = <&ldo9_reg>;
|
||||
+ vdd10-supply = <&ldo11_reg>;
|
||||
+};
|
||||
+
|
||||
+&usbdrd3_1 {
|
||||
+ vdd33-supply = <&ldo9_reg>;
|
||||
+ vdd10-supply = <&ldo11_reg>;
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
|
@ -1,30 +0,0 @@
|
|||
From 451f21e36dac14479287d47790e976adea002c13 Mon Sep 17 00:00:00 2001
|
||||
From: Henrik Grimler <henrik@grimler.se>
|
||||
Date: Mon, 20 Dec 2021 11:51:05 +0100
|
||||
Subject: [PATCH 13/16] dt-bindings: arm: samsung: document Klimt WiFi board
|
||||
binding
|
||||
|
||||
Add binding for Galaxy Tab S 8.4", based on Exynos 5420 with codename
|
||||
klimt-wifi. The tablet has similar hardware to Chagall WiFi, but a
|
||||
smaller battery, smaller screen and another touchscreen controller.
|
||||
|
||||
Signed-off-by: Henrik Grimler <henrik@grimler.se>
|
||||
---
|
||||
.../devicetree/bindings/arm/samsung/samsung-boards.yaml | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
|
||||
index c385e6bfaed1..abac01def63c 100644
|
||||
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
|
||||
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
|
||||
@@ -141,6 +141,7 @@ properties:
|
||||
- enum:
|
||||
- insignal,arndale-octa # Insignal Arndale Octa
|
||||
- samsung,chagall-wifi # Samsung SM-T800
|
||||
+ - samsung,klimt-wifi # Samsung SM-T700
|
||||
- samsung,smdk5420 # Samsung SMDK5420 eval
|
||||
- const: samsung,exynos5420
|
||||
- const: samsung,exynos5
|
||||
--
|
||||
2.34.1
|
||||
|
|
@ -1,111 +0,0 @@
|
|||
From 2c8a691d2a52b047ab21aab3ba3764ba224210ed Mon Sep 17 00:00:00 2001
|
||||
From: Henrik Grimler <henrik@grimler.se>
|
||||
Date: Wed, 31 Mar 2021 21:45:11 +0200
|
||||
Subject: [PATCH 14/16] ARM: dts: Add support for Samsung Klimt WiFi
|
||||
|
||||
Klimt WiFi has the product name Samsung Galaxy Tab S 8.4". Board is
|
||||
based on Exynos 5420, and has similar hardware to Chagall WiFi.
|
||||
|
||||
Signed-off-by: Henrik Grimler <henrik@grimler.se>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 1 +
|
||||
arch/arm/boot/dts/exynos5420-klimt-wifi.dts | 75 +++++++++++++++++++++
|
||||
2 files changed, 76 insertions(+)
|
||||
create mode 100644 arch/arm/boot/dts/exynos5420-klimt-wifi.dts
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 088fcedb3212..336b725195d7 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -221,6 +221,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
|
||||
exynos5420-peach-pit.dtb \
|
||||
exynos5420-smdk5420.dtb \
|
||||
exynos5420-chagall-wifi.dtb \
|
||||
+ exynos5420-klimt-wifi.dtb \
|
||||
exynos5422-odroidhc1.dtb \
|
||||
exynos5422-odroidxu3.dtb \
|
||||
exynos5422-odroidxu3-lite.dtb \
|
||||
diff --git a/arch/arm/boot/dts/exynos5420-klimt-wifi.dts b/arch/arm/boot/dts/exynos5420-klimt-wifi.dts
|
||||
new file mode 100644
|
||||
index 000000000000..7c3ba5abd7bf
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/exynos5420-klimt-wifi.dts
|
||||
@@ -0,0 +1,75 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Samsung's Exynos5420 Klimt WiFi board device tree source
|
||||
+ *
|
||||
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
|
||||
+ * http://www.samsung.com
|
||||
+ * Copyright (c) 2022 Henrik Grimler
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
+#include "exynos5420-galaxy-tab-common.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Samsung Klimt WiFi based on Exynos5420";
|
||||
+ compatible = "samsung,klimt-wifi", "samsung,exynos5420", \
|
||||
+ "samsung,exynos5";
|
||||
+};
|
||||
+
|
||||
+&ldo15_reg {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO15";
|
||||
+ regulator-min-microvolt = <2800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+};
|
||||
+
|
||||
+&ldo17_reg {
|
||||
+ regulator-name = "VDD_VCI_3V0";
|
||||
+ regulator-min-microvolt = <3000000>;
|
||||
+ regulator-max-microvolt = <3000000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ldo28_reg {
|
||||
+ regulator-name = "VDD3_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ldo29_reg {
|
||||
+ regulator-name = "VDDR_1V6";
|
||||
+ regulator-min-microvolt = <1600000>;
|
||||
+ regulator-max-microvolt = <1600000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&ldo31_reg {
|
||||
+ /* Unused */
|
||||
+ regulator-name = "VDD_LDO31";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+};
|
||||
+
|
||||
+&ldo32_reg {
|
||||
+ regulator-name = "VDD_TSP_1V8";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mmc_2 {
|
||||
+ sd-uhs-sdr104;
|
||||
+};
|
||||
--
|
||||
2.34.1
|
||||
|
|
@ -26,25 +26,25 @@ index 3f8fbe414..96a5e1b24 100644
|
|||
};
|
||||
|
||||
usb3_vbus_reg: regulator-usb3 {
|
||||
@@ -635,6 +640,20 @@ ec_irq: ec-irq {
|
||||
@@ -635,6 +640,20 @@ ec_irq: ec-irq-pins {
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
};
|
||||
|
||||
+ mic_det_gpio: mic-det-gpio {
|
||||
+ mic_det_gpio: mic-det-gpio-pins {
|
||||
+ samsung,pins = "gpx2-0";
|
||||
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
+ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
+ };
|
||||
+
|
||||
+ hp_det_gpio: hp-det-gpio {
|
||||
+ hp_det_gpio: hp-det-gpio-pins {
|
||||
+ samsung,pins = "gpx2-2";
|
||||
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
|
||||
+ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
+ };
|
||||
+
|
||||
tps65090_irq: tps65090-irq {
|
||||
tps65090_irq: tps65090-irq-pins {
|
||||
samsung,pins = "gpx2-6";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
--
|
|
@ -26,25 +26,25 @@ index 42d1ba06d..081300138 100644
|
|||
|
||||
cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
@@ -835,6 +840,20 @@ ec_irq: ec-irq {
|
||||
@@ -835,6 +840,20 @@ ec_irq: ec-irq-pins {
|
||||
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
|
||||
};
|
||||
|
||||
+ mic_det_gpio: mic-det-gpio {
|
||||
+ mic_det_gpio: mic-det-gpio-pins {
|
||||
+ samsung,pins = "gpx1-7";
|
||||
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
|
||||
+ };
|
||||
+
|
||||
+ hp_det_gpio: hp-det-gpio {
|
||||
+ hp_det_gpio: hp-det-gpio-pins {
|
||||
+ samsung,pins = "gpx2-1";
|
||||
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
|
||||
+ };
|
||||
+
|
||||
tps65090_irq: tps65090-irq {
|
||||
tps65090_irq: tps65090-irq-pins {
|
||||
samsung,pins = "gpx2-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
--
|
|
@ -27,25 +27,25 @@ index e80e77a58..bedfaeff0 100644
|
|||
|
||||
cpu {
|
||||
sound-dai = <&i2s0 0>;
|
||||
@@ -812,6 +817,20 @@ ec_irq: ec-irq {
|
||||
@@ -812,6 +817,20 @@ ec_irq: ec-irq-pins {
|
||||
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
|
||||
};
|
||||
|
||||
+ mic_det_gpio: mic-det-gpio {
|
||||
+ mic_det_gpio: mic-det-gpio-pins {
|
||||
+ samsung,pins = "gpx1-7";
|
||||
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
|
||||
+ };
|
||||
+
|
||||
+ hp_det_gpio: hp-det-gpio {
|
||||
+ hp_det_gpio: hp-det-gpio-pins {
|
||||
+ samsung,pins = "gpx2-1";
|
||||
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
|
||||
+ };
|
||||
+
|
||||
tps65090_irq: tps65090-irq {
|
||||
tps65090_irq: tps65090-irq-pins {
|
||||
samsung,pins = "gpx2-5";
|
||||
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
|
||||
--
|
|
@ -0,0 +1,57 @@
|
|||
From 067c8e059f0b2dd7c9ee11b612b229e48c35d970 Mon Sep 17 00:00:00 2001
|
||||
From: Anton Bambura <jenneron@protonmail.com>
|
||||
Date: Fri, 29 Jul 2022 03:25:26 +0300
|
||||
Subject: [PATCH] ARM: dts: exynos: snow: add usb hub
|
||||
|
||||
This device has a USB Hub which camera and modem are connected to.
|
||||
Add support for it.
|
||||
|
||||
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
|
||||
---
|
||||
arch/arm/boot/dts/exynos5250-snow-common.dtsi | 23 +++++++++++++++++++
|
||||
1 file changed, 23 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
|
||||
index 96a5e1b24..404ad8d53 100644
|
||||
--- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
|
||||
+++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
|
||||
@@ -81,6 +81,22 @@ i2c_104: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
+ usb-hub@8 {
|
||||
+ compatible = "smsc,usb3503a";
|
||||
+ reg = <0x08>;
|
||||
+
|
||||
+ reset-gpios = <&gpe1 0 GPIO_ACTIVE_LOW>;
|
||||
+ disabled-ports = <3>;
|
||||
+ initial-mode = <1>;
|
||||
+
|
||||
+ clock-names = "refclk";
|
||||
+ clocks = <&pmu_system_controller 0>;
|
||||
+ refclk-frequency = <24000000>;
|
||||
+
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&usb_hub_reset>;
|
||||
+ };
|
||||
+
|
||||
battery: sbs-battery@b {
|
||||
compatible = "sbs,sbs-battery";
|
||||
reg = <0xb>;
|
||||
@@ -704,6 +720,13 @@ arb_our_claim: arb-our-claim-pins {
|
||||
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
};
|
||||
+
|
||||
+ usb_hub_reset: usb-hub-reset-pins {
|
||||
+ samsung,pins = "gpe1-0";
|
||||
+ samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
|
||||
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
|
||||
+ samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
|
||||
+ };
|
||||
};
|
||||
|
||||
&pmu_system_controller {
|
||||
--
|
||||
2.36.1
|
||||
|
|
@ -7,14 +7,16 @@ Passing V4L2_MEMORY_FLAG_NON_COHERENT from userspace significantly
|
|||
improves video rendering performance on Exynos 5422 (Odroid XU4).
|
||||
|
||||
Signed-off-by: Pavel Golikov <Paullo612@ya.ru>
|
||||
[jenneron@protonmail.com: rebase]
|
||||
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
|
||||
---
|
||||
drivers/media/platform/s5p-mfc/s5p_mfc.c | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c
|
||||
diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c
|
||||
index f6732f031e96..bbfae7b00961 100644
|
||||
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
|
||||
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
|
||||
--- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c
|
||||
+++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c
|
||||
@@ -861,6 +861,7 @@ static int s5p_mfc_open(struct file *file)
|
||||
q->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES;
|
||||
q->mem_ops = &vb2_dma_contig_memops;
|
|
@ -1,75 +0,0 @@
|
|||
With this patch panfrost is able to drive T628 (r1p0) GPU on some
|
||||
armv8 SoCs (in particular BE-M1000). Without the patch rendering
|
||||
is horribly broken (desktop is completely unusable) and eventually
|
||||
the GPU locks up (it takes from a few seconds to a couple of
|
||||
minutes).
|
||||
|
||||
Using the second core group requires support in Mesa (and an UABI
|
||||
change): the userspace should
|
||||
|
||||
1) set PANFROST_JD_DOESNT_NEED_COHERENCY_ON_GPU flag to opt-in
|
||||
to allowing the job to run across all cores.
|
||||
2) set PANFROST_RUN_ON_SECOND_CORE_GROUP flag to allow compute
|
||||
jobs to be run on the second core group (at the moment Mesa
|
||||
does not advertise compute support on anything older than
|
||||
Mali T760)
|
||||
|
||||
But there's little point adding such flags until someone (myself)
|
||||
steps up to do the Mesa work.
|
||||
|
||||
Signed-off-by: Alexey Sheplyakov <asheplyakov@basealt.ru>
|
||||
Signed-off-by: Vadim V. Vlasov <vadim.vlasov@elpitech.ru>
|
||||
Tested-by: Alexey Sheplyakov <asheplyakov@basealt.ru>
|
||||
Co-developed-by: Steven Price <steven.price@arm.com>
|
||||
Signed-off-by: Steven Price <steven.price@arm.com>
|
||||
Link: https://patchwork.freedesktop.org/patch/msgid/20220115160658.582646-1-asheplyakov@basealt.ru
|
||||
---
|
||||
drivers/gpu/drm/panfrost/panfrost_gpu.c | 27 ++++++++++++++++++++-----
|
||||
1 file changed, 22 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
index f8355de6e335..15cec831a99a 100644
|
||||
--- a/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c
|
||||
@@ -320,19 +320,36 @@ void panfrost_gpu_power_on(struct panfrost_device *pfdev)
|
||||
{
|
||||
int ret;
|
||||
u32 val;
|
||||
+ u64 core_mask = U64_MAX;
|
||||
|
||||
panfrost_gpu_init_quirks(pfdev);
|
||||
|
||||
- /* Just turn on everything for now */
|
||||
- gpu_write(pfdev, L2_PWRON_LO, pfdev->features.l2_present);
|
||||
+ if (pfdev->features.l2_present != 1) {
|
||||
+ /*
|
||||
+ * Only support one core group now.
|
||||
+ * ~(l2_present - 1) unsets all bits in l2_present except
|
||||
+ * the bottom bit. (l2_present - 2) has all the bits in
|
||||
+ * the first core group set. AND them together to generate
|
||||
+ * a mask of cores in the first core group.
|
||||
+ */
|
||||
+ core_mask = ~(pfdev->features.l2_present - 1) &
|
||||
+ (pfdev->features.l2_present - 2);
|
||||
+ dev_info_once(pfdev->dev, "using only 1st core group (%lu cores from %lu)\n",
|
||||
+ hweight64(core_mask),
|
||||
+ hweight64(pfdev->features.shader_present));
|
||||
+ }
|
||||
+ gpu_write(pfdev, L2_PWRON_LO, pfdev->features.l2_present & core_mask);
|
||||
ret = readl_relaxed_poll_timeout(pfdev->iomem + L2_READY_LO,
|
||||
- val, val == pfdev->features.l2_present, 100, 20000);
|
||||
+ val, val == (pfdev->features.l2_present & core_mask),
|
||||
+ 100, 20000);
|
||||
if (ret)
|
||||
dev_err(pfdev->dev, "error powering up gpu L2");
|
||||
|
||||
- gpu_write(pfdev, SHADER_PWRON_LO, pfdev->features.shader_present);
|
||||
+ gpu_write(pfdev, SHADER_PWRON_LO,
|
||||
+ pfdev->features.shader_present & core_mask);
|
||||
ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO,
|
||||
- val, val == pfdev->features.shader_present, 100, 20000);
|
||||
+ val, val == (pfdev->features.shader_present & core_mask),
|
||||
+ 100, 20000);
|
||||
if (ret)
|
||||
dev_err(pfdev->dev, "error powering up gpu shader");
|
||||
|
|
@ -1,10 +1,11 @@
|
|||
# Maintainer: Henrik Grimler <henrik@grimler.se>
|
||||
# Co-Maintainer: Jenneron <jenneron@protonmail.com>
|
||||
# Kernel config based on: arch/arm/configs/exynos_defconfig
|
||||
# and Hardkernel's odroidxu4_defconfig
|
||||
|
||||
pkgname=linux-postmarketos-exynos5
|
||||
pkgver=5.16.1
|
||||
pkgrel=4
|
||||
pkgver=5.18.5
|
||||
pkgrel=0
|
||||
pkgdesc="Mainline kernel fork for Samsung Exynos5 devices"
|
||||
arch="armv7"
|
||||
_carch="arm"
|
||||
|
@ -17,6 +18,7 @@ options="!strip !check !tracedeps
|
|||
pmb:kconfigcheck-nftables
|
||||
"
|
||||
makedepends="
|
||||
bash
|
||||
bison
|
||||
findutils
|
||||
flex
|
||||
|
@ -47,35 +49,30 @@ source="
|
|||
0007-ODROID-COMMON-phy-realtek-add-Wake-on-Lan-to-Realtek.patch
|
||||
0008-ARM-exynos-add-machine-description-for-ODROID-XU3-4.patch
|
||||
0009-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
|
||||
0010-dt-bindings-arm-samsung-document-Chagall-WiFi-board-.patch
|
||||
0011-ARM-exynos-only-do-SMC_CMD_CPU1BOOT-call-on-Exynos4.patch
|
||||
0012-ARM-dts-Add-support-for-Samsung-Chagall-WiFi.patch
|
||||
0013-dt-bindings-arm-samsung-document-Klimt-WiFi-board-bi.patch
|
||||
0014-ARM-dts-Add-support-for-Samsung-Klimt-WiFi.patch
|
||||
0015-dt-bindings-arm-samsung-document-Klimt-LTE-board-bin.patch
|
||||
0016-ARM-dts-Add-support-for-Samsung-Klimt-LTE.patch
|
||||
0017-ARM-dts-exynos-snow-add-mmc-aliases.patch
|
||||
0018-ARM-dts-exynos-snow-use-num-interpolated-steps-for-b.patch
|
||||
0019-ARM-dts-exynos-snow-add-atmel-mxt-touchpad.patch
|
||||
0020-ARM-dts-exynos-peach-pit-add-mmc-aliases.patch
|
||||
0021-ARM-dts-exynos-peach-pit-use-num-interpolated-steps-.patch
|
||||
0022-ARM-dts-exynos-peach-pit-enable-GPU.patch
|
||||
0023-HACK-ARM-dts-exynos-snow-disable-HDMI-audio.patch
|
||||
0024-HACK-ARM-dts-exynos-peach-pit-disable-HDMI-audio.patch
|
||||
0025-WIP-ASoC-samsung-snow-add-jack-detection-support.patch
|
||||
0026-ARM-dts-exynos-snow-add-jack-detection.patch
|
||||
0027-ARM-dts-exynos-peach-pit-add-jack-detection.patch
|
||||
0028-ARM-dts-exynos-peach-pi-add-mmc-aliases.patch
|
||||
0029-ARM-dts-exynos-peach-pi-use-num-interpolated-steps-f.patch
|
||||
0030-HACK-ARM-dts-exynos-peach-pi-disable-HDMI-audio.patch
|
||||
0031-ARM-dts-exynos-peach-pi-add-jack-detection.patch
|
||||
0032-v2-drm-panfrost-initial-dual-core-group-GPUs-support.patch
|
||||
0033-drm-set-DRM_RENDER_ALLOW-flag-on.patch
|
||||
0034-ARM-dma-mapping-implement-alloc_noncontiguous.patch
|
||||
0035-iommu-io-pgtable-arm-Fix-coherency-support-for-Mali-.patch
|
||||
0036-media-s5p-mfc-Allow-cache-hints-for-queues.patch
|
||||
0037-soc-samsung-pm_domains-Bring-back-old-driver-impleme.patch
|
||||
0038-ARM-dts-exynos-peach-pi-enable-GPU.patch
|
||||
0010-ASoC-samsung-snow-add-jack-detection.patch
|
||||
0011-ARM-dts-exynos-snow-add-mmc-aliases.patch
|
||||
0012-ARM-dts-exynos-peach-pit-add-mmc-aliases.patch
|
||||
0013-ARM-dts-exynos-peach-pi-add-mmc-aliases.patch
|
||||
0014-ARM-dts-exynos-snow-use-num-interpolated-steps-for-b.patch
|
||||
0015-ARM-dts-exynos-peach-pit-use-num-interpolated-steps-.patch
|
||||
0016-ARM-dts-exynos-peach-pi-use-num-interpolated-steps-f.patch
|
||||
0017-ARM-dts-exynos-peach-pit-enable-GPU.patch
|
||||
0018-ARM-dts-exynos-peach-pi-enable-GPU.patch
|
||||
0019-HACK-ARM-dts-exynos-snow-disable-HDMI-audio.patch
|
||||
0020-HACK-ARM-dts-exynos-peach-pit-disable-HDMI-audio.patch
|
||||
0021-HACK-ARM-dts-exynos-peach-pi-disable-HDMI-audio.patch
|
||||
0022-ARM-dts-exynos-snow-add-atmel-mxt-touchpad.patch
|
||||
0023-ARM-dts-exynos-snow-add-jack-detection.patch
|
||||
0024-ARM-dts-exynos-peach-pit-add-jack-detection.patch
|
||||
0025-ARM-dts-exynos-peach-pi-add-jack-detection.patch
|
||||
0026-ARM-dts-exynos-snow-add-usb-hub.patch
|
||||
0027-drm-set-DRM_RENDER_ALLOW-flag-on.patch
|
||||
0028-ARM-dma-mapping-implement-alloc_noncontiguous.patch
|
||||
0029-iommu-io-pgtable-arm-Fix-coherency-support-for-Mali-.patch
|
||||
0030-media-s5p-mfc-Allow-cache-hints-for-queues.patch
|
||||
0031-soc-samsung-pm_domains-Bring-back-old-driver-impleme.patch
|
||||
0032-dt-bindings-arm-samsung-document-Klimt-LTE-board-bin.patch
|
||||
0033-ARM-dts-Add-support-for-Samsung-Klimt-LTE.patch
|
||||
"
|
||||
builddir="$srcdir/linux-${_kernver//_/-}"
|
||||
|
||||
|
@ -105,8 +102,8 @@ package() {
|
|||
}
|
||||
|
||||
sha512sums="
|
||||
f47cf92065c7445518452052566251642f701089494c8b5eb7d5b0e147d7177b016957481e0b98050840d79e2b838cfb088aeee1941fd41b75b681972f2fec5d linux-5.16.1.tar.xz
|
||||
f42997c126572ddda012111fdfe4426daf0c8ae22124bdfc28ff604d65aeb04b041c423653e4209c5b8cabf0adced16274318cfa665a736905aaff2b0fb3c626 config-postmarketos-exynos5.armv7
|
||||
1872e2cf8cdd6e0033ce69f26f25526a30c237d220c02b20829fca31d6068fb816de2f2e5fd41f6807648cef8f28ddda392b199c7b1c3b48b2460c840fa1e150 linux-5.18.5.tar.xz
|
||||
37f08d599ee57084e606e42774208a593954dd5a7fbacad1047ac72a962bbe5249e77b93823fdd9bb5c7923d3ebd79e3c728aa7a24323396102e3e9ce9d154af config-postmarketos-exynos5.armv7
|
||||
8818dee159da213314d21affb33873217a9c281b01598776c46bc26fcde790675e157fc5c604ec432f22d2ee780e703e8590f268a57e54fd0f74fe6d4ad6f315 0001-ODROID-COMMON-gpu-drm-Add-Hardkernel-3.2-LCD-driver-.patch
|
||||
1e460183a1e34f25ff615f8e1ead274dc224fb2b337924a799fca3807d382870dbcfc3418f0ff203ce6533fe416e56541a0f93a2e4ff6bc072ae2fbb7245de39 0002-ODROID-COMMON-gpu-drm-Add-new-Tiny-DRM-driver-with-I.patch
|
||||
7f4771e6fc701223f5e693e694385daede79e854231c94054179520f5f6b0e21d668554082143ae28048e4a6c2cdfc0608db46d9938a02cde1d9d3a9628be60a 0003-ODROID-COMMON-hwmon-pwm-fan-fix-to-add-pwm1_enable-t.patch
|
||||
|
@ -116,33 +113,28 @@ e540e3be0d0d45135f394f07bf8c9769654bf4c7d79a4558593ade87e02c21ab5cf66c3ff6672dab
|
|||
622f1f90ecc63a3cac32e8dafcfbe265a175031307af0a99088301bb2631bb55f6e6194e889f453d6f06239a5217e52c1b4ee9905570a06e975ce7aa1bb35434 0007-ODROID-COMMON-phy-realtek-add-Wake-on-Lan-to-Realtek.patch
|
||||
36b00ee94045b8dce002f55b91e0970dde59f9fa75ec4df7043930532991bfb59a0504256b056cd3f801bab05f5c23b2765e55c6ffbafe706a3e62bcd1ff71b9 0008-ARM-exynos-add-machine-description-for-ODROID-XU3-4.patch
|
||||
f031b887181d645075c7e4b2d93d60f0b0932e256f6b292850bab4b7480b4289f4a89f43f7e4a6d951eb0c7cd1a5cafff119c433573bb188a9960bab0685d189 0009-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
|
||||
b0595d89a559c14e016f0ef65f526240ab2a85a0397fed1b9a304aca2d7a946496891aad33dcd0fae77fc9d4f33baba58503595f97132af90efdaf9de8d78e4c 0010-dt-bindings-arm-samsung-document-Chagall-WiFi-board-.patch
|
||||
8d8be7677e67c41a3eafbf5fff13edeb6be88056a45ab55347544ab883fd3e50d15e77a929f53bd2a1917c9d51cec3d5a78205b3fade0d682081bb5e0317ee81 0011-ARM-exynos-only-do-SMC_CMD_CPU1BOOT-call-on-Exynos4.patch
|
||||
d552e78c7a7c029274766200dba88a9af3b22e60f393e1fcd345a527de26c203222308ecce0b212ea8f55a5287737b6ee8730c69680d585f8ce4b45faebf3d20 0012-ARM-dts-Add-support-for-Samsung-Chagall-WiFi.patch
|
||||
024b32657af97fce4dc6c524972c9f0e247a7b897f3842d60e9c91a4eb90d41a1c4019e6a5a188f535c3857d6d5b629d7b1f48fc71a445e17a5fb1be77bd48f9 0013-dt-bindings-arm-samsung-document-Klimt-WiFi-board-bi.patch
|
||||
36a175f5c6775e5b03a521ac8c57b1dafb565de78bbe46d4a77141f362eeb76f5872b6cb380401f2987c6dd480affbc08954ec9b9adfb4ea21ef0d670f3e858f 0014-ARM-dts-Add-support-for-Samsung-Klimt-WiFi.patch
|
||||
a0d5bf1292155da056b07a2384885ca11a4602e1ade3f0672c92e537cce6f5bd631ef1e0389418f5259468f637577ed1335293cb70764e5de23ad134a0725752 0015-dt-bindings-arm-samsung-document-Klimt-LTE-board-bin.patch
|
||||
70111f8591a1a566473dbb04a4dcfded110789196922d166719604afcfc6c6d5d5fd66d75c1e020be055c86c2c7b3deac59a13f593d37620027fc75bcfaad7af 0016-ARM-dts-Add-support-for-Samsung-Klimt-LTE.patch
|
||||
d937ff84674771fde27299fd00612c31dbd4c8410b43501fdf1dea9ce9fc5b029060203752cd0f03292093cca7456ea7f6dc81bcde5c895b79db7d03b278d1a3 0017-ARM-dts-exynos-snow-add-mmc-aliases.patch
|
||||
d780bb6a90ca7a473b56f9a45b18318ffa5611b8a81b7e489e20680800bd8b481875bff0a05b2a6c3243bf6efb3ffc0329c248a3cb98ceda0f1f4f9cffbf4ae9 0018-ARM-dts-exynos-snow-use-num-interpolated-steps-for-b.patch
|
||||
3bab175626a6a58b7f7254bb4fe0297d39e3891bf50c861fc0a689c00ffa60848a4ffe61df13276904b2fd95d79d5b2b58619d292c26b93daf3a4ea7eb3fab46 0019-ARM-dts-exynos-snow-add-atmel-mxt-touchpad.patch
|
||||
b8d81a436984e8ac820a78c24d800485f845a58c6d3d291a89656b78c00ff4f123006adf0dc66c086e6ac7d0e76193f2f59e8f0972aebbc4ae93b676d671b73f 0020-ARM-dts-exynos-peach-pit-add-mmc-aliases.patch
|
||||
2a7c222c217ddf468ea3ab39cbd943e80d8e0c806778063dff5c18af9465828b8a3557433344c9b3580089ac4db248c433f1b8aa2d7ef181b6d1e13054baa7bf 0021-ARM-dts-exynos-peach-pit-use-num-interpolated-steps-.patch
|
||||
3631ef02553ae0085bc079cc667e89b3fbd30763ea8d0d2c9c8bf5bddc20a841fea3ee55c8023d24a702f84babee209ab67d2e162e9a8f25541133d695fed1e0 0022-ARM-dts-exynos-peach-pit-enable-GPU.patch
|
||||
5cbcbec6cde266d9c73dd8f558f4e4fd41b4229cafdddcd139bd24c95b6f14f2adc06f7ff716bcb189ef0f7ea420bdf7298508fb8629feee561f27e24283b405 0023-HACK-ARM-dts-exynos-snow-disable-HDMI-audio.patch
|
||||
3641e949e139b62f4c090566562ae1b1013b85add4f0eb960e4f9a2c00053bde80a22f89717103a8a1e59db48fa651eeb787a21bcc8988676b9c83bdb359ba1e 0024-HACK-ARM-dts-exynos-peach-pit-disable-HDMI-audio.patch
|
||||
7e4de24b46abd9b54297592090e8e0f3559563ff48dfa764f937b63982ed338596b891e0a4a546fe8fae5e06992ac62f15b394b52a16d58280d341f0b7ddc5d8 0025-WIP-ASoC-samsung-snow-add-jack-detection-support.patch
|
||||
cd6eca38325363eb3dae5adb973624288dce5c6e4c90b14203090fdaec1aa0721384f9bfa7eb5051f5efdc988999ed0acfee23b1d11e5cd91d90a5c227ca5c71 0026-ARM-dts-exynos-snow-add-jack-detection.patch
|
||||
8dc11bdb132846bbf59ddd5e2a6e02b3910db5b8cfc58dc4715121afd321427d087537d0640e6ecbd70c36bd4977756e17f0b14b83a480d48622e26a35132d0c 0027-ARM-dts-exynos-peach-pit-add-jack-detection.patch
|
||||
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|
||||
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|
||||
5e0bc7073adcd5b89e2475cb9387f994bea335eb89a255090890a8b85612085d317779b551044c6cfc5bf6779e624ce01e0d1074f2126a6bcff0570f6916a782 0030-HACK-ARM-dts-exynos-peach-pi-disable-HDMI-audio.patch
|
||||
75223ced245df537b6a0356641956e3eec79fafc48ebad961d8188e23dc730d1ccf534442630804361d26560c7f58da950c38ce04292fe72fd5329c6a858a4bd 0031-ARM-dts-exynos-peach-pi-add-jack-detection.patch
|
||||
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|
||||
e7f08c665bdd4f686b60ea953242aa1f7580d7fafaec9e4c0cad008c6613a91d9682d64f24570a2a0cc00aca5589698173237fde713246385384738a1fe57bdf 0033-drm-set-DRM_RENDER_ALLOW-flag-on.patch
|
||||
4aa6d1d3e5aaab53a84ba6860acaeb365bafb5ff2b4effe99dd2c2d79df9809f9e930a926a640d36c846a36dc67f09f0edf4e37f9407877884fea4e27fc0d3a2 0034-ARM-dma-mapping-implement-alloc_noncontiguous.patch
|
||||
295e38324a801ed27223daff5d4764520ef06d959dea8eb5c332ed4842caab0d9024c4dc8a49fe2ee2e9d06ad1a14a24daad95388e04e115dda36abcf11a5d63 0035-iommu-io-pgtable-arm-Fix-coherency-support-for-Mali-.patch
|
||||
50edca62096a199b4556c2eb40aa2d3351d2465af5aa927e1f4d7836b261770f54395d54df9a537d1b93de84f00c1c6597f654ffeb2297efb2456343660c3301 0036-media-s5p-mfc-Allow-cache-hints-for-queues.patch
|
||||
855397c5dc6b090efe29079d5bfafdf9be44382bade020113d7d80fabc414f1ce7e8a51889ac5f7f269ef9d5f6541a3615e97386577eadc8fc9dc8fe323d5b0e 0037-soc-samsung-pm_domains-Bring-back-old-driver-impleme.patch
|
||||
5cd16bb932632e20cf952af15a448aebaa8466fa6d7b12c14904b042fa95cb789b6f0c49513608426392e91054c73b71fcffa3a12d0c9fda21259a5dae435a04 0038-ARM-dts-exynos-peach-pi-enable-GPU.patch
|
||||
f3b6e1dc79c8c28cc3afca7610761e8cb65525155ceaf9e8ba8b6f883512261190ac5b0860d6bf70cab95a37bd9e571d9080bee1d7c772a16afbddf4423635ff 0010-ASoC-samsung-snow-add-jack-detection.patch
|
||||
d937ff84674771fde27299fd00612c31dbd4c8410b43501fdf1dea9ce9fc5b029060203752cd0f03292093cca7456ea7f6dc81bcde5c895b79db7d03b278d1a3 0011-ARM-dts-exynos-snow-add-mmc-aliases.patch
|
||||
b8d81a436984e8ac820a78c24d800485f845a58c6d3d291a89656b78c00ff4f123006adf0dc66c086e6ac7d0e76193f2f59e8f0972aebbc4ae93b676d671b73f 0012-ARM-dts-exynos-peach-pit-add-mmc-aliases.patch
|
||||
a3a6cfec604951daab4017a222db9b873805ce94517a1e5a599a091b9d5832ec1948a113bbd655cac6b1a4280aaf13dc0901ccce770b38cc28775a5b886110d4 0013-ARM-dts-exynos-peach-pi-add-mmc-aliases.patch
|
||||
d780bb6a90ca7a473b56f9a45b18318ffa5611b8a81b7e489e20680800bd8b481875bff0a05b2a6c3243bf6efb3ffc0329c248a3cb98ceda0f1f4f9cffbf4ae9 0014-ARM-dts-exynos-snow-use-num-interpolated-steps-for-b.patch
|
||||
2a7c222c217ddf468ea3ab39cbd943e80d8e0c806778063dff5c18af9465828b8a3557433344c9b3580089ac4db248c433f1b8aa2d7ef181b6d1e13054baa7bf 0015-ARM-dts-exynos-peach-pit-use-num-interpolated-steps-.patch
|
||||
1d29e33d5f3fc192822bb5bf43e8102963ed316c3846f6681e7698ccb85c65a6e8461bd246f61604d1f794c56171ee206b62ab0fea1b5e7c6dd0fbf49d6fb77a 0016-ARM-dts-exynos-peach-pi-use-num-interpolated-steps-f.patch
|
||||
3631ef02553ae0085bc079cc667e89b3fbd30763ea8d0d2c9c8bf5bddc20a841fea3ee55c8023d24a702f84babee209ab67d2e162e9a8f25541133d695fed1e0 0017-ARM-dts-exynos-peach-pit-enable-GPU.patch
|
||||
5cd16bb932632e20cf952af15a448aebaa8466fa6d7b12c14904b042fa95cb789b6f0c49513608426392e91054c73b71fcffa3a12d0c9fda21259a5dae435a04 0018-ARM-dts-exynos-peach-pi-enable-GPU.patch
|
||||
5cbcbec6cde266d9c73dd8f558f4e4fd41b4229cafdddcd139bd24c95b6f14f2adc06f7ff716bcb189ef0f7ea420bdf7298508fb8629feee561f27e24283b405 0019-HACK-ARM-dts-exynos-snow-disable-HDMI-audio.patch
|
||||
3641e949e139b62f4c090566562ae1b1013b85add4f0eb960e4f9a2c00053bde80a22f89717103a8a1e59db48fa651eeb787a21bcc8988676b9c83bdb359ba1e 0020-HACK-ARM-dts-exynos-peach-pit-disable-HDMI-audio.patch
|
||||
5e0bc7073adcd5b89e2475cb9387f994bea335eb89a255090890a8b85612085d317779b551044c6cfc5bf6779e624ce01e0d1074f2126a6bcff0570f6916a782 0021-HACK-ARM-dts-exynos-peach-pi-disable-HDMI-audio.patch
|
||||
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|
||||
5610b50f6917db153b201a1c9f3a0d58a7642167513047283f7331479046e5a98e8c16e70c97d28677bda3a860c616b8f0840d02f13bf0d7d5faee126faa1528 0023-ARM-dts-exynos-snow-add-jack-detection.patch
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"
|
||||
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|
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Reference in a new issue