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temp/arm-trusted-firmware: upgrade to 2.6 (MR 2865)

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Bart Ribbers 2022-01-20 08:34:15 +01:00 committed by Alexey Min
parent 8aa04780b2
commit 1334ccf7d1
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GPG key ID: 0B19D2A65870B448
9 changed files with 19 additions and 369 deletions
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33
temp/arm-trusted-firmware/0001-bl_common-Import-BL_NOBITS_-BASE-END-when-defined.patch
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@ -1,33 +0,0 @@
From 6cb17b16dfd06e1ff17a097f743905ae507ceb20 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 13 Dec 2020 20:42:22 -0600
Subject: [PATCH 1/8] bl_common: Import BL_NOBITS_{BASE,END} when defined
If SEPARATE_NOBITS_REGION is enabled, the platform may need to map
memory specifically for that region. Import the symbols from the linker
script to allow the platform to do so.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Iaec4dee94a6735b22f58f7b61f18d53e7bc6ca8d
---
include/common/bl_common.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/common/bl_common.h b/include/common/bl_common.h
index 77fb1f679..e33840c9d 100644
--- a/include/common/bl_common.h
+++ b/include/common/bl_common.h
@@ -106,6 +106,10 @@ IMPORT_SYM(uintptr_t, __RODATA_END__, BL_RO_DATA_END);
IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE);
IMPORT_SYM(uintptr_t, __RO_END__, BL_CODE_END);
#endif
+#if SEPARATE_NOBITS_REGION
+IMPORT_SYM(uintptr_t, __NOBITS_START__, BL_NOBITS_BASE);
+IMPORT_SYM(uintptr_t, __NOBITS_END__, BL_NOBITS_END);
+#endif
IMPORT_SYM(uintptr_t, __RW_END__, BL_END);
#if defined(IMAGE_BL1)
--
2.31.1

67
temp/arm-trusted-firmware/0002-allwinner-Rename-static-mmap-region-constant.patch
View file

@ -1,67 +0,0 @@
From c6219d9997a6cf474ca45f53bc49c6436f2861d5 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 13 Dec 2020 21:26:36 -0600
Subject: [PATCH 2/8] allwinner: Rename static mmap region constant
This constant specifically refers to the number of static mmap regions.
Rename it to make that clear.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I475c037777ce2a10db2631ec0e7446bb73590a36
---
plat/allwinner/common/include/platform_def.h | 6 +++---
plat/allwinner/common/sunxi_common.c | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h
index 4893368c2..fa0c0abfa 100644
--- a/plat/allwinner/common/include/platform_def.h
+++ b/plat/allwinner/common/include/platform_def.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -52,7 +52,8 @@
#define CACHE_WRITEBACK_SHIFT 6
#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT)
-#define MAX_MMAP_REGIONS (3 + PLATFORM_MMAP_REGIONS)
+#define MAX_STATIC_MMAP_REGIONS 5
+#define MAX_MMAP_REGIONS (3 + MAX_STATIC_MMAP_REGIONS)
#define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \
(SUNXI_SRAM_A2_BASE + SUNXI_SRAM_A2_SIZE - 0x200)
@@ -72,7 +73,6 @@
#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER_COUNT * \
PLATFORM_MAX_CPUS_PER_CLUSTER)
#define PLATFORM_MAX_CPUS_PER_CLUSTER U(4)
-#define PLATFORM_MMAP_REGIONS 5
#define PLATFORM_STACK_SIZE (0x1000 / PLATFORM_CORE_COUNT)
#ifndef SPD_none
diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c
index d47d3605b..9d1b3c1ea 100644
--- a/plat/allwinner/common/sunxi_common.c
+++ b/plat/allwinner/common/sunxi_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -14,7 +14,7 @@
#include <sunxi_mmap.h>
#include <sunxi_private.h>
-static const mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = {
+static const mmap_region_t sunxi_mmap[MAX_STATIC_MMAP_REGIONS + 1] = {
MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE,
MT_RW_DATA | MT_SECURE),
#ifdef SUNXI_SCP_BASE
--
2.31.1

107
temp/arm-trusted-firmware/0003-allwinner-Map-SRAM-as-device-memory-by-default.patch
View file

@ -1,107 +0,0 @@
From 6db436c8bb62053a23e41a50216bde87ebba1872 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 13 Dec 2020 20:45:49 -0600
Subject: [PATCH 3/8] allwinner: Map SRAM as device memory by default
The SRAM on Allwinner platforms is shared between BL31 and coprocessor
firmware. Previously, SRAM was mapped as normal memory by default.
This scheme requires carveouts and cache maintenance code for proper
synchronization with the coprocessor.
A better scheme is to only map pages owned by BL31 as normal memory,
and leave everything else as device memory. This removes the need for
cache maintenance, and it makes the mapping for BL31 RW data explicit
instead of magic.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I820ddeba2dfa2396361c2322308c0db51b55c348
---
plat/allwinner/common/include/platform_def.h | 4 ++--
plat/allwinner/common/sunxi_common.c | 16 ++++++++++++----
plat/allwinner/common/sunxi_scpi_pm.c | 1 -
plat/allwinner/sun50i_a64/sunxi_power.c | 1 -
4 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h
index fa0c0abfa..e6ca6010f 100644
--- a/plat/allwinner/common/include/platform_def.h
+++ b/plat/allwinner/common/include/platform_def.h
@@ -52,8 +52,8 @@
#define CACHE_WRITEBACK_SHIFT 6
#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT)
-#define MAX_STATIC_MMAP_REGIONS 5
-#define MAX_MMAP_REGIONS (3 + MAX_STATIC_MMAP_REGIONS)
+#define MAX_STATIC_MMAP_REGIONS 4
+#define MAX_MMAP_REGIONS (5 + MAX_STATIC_MMAP_REGIONS)
#define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \
(SUNXI_SRAM_A2_BASE + SUNXI_SRAM_A2_SIZE - 0x200)
diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c
index 9d1b3c1ea..d60d767ae 100644
--- a/plat/allwinner/common/sunxi_common.c
+++ b/plat/allwinner/common/sunxi_common.c
@@ -16,11 +16,7 @@
static const mmap_region_t sunxi_mmap[MAX_STATIC_MMAP_REGIONS + 1] = {
MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE,
- MT_RW_DATA | MT_SECURE),
-#ifdef SUNXI_SCP_BASE
- MAP_REGION_FLAT(SUNXI_SCP_BASE, SUNXI_SCP_SIZE,
MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
-#endif
MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE,
MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
MAP_REGION(SUNXI_DRAM_BASE, SUNXI_DRAM_VIRT_BASE, SUNXI_DRAM_SEC_SIZE,
@@ -40,12 +36,24 @@ void sunxi_configure_mmu_el3(int flags)
mmap_add_region(BL_CODE_BASE, BL_CODE_BASE,
BL_CODE_END - BL_CODE_BASE,
MT_CODE | MT_SECURE);
+ mmap_add_region(BL_CODE_END, BL_CODE_END,
+ BL_END - BL_CODE_END,
+ MT_RW_DATA | MT_SECURE);
+#if SEPARATE_CODE_AND_RODATA
mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE,
BL_RO_DATA_END - BL_RO_DATA_BASE,
MT_RO_DATA | MT_SECURE);
+#endif
+#if SEPARATE_NOBITS_REGION
+ mmap_add_region(BL_NOBITS_BASE, BL_NOBITS_BASE,
+ BL_NOBITS_END - BL_NOBITS_BASE,
+ MT_RW_DATA | MT_SECURE);
+#endif
+#if USE_COHERENT_MEM
mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE,
BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER);
+#endif
mmap_add(sunxi_mmap);
init_xlat_tables();
diff --git a/plat/allwinner/common/sunxi_scpi_pm.c b/plat/allwinner/common/sunxi_scpi_pm.c
index 74763ef7e..eb37daa63 100644
--- a/plat/allwinner/common/sunxi_scpi_pm.c
+++ b/plat/allwinner/common/sunxi_scpi_pm.c
@@ -212,7 +212,6 @@ int sunxi_set_scpi_psci_ops(const plat_psci_ops_t **psci_ops)
uint32_t offset = SUNXI_SCP_BASE - vector;
mmio_write_32(vector, offset >> 2);
- clean_dcache_range(vector, sizeof(uint32_t));
}
/* Take the SCP out of reset. */
diff --git a/plat/allwinner/sun50i_a64/sunxi_power.c b/plat/allwinner/sun50i_a64/sunxi_power.c
index 0fdb62d05..a35b9ddc0 100644
--- a/plat/allwinner/sun50i_a64/sunxi_power.c
+++ b/plat/allwinner/sun50i_a64/sunxi_power.c
@@ -244,7 +244,6 @@ void sunxi_cpu_power_off_self(void)
* in instruction granularity (32 bits).
*/
mmio_write_32(arisc_reset_vec, ((uintptr_t)code - arisc_reset_vec) / 4);
- clean_dcache_range(arisc_reset_vec, 4);
/* De-assert the arisc reset line to let it run. */
mmio_setbits_32(SUNXI_R_CPUCFG_BASE, BIT(0));
--
2.31.1

59
temp/arm-trusted-firmware/0004-allwinner-Do-not-map-BL32-DRAM-at-EL3.patch
View file

@ -1,59 +0,0 @@
From 9ac48782303b8e86c4fee7c52ae9a26e13e8005e Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 13 Dec 2020 20:22:42 -0600
Subject: [PATCH 4/8] allwinner: Do not map BL32 DRAM at EL3
BL31 does not appear to ever access the DRAM allocated to BL32,
so there is no need to map it at EL3.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Ie8727b793e53ea14517894942266f6da0333eb74
---
plat/allwinner/common/include/platform_def.h | 8 +++-----
plat/allwinner/common/sunxi_common.c | 2 --
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h
index e6ca6010f..de44174b2 100644
--- a/plat/allwinner/common/include/platform_def.h
+++ b/plat/allwinner/common/include/platform_def.h
@@ -39,12 +39,10 @@
#define MAX_XLAT_TABLES 1
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 28)
-#define SUNXI_BL33_VIRT_BASE (SUNXI_DRAM_VIRT_BASE + SUNXI_DRAM_SEC_SIZE)
-#endif /* SUNXI_BL31_IN_DRAM */
+#define SUNXI_BL33_VIRT_BASE SUNXI_DRAM_VIRT_BASE
-/* How much memory to reserve as secure for BL32, if configured */
-#define SUNXI_DRAM_SEC_SIZE (32U << 20)
+#endif /* SUNXI_BL31_IN_DRAM */
/* How much DRAM to map (to map BL33, for fetching the DTB from U-Boot) */
#define SUNXI_DRAM_MAP_SIZE (64U << 20)
@@ -52,7 +50,7 @@
#define CACHE_WRITEBACK_SHIFT 6
#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT)
-#define MAX_STATIC_MMAP_REGIONS 4
+#define MAX_STATIC_MMAP_REGIONS 3
#define MAX_MMAP_REGIONS (5 + MAX_STATIC_MMAP_REGIONS)
#define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \
diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c
index d60d767ae..82410b1ed 100644
--- a/plat/allwinner/common/sunxi_common.c
+++ b/plat/allwinner/common/sunxi_common.c
@@ -19,8 +19,6 @@ static const mmap_region_t sunxi_mmap[MAX_STATIC_MMAP_REGIONS + 1] = {
MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE,
MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
- MAP_REGION(SUNXI_DRAM_BASE, SUNXI_DRAM_VIRT_BASE, SUNXI_DRAM_SEC_SIZE,
- MT_RW_DATA | MT_SECURE),
MAP_REGION(PRELOADED_BL33_BASE, SUNXI_BL33_VIRT_BASE,
SUNXI_DRAM_MAP_SIZE, MT_RW_DATA | MT_NS),
{},
--
2.31.1

49
temp/arm-trusted-firmware/0005-allwinner-Clean-up-some-platform-definitions.patch
View file

@ -1,49 +0,0 @@
From e55aedf8ec36f624ad66a8dd033cbccc7e661faf Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 4 Apr 2021 15:54:17 -0500
Subject: [PATCH 5/8] allwinner: Clean up some platform definitions
Group the SCP base/size definitions in a more logical location.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Id43f9b468d7d855a2413173d674a5ee666527808
---
plat/allwinner/common/include/platform_def.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h
index de44174b2..56a2ad6f7 100644
--- a/plat/allwinner/common/include/platform_def.h
+++ b/plat/allwinner/common/include/platform_def.h
@@ -13,9 +13,6 @@
#include <sunxi_mmap.h>
-/* The SCP firmware is allocated the last 16KiB of SRAM A2. */
-#define SUNXI_SCP_SIZE 0x4000
-
#ifdef SUNXI_BL31_IN_DRAM
#define BL31_BASE SUNXI_DRAM_BASE
@@ -31,7 +28,6 @@
#define BL31_BASE (SUNXI_SRAM_A2_BASE + 0x4000)
#define BL31_LIMIT (SUNXI_SRAM_A2_BASE + \
SUNXI_SRAM_A2_SIZE - SUNXI_SCP_SIZE)
-#define SUNXI_SCP_BASE BL31_LIMIT
/* Overwrite U-Boot SPL, but reserve the first page for the SPL header. */
#define BL31_NOBITS_BASE (SUNXI_SRAM_A1_BASE + 0x1000)
@@ -42,6 +38,10 @@
#define SUNXI_BL33_VIRT_BASE SUNXI_DRAM_VIRT_BASE
+/* The SCP firmware is allocated the last 16KiB of SRAM A2. */
+#define SUNXI_SCP_BASE BL31_LIMIT
+#define SUNXI_SCP_SIZE 0x4000
+
#endif /* SUNXI_BL31_IN_DRAM */
/* How much DRAM to map (to map BL33, for fetching the DTB from U-Boot) */
--
2.31.1

12
temp/arm-trusted-firmware/0006-allwinner-Choose-PSCI-states-to-avoid-translation.patch → temp/arm-trusted-firmware/2001-allwinner-Choose-PSCI-states-to-avoid-translation.patch
View file

@ -1,7 +1,7 @@
From 3029a8f36df1246f781a5d10776b05c5ea7f2867 Mon Sep 17 00:00:00 2001
From 981a0f37f9c2d8e9cdff5bf34c80c3dd7e1128ae Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Thu, 18 Mar 2021 22:55:15 -0500
Subject: [PATCH 6/8] allwinner: Choose PSCI states to avoid translation
Subject: [PATCH] allwinner: Choose PSCI states to avoid translation
By aligning the PSCI and SCPI power states, we can avoid some code to
translate between the two. This also makes room for a second retention
@ -15,10 +15,10 @@ Change-Id: I26691085f277a96bd405e3305ab0fe390a92b418
2 files changed, 7 insertions(+), 17 deletions(-)
diff --git a/plat/allwinner/common/include/platform_def.h b/plat/allwinner/common/include/platform_def.h
index 56a2ad6f7..d771e92fe 100644
index 4893368c2..fc9c966ba 100644
--- a/plat/allwinner/common/include/platform_def.h
+++ b/plat/allwinner/common/include/platform_def.h
@@ -56,9 +56,10 @@
@@ -57,9 +57,10 @@
#define PLAT_CSS_SCP_COM_SHARED_MEM_BASE \
(SUNXI_SRAM_A2_BASE + SUNXI_SRAM_A2_SIZE - 0x200)
@ -33,7 +33,7 @@ index 56a2ad6f7..d771e92fe 100644
#define PLAT_MAX_PWR_LVL U(2)
#define PLAT_NUM_PWR_DOMAINS (U(1) + \
diff --git a/plat/allwinner/common/sunxi_scpi_pm.c b/plat/allwinner/common/sunxi_scpi_pm.c
index eb37daa63..ed1363537 100644
index 74763ef7e..89c834aa9 100644
--- a/plat/allwinner/common/sunxi_scpi_pm.c
+++ b/plat/allwinner/common/sunxi_scpi_pm.c
@@ -44,17 +44,6 @@
@ -68,5 +68,5 @@ index eb37daa63..ed1363537 100644
static void sunxi_pwr_domain_on_finish(const psci_power_state_t *target_state)
--
2.31.1
2.33.1

8
temp/arm-trusted-firmware/0007-allwinner-Simplify-CPU_SUSPEND-power-state-encoding.patch → temp/arm-trusted-firmware/2002-allwinner-Simplify-CPU_SUSPEND-power-state-encoding.patch
View file

@ -1,7 +1,7 @@
From 3b6ea6c08a365ada6e70c9ccc724cd7eb8729d31 Mon Sep 17 00:00:00 2001
From 75ddf133e308f7ce15af9ecd899079a22c59dcfc Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Thu, 18 Mar 2021 23:15:28 -0500
Subject: [PATCH 7/8] allwinner: Simplify CPU_SUSPEND power state encoding
Subject: [PATCH] allwinner: Simplify CPU_SUSPEND power state encoding
Use the encoding recommended by the PSCI specification: four bits for
the power state at each power level.
@ -17,7 +17,7 @@ Change-Id: I4b3b84e5c255ee58a25255a0cab5d7623425086e
1 file changed, 16 insertions(+), 20 deletions(-)
diff --git a/plat/allwinner/common/sunxi_scpi_pm.c b/plat/allwinner/common/sunxi_scpi_pm.c
index ed1363537..41dc56397 100644
index 89c834aa9..8dcc54b16 100644
--- a/plat/allwinner/common/sunxi_scpi_pm.c
+++ b/plat/allwinner/common/sunxi_scpi_pm.c
@@ -33,6 +33,9 @@
@ -81,5 +81,5 @@ index ed1363537..41dc56397 100644
}
--
2.31.1
2.33.1

30
temp/arm-trusted-firmware/APKBUILD
View file

@ -1,24 +1,18 @@
# Forked for adding rk3399, rk3328 support and crust compatibility
pkgname=arm-trusted-firmware
pkgver=9999
_pkgver=2.5
pkgrel=5
_pkgver=2.6
pkgrel=6
pkgdesc="ARM Trusted Firmware-A (TF-A)"
url="https://github.com/ARM-software/arm-trusted-firmware"
arch="aarch64"
license="BSD-3-Clause"
makedepends="dtc openssl-dev gcc-arm-none-eabi"
source="
$pkgname-$_pkgver.tar.gz::https://github.com/ARM-software/$pkgname/archive/v$_pkgver.tar.gz
rk3399-baudrate.patch
0001-bl_common-Import-BL_NOBITS_-BASE-END-when-defined.patch
0002-allwinner-Rename-static-mmap-region-constant.patch
0003-allwinner-Map-SRAM-as-device-memory-by-default.patch
0004-allwinner-Do-not-map-BL32-DRAM-at-EL3.patch
0005-allwinner-Clean-up-some-platform-definitions.patch
0006-allwinner-Choose-PSCI-states-to-avoid-translation.patch
0007-allwinner-Simplify-CPU_SUSPEND-power-state-encoding.patch
"
https://github.com/ARM-software/$pkgname/archive/v$_pkgver/arm-trusted-firmware-$_pkgver.tar.gz
2001-allwinner-Choose-PSCI-states-to-avoid-translation.patch
2002-allwinner-Simplify-CPU_SUSPEND-power-state-encoding.patch
"
options="!check" # no tests
builddir="$srcdir/$pkgname-$_pkgver"
_plats="sun50i_a64 sun50i_h6 rk3399 rk3328"
@ -47,13 +41,7 @@ package() {
sha512sums="
3c99f1d849c3c536e8e2e4838ee48a1a431f0bef35eaf27eb14f9caebde71a577589b10efbbd7db49bed3b9763bed46583d0b26e72f61fcd0d34cc46ff684846 arm-trusted-firmware-2.5.tar.gz
86d8c60157145ab05e9b870aad11d2acaf2137ba00bf71419f8a54a4fd2b1906c19bc8bfeccc735344d1dcf11ba81bd9396bfd8854cdb972a72503b632d1e900 rk3399-baudrate.patch
b1b36fd5219c608500f763bc784cb52349c7c3344273483594672bb1917ede21f2dd09ec37a383f39fca39b05b7a29fadbbeecfde1ae4f31319277f6561c2fbb 0001-bl_common-Import-BL_NOBITS_-BASE-END-when-defined.patch
2b0e3d879a8e08301288a1eb233640e9366e107b621fa4a92a358b0b3aa4beaa68d1bb1f5b0d4bc7013369aa08d0f9a360e77c8b027daa40a4d2438fe804dde3 0002-allwinner-Rename-static-mmap-region-constant.patch
fe2c975c2b5bbc583427be1ef4b2c3c901b22d8044eecf7058b3dcd9167710a40500dbfa12986c8010c9030b4a580dd62a772a76262010ddb4dc2b310f28721c 0003-allwinner-Map-SRAM-as-device-memory-by-default.patch
f3c7c97a014939e09a3161a4ffd01ce2d7e1eb9f0556dc67a4e8c62fc95ec469d5c51b74279e373b0d411b6c6f8c3dd097901bdaace1750745d6ac66a6b61dac 0004-allwinner-Do-not-map-BL32-DRAM-at-EL3.patch
b5848397f552b19c427e1675e2054e3ade8d7957df9e4e03c5dad1dcaa47bbfea8061374917250ecf6a83ba9fe9fd2dd273ee10d47abea1cf35e8c375a701165 0005-allwinner-Clean-up-some-platform-definitions.patch
b37e0763182abaec1892d70ac8bfcf468185c0095749c96df3541cce7612be55b99f8c6fc51c2c2465db6d3b7d779ed08fe2da2dfa20c8e002c0cff8c2df33d9 0006-allwinner-Choose-PSCI-states-to-avoid-translation.patch
341d51db93fed9c1ae8e7c295d00f9e021333485a70dc823b5729ed7ee84ddb1feb272b2ec9470ee06cc1df93da638eb84a10baf0f4cc1b24a48033ac97eaf5f 0007-allwinner-Simplify-CPU_SUSPEND-power-state-encoding.patch
8b20964b1b672898268e27424984af0ef9e95b38f426370ed4b802f67fc204db5f467886707dce77e4560548e01777a6c36d4eb801842c7d1f2ff6ca5d9b7dd1 arm-trusted-firmware-2.6.tar.gz
3f8c63941418e44b849f8770704b1570926cbe20522d6957b965afe62c02a55d092b21397603994f3444908376531f13eb28b9716ed10e0d57bae0d9f5713c1a 2001-allwinner-Choose-PSCI-states-to-avoid-translation.patch
15daabe8a55847d23fb5e498353d368773a50ec339786b422a9b21bbc21a7b1185851a0d9dca6832952bcbc71a1c9d08a508323625bcd2b5781955248a43f13d 2002-allwinner-Simplify-CPU_SUSPEND-power-state-encoding.patch
"

23
temp/arm-trusted-firmware/rk3399-baudrate.patch
View file

@ -1,23 +0,0 @@
From b3fc3a853b8357afd3a010a765072d27f640f5e8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andrius=20=C5=A0tikonas?= <andrius@stikonas.eu>
Date: Sat, 14 Sep 2019 11:09:01 +0100
Subject: [PATCH] Increase BAUD_RATE to 1500000, so that it matches U-Boot and
kernel.
---
plat/rockchip/rk3399/rk3399_def.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/plat/rockchip/rk3399/rk3399_def.h b/plat/rockchip/rk3399/rk3399_def.h
index ba83242e..8d6ecfbe 100644
--- a/plat/rockchip/rk3399/rk3399_def.h
+++ b/plat/rockchip/rk3399/rk3399_def.h
@@ -17,7 +17,7 @@
/**************************************************************************
* UART related constants
**************************************************************************/
-#define RK3399_BAUDRATE 115200
+#define RK3399_BAUDRATE 1500000
#define RK3399_UART_CLOCK 24000000
/******************************************************************************