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samsung-chagallwifi: add mainline kernel variant (MR 2860)

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Use the new linux-postmarketos-exynos5 package.  Also update
deviceinfo to match latest template, and remove SEANDROID warning.
This commit is contained in:
Henrik Grimler 2021-09-23 12:10:42 +02:00 committed by Newbyte
parent 85f80bf0e7
commit 12f450d8b9
No known key found for this signature in database
GPG key ID: 5873C171C9429CFA
7 changed files with 992 additions and 6 deletions
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26
device/testing/device-samsung-chagallwifi/APKBUILD
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@ -3,16 +3,20 @@
# Reference: <https://postmarketos.org/devicepkg>
pkgname=device-samsung-chagallwifi
pkgdesc="Samsung Galaxy Tab S 10.5"
pkgver=0.1
pkgrel=3
pkgver=1
pkgrel=0
url="https://postmarketos.org"
license="MIT"
arch="armv7"
options="!check !archcheck"
depends="postmarketos-base linux-samsung-chagallwifi mkbootimg mesa-dri-swrast msm-fb-refresher"
depends="postmarketos-base mkbootimg"
makedepends="devicepkg-dev"
source="deviceinfo"
subpackages="$pkgname-nonfree-firmware:nonfree_firmware"
subpackages="
$pkgname-kernel-downstream:kernel_downstream
$pkgname-kernel-mainline:kernel_mainline
$pkgname-nonfree-firmware:nonfree_firmware
"
build() {
devicepkg_build $startdir $pkgname
@ -22,6 +26,18 @@ package() {
devicepkg_package $startdir $pkgname
}
kernel_downstream() {
pkgdesc="Display and wifi works (see device table for details)"
depends="linux-samsung-chagallwifi mesa-dri-swrast msm-fb-refresher"
devicepkg_subpackage_kernel $startdir $pkgname $subpkgname
}
kernel_mainline() {
pkgdesc="Mainline WIP (usb networking works but not much else)"
depends="linux-postmarketos-exynos5"
devicepkg_subpackage_kernel $startdir $pkgname $subpkgname
}
nonfree_firmware() {
pkgdesc="Non-free firmware for the Samsung Galaxy Tab S"
depends="firmware-samsung-chagall"
@ -29,5 +45,5 @@ nonfree_firmware() {
}
sha512sums="
b6dbcae026861dc9c31c804d0388ec24ceac313692b901b6d159134710892b89e798878cae8e41a26167b3c3b5e7f6360818cec84fdbd22fbcd77bf4a48dcc8b deviceinfo
3928540b95d988b0264da86c43bedd0c3e66f9b0d60a795fe26c976da383aee0d1a3819d1aa819af9637f7540c2cefdd2e1decf7b4dc060e6327d303d8e5cebc deviceinfo
"

9
device/testing/device-samsung-chagallwifi/deviceinfo
View file

@ -1,11 +1,14 @@
# Reference: <https://postmarketos.org/deviceinfo>
# Please use double quotes only. You can source this file in shell scripts.
# Please use double quotes only. You can source this file in shell
# scripts.
deviceinfo_format_version="0"
deviceinfo_name="Samsung Galaxy Tab S 10.5 WiFi"
deviceinfo_manufacturer="Samsung"
deviceinfo_codename="samsung-chagallwifi"
deviceinfo_year="2014"
deviceinfo_append_dtb_mainline="true"
deviceinfo_dtb_mainline="exynos5420-chagall-wifi"
deviceinfo_arch="armv7"
# Device related
@ -19,6 +22,8 @@ deviceinfo_screen_height="1600"
deviceinfo_flash_method="heimdall-bootimg"
deviceinfo_generate_bootimg="true"
deviceinfo_bootimg_qcdt="false"
deviceinfo_bootimg_append_seandroidenforce="true"
deviceinfo_bootimg_mtk_mkimage="false"
deviceinfo_bootimg_dtb_second="false"
deviceinfo_flash_offset_base="0x10000000"
deviceinfo_flash_offset_kernel="0x00008000"
@ -26,6 +31,8 @@ deviceinfo_flash_offset_ramdisk="0x01000000"
deviceinfo_flash_offset_second="0x00f00000"
deviceinfo_flash_offset_tags="0x00000100"
deviceinfo_flash_pagesize="2048"
# Heimdall related
deviceinfo_flash_heimdall_partition_kernel="BOOT"
deviceinfo_flash_heimdall_partition_system="SYSTEM"

37
main/linux-postmarketos-exynos5/0009-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch Normal file
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@ -0,0 +1,37 @@
From 25b22fa8ed1bd03d54cc67e57ab039fa25524b83 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?= <arve@android.com>
Date: Fri, 30 Nov 2012 17:05:40 -0800
Subject: [PATCH 09/16] ARM: decompressor: Flush tlb before swiching domain 0
to client mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
If the bootloader used a page table that is incompatible with domain 0
in client mode, and boots with the mmu on, then swithing domain 0 to
client mode causes a fault if we don't flush the tlb after updating
the page table pointer.
v2: Add ISB before loading dacr.
Signed-off-by: Arve Hjønnevåg <arve@android.com>
---
arch/arm/boot/compressed/head.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b1cb1972361b..82c220ddf712 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -895,6 +895,8 @@ __armv7_mmu_cache_on:
bic r6, r6, #1 << 31 @ 32-bit translation system
bic r6, r6, #(7 << 0) | (1 << 4) @ use only ttbr0
mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
+ mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
+ mcr p15, 0, r0, c7, c5, 4 @ ISB
mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
#endif
--
2.34.1

30
main/linux-postmarketos-exynos5/0010-dt-bindings-arm-samsung-document-Chagall-WiFi-board-.patch Normal file
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@ -0,0 +1,30 @@
From ef6559982b265ccc27a68085c521ed26b5efbd85 Mon Sep 17 00:00:00 2001
From: Henrik Grimler <henrik@grimler.se>
Date: Mon, 20 Dec 2021 11:47:38 +0100
Subject: [PATCH 10/16] dt-bindings: arm: samsung: document Chagall WiFi board
binding
Add binding for Samsung Galaxy Tab S 10.5", based on Exynos 5420 with
codename chagall-wifi. It was released in 2014 and has several siblings
with similar hardware.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
---
.../devicetree/bindings/arm/samsung/samsung-boards.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
index ef6dc14be4b5..c385e6bfaed1 100644
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
@@ -140,6 +140,7 @@ properties:
items:
- enum:
- insignal,arndale-octa # Insignal Arndale Octa
+ - samsung,chagall-wifi # Samsung SM-T800
- samsung,smdk5420 # Samsung SMDK5420 eval
- const: samsung,exynos5420
- const: samsung,exynos5
--
2.34.1

62
main/linux-postmarketos-exynos5/0011-ARM-exynos-only-do-SMC_CMD_CPU1BOOT-call-on-Exynos4.patch Normal file
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@ -0,0 +1,62 @@
From dae39d461569897f3ae0aedde041dfb8cfcc4f96 Mon Sep 17 00:00:00 2001
From: Henrik Grimler <henrik@grimler.se>
Date: Mon, 18 Oct 2021 21:43:08 +0200
Subject: [PATCH 11/16] ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4
On Exynos5 the call is simply ignored by most variants of the
trustzone firmware. However, on some devices it instead causes the
device to hang, so let's avoid the call for the SoCs where it should
not be needed.
To see that the call is ignored, we can look into sboot/tzsw. On most
of the Exynos{4,5} devices the part of sboot/tzsw that seem to handle
the secure monitor calls is quite easy to recognise, the SMC number is
compared to known ones, and if equal it branches to the relevant
function. In assembly this looks something like:
;-- handle_smc:
0x00000514 650070e3 cmn r0, 0x65
0x00000518 0a00000a beq loc.smc_cmd_reg
0x0000051c 010070e3 cmn r0, 1
0x00000520 6c00000a beq loc.smc_cmd_init
0x00000524 020070e3 cmn r0, 2
0x00000528 6b00000a beq loc.smc_cmd_info
0x0000052c 030070e3 cmn r0, 3
0x00000530 6e00000a beq loc.smc_cmd_sleep
0x00000534 060070e3 cmn r0, 6
0x00000538 ae00000a beq loc.smc_cmd_save_state
0x0000053c 070070e3 cmn r0, 7
0x00000540 b400000a beq loc.smc_cmd_standby
0x00000544 2b01001a bne loc.smc_return_minus1
where above example is from exynos5420-arndale-octa. As can be seen
the case where r0 is 4 (i.e. SMC_CMD_CPU1BOOT) is not handled. The
annotations are taken from github.com/hsnaves/exynos5410-firmware,
where a large part of the exynos5410 trustzone firmware has been
reverse-engineered.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
arch/arm/mach-exynos/firmware.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 2eaf2dbb8e81..2da5b60b59e2 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -60,8 +60,10 @@ static int exynos_cpu_boot(int cpu)
/*
* Exynos3250 doesn't need to send smc command for secondary CPU boot
* because Exynos3250 removes WFE in secure mode.
+ *
+ * On Exynos5 devices the call is ignored by trustzone firmware.
*/
- if (soc_is_exynos3250())
+ if (!soc_is_exynos4210() && !soc_is_exynos4412())
return 0;
/*
--
2.34.1

826
main/linux-postmarketos-exynos5/0012-ARM-dts-Add-support-for-Samsung-Chagall-WiFi.patch Normal file
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@ -0,0 +1,826 @@
From 5464814ae6af0b7abbcce9a76f772fee7977d4f5 Mon Sep 17 00:00:00 2001
From: Henrik Grimler <henrik@grimler.se>
Date: Wed, 27 Jan 2021 16:04:46 +0100
Subject: [PATCH 12/16] ARM: dts: Add support for Samsung Chagall WiFi
Chagall WiFi, with product name Samsung Galaxy Tab S 10.5", is based
on Exynos 5420. This device is one of several tablet models released
in 2014 based on Exynos 5420.
The device tree added here contains support for:
- UART
- eMMC
- SD card
- USB
CCI has been disabled in the hardware, enabling it would require
(de-)soldering a resistor on the board. Trying to boot with it
enabled in kernel makes the device hang when CCI is probed.
Exynos5420-arndale-octa also has had CCI disabled due to issues, see
commit 25217fef3551 ("ARM: dts: disable CCI on exynos5420 based
arndale-octa").
Signed-off-by: Henrik Grimler <henrik@grimler.se>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5420-chagall-wifi.dts | 75 ++
.../dts/exynos5420-galaxy-tab-common.dtsi | 692 ++++++++++++++++++
3 files changed, 768 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos5420-chagall-wifi.dts
create mode 100644 arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0de64f237cd8..088fcedb3212 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -220,6 +220,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5420-arndale-octa.dtb \
exynos5420-peach-pit.dtb \
exynos5420-smdk5420.dtb \
+ exynos5420-chagall-wifi.dtb \
exynos5422-odroidhc1.dtb \
exynos5422-odroidxu3.dtb \
exynos5422-odroidxu3-lite.dtb \
diff --git a/arch/arm/boot/dts/exynos5420-chagall-wifi.dts b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
new file mode 100644
index 000000000000..1319344a2c74
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-chagall-wifi.dts
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's Exynos5420 Chagall WiFi board device tree source
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2022 Henrik Grimler
+ */
+
+/dts-v1/;
+#include "exynos5420-galaxy-tab-common.dtsi"
+
+/ {
+ model = "Samsung Chagall WiFi based on Exynos5420";
+ compatible = "samsung,chagall-wifi", "samsung,exynos5420", \
+ "samsung,exynos5";
+};
+
+&ldo15_reg {
+ /* Unused */
+ regulator-name = "VDD_LDO15";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
+
+&ldo17_reg {
+ regulator-name = "VDD_IRLED_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3350000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
+
+&ldo28_reg {
+ /* Unused */
+ regulator-name = "VDD_LDO28";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
+
+&ldo29_reg {
+ regulator-name = "VDD_TCON_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
+
+&ldo31_reg {
+ regulator-name = "VDD_GRIP_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
+
+&ldo32_reg {
+ regulator-name = "VDD_TSP_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+};
diff --git a/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
new file mode 100644
index 000000000000..b3f5a50ef6d5
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
@@ -0,0 +1,692 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Base DT for Samsung's family of tablets based on Exynos5420.
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2022 Henrik Grimler
+ */
+
+/dts-v1/;
+#include "exynos5420.dtsi"
+#include "exynos5420-cpus.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/samsung,s2mps11.h>
+
+/ {
+ chassis-type = "tablet";
+
+ /*
+ * To successfully boot the mainline kernel with the stock
+ * bootloader (SBOOT), the tlb needs to be flushed after the
+ * page table pointer has been updated in __common_mmu_cache_on.
+ * The same hack is also needed to boot exynos4412-i9300 with
+ * stock bootloader, and probably other Samsung devices of
+ * similar age. See
+ * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com
+ * for more details.
+ */
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@20000000 {
+ device_type = "memory";
+ reg = <0x20000000 0xc0000000>;
+ };
+
+ firmware@2073000 {
+ compatible = "samsung,secure-firmware";
+ reg = <0x02073000 0x1000>;
+ };
+
+ fixed-rate-clocks {
+ oscclk {
+ compatible = "samsung,exynos5420-oscclk";
+ clock-frequency = <24000000>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+
+ key-power {
+ debounce-interval = <10>;
+ gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
+ label = "Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ };
+
+ key-home {
+ debounce-interval = <10>;
+ gpios = <&gpx0 5 GPIO_ACTIVE_LOW>;
+ label = "Home";
+ linux,code = <KEY_HOME>;
+ wakeup-source;
+ };
+
+ key-volume-up {
+ debounce-interval = <10>;
+ gpios = <&gpx0 2 GPIO_ACTIVE_LOW>;
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ };
+
+ key-volume-down {
+ debounce-interval = <10>;
+ gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
+ label = "Volume Down";
+ linux,code = <KEY_VOLUMEDOWN>;
+ };
+ };
+};
+
+&cci {
+ /* CCI is disabled in hardware */
+ status = "disabled";
+};
+
+&cpu0 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck6_reg>;
+};
+
+&gpu {
+ status = "okay";
+ mali-supply = <&buck4_reg>;
+};
+
+&hsi2c_7 {
+ status = "okay";
+
+ pmic@66 {
+ compatible = "samsung,s2mps11-pmic";
+ reg = <0x66>;
+
+ interrupt-parent = <&gpx3>;
+ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&s2mps11_irq>;
+
+ s2mps11_osc: clocks {
+ compatible = "samsung,s2mps11-clk";
+ #clock-cells = <1>;
+ clock-output-names = "s2mps11_ap", "s2mps11_cp",
+ "s2mps11_bt";
+ };
+
+ regulators {
+ buck1_reg: BUCK1 {
+ regulator-name = "VDD_MIF_1V1";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "VDD_ARM_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = "VDD_INT_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "VDD_G3D_1V0";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck5_reg: BUCK5 {
+ regulator-name = "VDD_MEM_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = "VDD_KFC_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck7_reg: BUCK7 {
+ regulator-name = "VIN_LLDO_1V4";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
+ buck8_reg: BUCK8 {
+ regulator-name = "VIN_MLDO_2V0";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2100000>;
+ regulator-always-on;
+ };
+
+ buck9_reg: BUCK9 {
+ regulator-name = "VIN_HLDO_3V5";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3500000>;
+ regulator-always-on;
+ };
+
+ buck10_reg: BUCK10 {
+ regulator-name = "VDD_CAM_ISP_1V0";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <3550000>;
+ };
+
+ ldo1_reg: LDO1 {
+ regulator-name = "VDD_ALIVE_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ regulator-name = "VDD_APIO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo3_reg: LDO3 {
+ regulator-name = "VDD_APIO_MMC01_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo4_reg: LDO4 {
+ regulator-name = "VDD_ADC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo5_reg: LDO5 {
+ /* Unused */
+ regulator-name = "VDD_LDO5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "VDD_MIPI_1V0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo7_reg: LDO7 {
+ regulator-name = "VDD_MIPI_PLL_ABB1_18V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo8_reg: LDO8 {
+ /* Unused */
+ regulator-name = "VDD_LDO8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo9_reg: LDO9 {
+ regulator-name = "VDD_UOTG_3V0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo10_reg: LDO10 {
+ regulator-name = "VDDQ_PRE_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo11_reg: LDO11 {
+ regulator-name = "VDD_HSIC_1V0";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo12_reg: LDO12 {
+ regulator-name = "VDD_HSIC_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo13_reg: LDO13 {
+ regulator-name = "VDD_APIO_MMC2_2V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo14_reg: LDO14 {
+ regulator-name = "VDD_MOTOR_3V0";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo15_reg: LDO15 {
+ regulator-name = "VDD_LDO15";
+ /*
+ * LDO15 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo16_reg: LDO16 {
+ regulator-name = "VDD_AP_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo17_reg: LDO17 {
+ regulator-name = "VDD_LDO17";
+ /*
+ * LDO17 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo18_reg: LDO18 {
+ /* Unused */
+ regulator-name = "VDD_LDO18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+
+ ldo19_reg: LDO19 {
+ regulator-name = "VDD_VTF_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo20_reg: LDO20 {
+ regulator-name = "VDD_CAM1_CAM_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo21_reg: LDO21 {
+ regulator-name = "VDD_CAM_IO_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo22_reg: LDO22 {
+ regulator-name = "VDD_CAM0_S_CORE_1V1";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo23_reg: LDO23 {
+ regulator-name = "VDD_MIFS_1V1";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo24_reg: LDO24 {
+ regulator-name = "VDD_TSP_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo25_reg: LDO25 {
+ /* Unused */
+ regulator-name = "VDD_LDO25";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo26_reg: LDO26 {
+ regulator-name = "VDD_CAM0_AF_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo27_reg: LDO27 {
+ regulator-name = "VDD_G3DS_1V0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ ldo28_reg: LDO28 {
+ regulator-name = "VDD_LDO28";
+ /*
+ * LDO28 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo29_reg: LDO29 {
+ regulator-name = "VDD_LDO29";
+ /*
+ * LDO29 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo30_reg: LDO30 {
+ regulator-name = "VDD_TOUCH_1V8";
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <1900000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo31_reg: LDO31 {
+ regulator-name = "VDD_LDO31";
+ /*
+ * LDO31 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo32_reg: LDO32 {
+ regulator-name = "VDD_LDO32";
+ /*
+ * LDO32 varies between devices and is
+ * specified in the device dts
+ */
+ };
+
+ ldo33_reg: LDO33 {
+ regulator-name = "VDD_MHL_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo34_reg: LDO34 {
+ regulator-name = "VDD_MHL_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo35_reg: LDO35 {
+ regulator-name = "VDD_SIL_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo36_reg: LDO36 {
+ /* Unused */
+ regulator-name = "VDD_LDO36";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo37_reg: LDO37 {
+ /* Unused */
+ regulator-name = "VDD_LDO37";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3950000>;
+ };
+
+ ldo38_reg: LDO38 {
+ regulator-name = "VDD_KEY_LED_3V3";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&mixer {
+ status = "okay";
+};
+
+/* Internal storage */
+&mmc_0 {
+ status = "okay";
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ card-detect-delay = <200>;
+ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+ pinctrl-names = "default";
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ vqmmc-supply = <&ldo3_reg>;
+};
+
+/* External sdcard */
+&mmc_2 {
+ status = "okay";
+ bus-width = <4>;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ cd-gpios = <&gpx2 4 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sd2_clk &sd2_cmd &mmc2_cd &sd2_bus1 &sd2_bus4>;
+ pinctrl-names = "default";
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ sd-uhs-sdr50;
+ vmmc-supply = <&ldo19_reg>;
+ vqmmc-supply = <&ldo13_reg>;
+};
+
+&pinctrl_0 {
+ mmc2_cd: mmc2-cd {
+ samsung,pins = "gpx2-4";
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ };
+
+ s2mps11_irq: s2mps11-irq {
+ samsung,pins = "gpx3-0";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
+ };
+};
+
+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
+ clock-names = "rtc", "rtc_src";
+};
+
+&tmu_cpu0 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu1 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu2 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_cpu3 {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&tmu_gpu {
+ vtmu-supply = <&ldo10_reg>;
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "peripheral";
+};
+
+&usbdrd_dwc3_1 {
+ dr_mode = "peripheral";
+};
+
+&usbdrd3_0 {
+ vdd33-supply = <&ldo9_reg>;
+ vdd10-supply = <&ldo11_reg>;
+};
+
+&usbdrd3_1 {
+ vdd33-supply = <&ldo9_reg>;
+ vdd10-supply = <&ldo11_reg>;
+};
--
2.34.1

8
main/linux-postmarketos-exynos5/APKBUILD
View file

@ -46,6 +46,10 @@ source="
0006-ODROID-COMMON-add-symbol-to-device-tree-compiler.patch
0007-ODROID-COMMON-phy-realtek-add-Wake-on-Lan-to-Realtek.patch
0008-ARM-exynos-add-machine-description-for-ODROID-XU3-4.patch
0009-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
0010-dt-bindings-arm-samsung-document-Chagall-WiFi-board-.patch
0011-ARM-exynos-only-do-SMC_CMD_CPU1BOOT-call-on-Exynos4.patch
0012-ARM-dts-Add-support-for-Samsung-Chagall-WiFi.patch
"
builddir="$srcdir/linux-${_kernver//_/-}"
@ -85,4 +89,8 @@ e540e3be0d0d45135f394f07bf8c9769654bf4c7d79a4558593ade87e02c21ab5cf66c3ff6672dab
0272dc43b9218e38ce329c7a358eb869fd7ccdf70c9aae0e5cc3e0a029ba8f9616d3260b247650277376a1c1a3ec160f1ec8bc3df642b6f6cf7e60ba99e828e7 0006-ODROID-COMMON-add-symbol-to-device-tree-compiler.patch
622f1f90ecc63a3cac32e8dafcfbe265a175031307af0a99088301bb2631bb55f6e6194e889f453d6f06239a5217e52c1b4ee9905570a06e975ce7aa1bb35434 0007-ODROID-COMMON-phy-realtek-add-Wake-on-Lan-to-Realtek.patch
36b00ee94045b8dce002f55b91e0970dde59f9fa75ec4df7043930532991bfb59a0504256b056cd3f801bab05f5c23b2765e55c6ffbafe706a3e62bcd1ff71b9 0008-ARM-exynos-add-machine-description-for-ODROID-XU3-4.patch
f031b887181d645075c7e4b2d93d60f0b0932e256f6b292850bab4b7480b4289f4a89f43f7e4a6d951eb0c7cd1a5cafff119c433573bb188a9960bab0685d189 0009-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
b0595d89a559c14e016f0ef65f526240ab2a85a0397fed1b9a304aca2d7a946496891aad33dcd0fae77fc9d4f33baba58503595f97132af90efdaf9de8d78e4c 0010-dt-bindings-arm-samsung-document-Chagall-WiFi-board-.patch
8d8be7677e67c41a3eafbf5fff13edeb6be88056a45ab55347544ab883fd3e50d15e77a929f53bd2a1917c9d51cec3d5a78205b3fade0d682081bb5e0317ee81 0011-ARM-exynos-only-do-SMC_CMD_CPU1BOOT-call-on-Exynos4.patch
d552e78c7a7c029274766200dba88a9af3b22e60f393e1fcd345a527de26c203222308ecce0b212ea8f55a5287737b6ee8730c69680d585f8ce4b45faebf3d20 0012-ARM-dts-Add-support-for-Samsung-Chagall-WiFi.patch
"