linux-postmarketos-exynos4: split panel patch (MR 4011)
As stated in the MRs that added the patch, the ea8061 and s6evr02 panel drivers are originally from work by Simon Shields (fourkbomb). Let's base our patches on the original commits to preserve authorship, and note which modifications have been done, and by who. This is a step towards making these patches ready for submission to upstream. [ci:skip-build]: Already built successfully in CI
This commit is contained in:
Henrik Grimler
Newbyte
parent
484f587c1f
commit
0d2757b3a4
15 changed files with 1940 additions and 1894 deletions
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@ -1,7 +1,7 @@
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From 9a833a40c7288466318dd10cc8fa7a898613f75a Mon Sep 17 00:00:00 2001
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From 2a8827ae4e19cfe78d57c45cfffb7b2a010a77b6 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?= <arve@android.com>
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Date: Fri, 30 Nov 2012 17:05:40 -0800
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Subject: [PATCH 01/11] ARM: decompressor: Flush tlb before swiching domain 0
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Subject: [PATCH 01/13] ARM: decompressor: Flush tlb before swiching domain 0
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to client mode
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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@ -33,5 +33,5 @@ index 9f406e9c0ea6..750c8c0d5d9e 100644
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mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
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#endif
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--
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2.38.1
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2.30.2
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@ -1,7 +1,7 @@
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From f58ef6a45f162e2bd1d0c7c0de00f94bccd3b6f5 Mon Sep 17 00:00:00 2001
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From d5af6b882084222f9b41ff1fa80116ffc82c857a Mon Sep 17 00:00:00 2001
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From: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
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Date: Wed, 4 Nov 2020 00:06:26 +0100
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Subject: [PATCH 02/11] ARM: dts: exynos: Add reboot modes to midas
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Subject: [PATCH 02/13] ARM: dts: exynos: Add reboot modes to midas
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The values have been taken from the sec-reboot.c driver in
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the 3.0.101 smdk4412 kernel used in LineageOS which is based
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@ -57,5 +57,5 @@ index 8e1c19a8ad06..1f9cd7474b16 100644
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&pinctrl_0 {
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--
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2.38.1
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2.30.2
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@ -1,7 +1,7 @@
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From 9d3455e9112fe73fb77bd1237673c6c944375adb Mon Sep 17 00:00:00 2001
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From 8e9623270952885f0b4a45c56c965c4295ce709c Mon Sep 17 00:00:00 2001
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From: belgin <belginstirbu@hotmail.com>
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Date: Tue, 29 Jun 2021 20:31:12 +0300
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Subject: [PATCH 03/11] mmc: core: Workaround VTU00M 0xf1 FTL metadata
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Subject: [PATCH 03/13] mmc: core: Workaround VTU00M 0xf1 FTL metadata
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corruption bug
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Some versions of the 0xf1 revision of the firmware of the
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@ -339,5 +339,5 @@ index 6efec0b9820c..9bfbe8a2d22d 100644
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+
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#endif /* LINUX_MMC_CORE_H */
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--
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2.38.1
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2.30.2
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@ -1,7 +1,7 @@
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From 33826a37a40cd49d21f959721478d4cf085cee46 Mon Sep 17 00:00:00 2001
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From 5cd8e7d2ec843996eebb37246d828255c182f4f4 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Joonas=20Kylm=C3=A4l=C3=A4?= <joonas.kylmala@iki.fi>
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Date: Tue, 3 Sep 2019 10:45:08 -0400
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Subject: [PATCH 04/11] drivers: drm: Add backlight control support for s6e8aa0
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Subject: [PATCH 04/13] drivers: drm: Add backlight control support for s6e8aa0
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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@ -178,5 +178,5 @@ index 54213beafaf5..635336208fef 100644
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drm_panel_init(&ctx->panel, dev, &s6e8aa0_drm_funcs,
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DRM_MODE_CONNECTOR_DSI);
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--
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2.38.1
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2.30.2
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@ -1,7 +1,7 @@
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From 18c46a9d7aa916d8fe407d01dd0329df7ac8f8e9 Mon Sep 17 00:00:00 2001
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From 0694eec6b1da62d19cf5334471c0bce7cabfa8e2 Mon Sep 17 00:00:00 2001
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From: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
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Date: Tue, 27 Sep 2016 00:56:37 +0200
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Subject: [PATCH 05/11] power_supply: max77693: Listen for cable events and
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Subject: [PATCH 05/13] power_supply: max77693: Listen for cable events and
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enable charging
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This patch adds a listener for extcon cable events and enables
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@ -296,5 +296,5 @@ index a2c5c9858639..f2b5ef7df446 100644
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return 0;
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--
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2.38.1
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2.30.2
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@ -1,7 +1,7 @@
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From b25dcb4f2ece56b03a09680ba933f8788bc64864 Mon Sep 17 00:00:00 2001
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From 44b7e1cb569c6bd3b2ef30304dac8fff80414506 Mon Sep 17 00:00:00 2001
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From: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
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Date: Mon, 26 Sep 2016 23:33:05 +0200
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Subject: [PATCH 06/11] mfd: max77693: Add defines for charger current control
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Subject: [PATCH 06/13] mfd: max77693: Add defines for charger current control
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This prepares for an updated regulator and charger driver. The defines
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are needed to set the maximum input current and the fast charge
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@ -40,5 +40,5 @@ index 311f7d3d2323..f6df8bafe996 100644
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/* MAX77693 CHG_CTRL Register */
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#define SAFEOUT_CTRL_SAFEOUT1_MASK 0x3
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--
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2.38.1
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2.30.2
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@ -1,7 +1,7 @@
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From 8ad0b1ba7e2632ac83bcc4f07e0ecde9ed6256eb Mon Sep 17 00:00:00 2001
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From 5e23168b43df9f888bab09090d8d9df868cf8d24 Mon Sep 17 00:00:00 2001
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From: Shilin Victor <chrono.monochrome@gmail.com>
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Date: Fri, 19 Mar 2021 19:10:37 +0300
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Subject: [PATCH 07/11] power_supply: max77693: change the supply type to
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Subject: [PATCH 07/13] power_supply: max77693: change the supply type to
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POWER_SUPPLY_TYPE_MAINS
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---
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@ -22,5 +22,5 @@ index f2b5ef7df446..3962701989e5 100644
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.num_properties = ARRAY_SIZE(max77693_charger_props),
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.get_property = max77693_charger_get_property,
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--
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2.38.1
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2.30.2
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@ -1,7 +1,7 @@
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From 287d9f4f38c2710b5a8cd384ffe1f05ca10761b0 Mon Sep 17 00:00:00 2001
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From b582d2cc9352ba4dc5679e74eb8e1f25ee7f6f0f Mon Sep 17 00:00:00 2001
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From: Jack Knightly <J__A__K@hotmail.com>
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Date: Fri, 14 Oct 2022 20:59:44 +0200
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Subject: [PATCH 08/11] samsung-t0lte: add leds
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Subject: [PATCH 08/13] samsung-t0lte: add leds
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Adds flash/torch LED for samsung-t0lte
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@ -82,10 +82,10 @@ index 1f9cd7474b16..3d6faa222f1d 100644
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compatible = "i2c-gpio";
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sda-gpios = <&gpf0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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diff --git a/arch/arm/boot/dts/exynos4412-n710x.dts b/arch/arm/boot/dts/exynos4412-n710x.dts
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index da0e475b1063..739aa0080e3f 100644
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index 9ae05b0d684c..5f2888816e4a 100644
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--- a/arch/arm/boot/dts/exynos4412-n710x.dts
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+++ b/arch/arm/boot/dts/exynos4412-n710x.dts
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@@ -138,6 +138,21 @@ &ldo25_reg {
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@@ -69,6 +69,21 @@ &ldo25_reg {
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regulator-max-microvolt = <3000000>;
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};
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@ -108,5 +108,5 @@ index da0e475b1063..739aa0080e3f 100644
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standby-gpios = <&gpm0 6 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */
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vdda-supply = <&cam_vdda_reg>;
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--
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2.38.1
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2.30.2
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File diff suppressed because it is too large
Load diff
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@ -0,0 +1,817 @@
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From e1172d70d3a3eb4f174c73503202d6351a16608d Mon Sep 17 00:00:00 2001
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From: Simon Shields <simon@lineageos.org>
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Date: Thu, 16 Nov 2017 22:29:35 +1100
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Subject: [PATCH 09/13] drm: panel: add S6EVR02 panel driver
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Gamma table values have been dumped from vendor kernel based on
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Linux 3.0.
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[ bring up to 5.17.4 and squash with backlight addition patch ]
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Signed-off-by: Jack Knightly <J__A__K@hotmail.com>
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---
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drivers/gpu/drm/panel/Kconfig | 6 +
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drivers/gpu/drm/panel/Makefile | 1 +
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drivers/gpu/drm/panel/panel-samsung-s6evr02.c | 762 ++++++++++++++++++
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3 files changed, 769 insertions(+)
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create mode 100644 drivers/gpu/drm/panel/panel-samsung-s6evr02.c
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diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
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index a582ddd583c2..5ae25fe5bbb9 100644
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--- a/drivers/gpu/drm/panel/Kconfig
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+++ b/drivers/gpu/drm/panel/Kconfig
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@@ -537,6 +537,12 @@ config DRM_PANEL_SAMSUNG_S6E8AA0
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select DRM_MIPI_DSI
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select VIDEOMODE_HELPERS
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+config DRM_PANEL_SAMSUNG_S6EVR02
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+ tristate "Samsung S6EVR02 DSI video mode panel"
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+ depends on OF
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+ select DRM_MIPI_DSI
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+ select VIDEOMODE_HELPERS
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+
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config DRM_PANEL_SAMSUNG_SOFEF00
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tristate "Samsung sofef00/s6e3fc2x01 OnePlus 6/6T DSI cmd mode panels"
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depends on OF
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diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
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index 34e717382dbb..b3d149475a38 100644
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--- a/drivers/gpu/drm/panel/Makefile
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+++ b/drivers/gpu/drm/panel/Makefile
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@@ -54,6 +54,7 @@ obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_SPI) += panel-samsung-s6e63m0-spi.o
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obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI) += panel-samsung-s6e63m0-dsi.o
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obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01) += panel-samsung-s6e88a0-ams452ef01.o
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obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0) += panel-samsung-s6e8aa0.o
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+obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6EVR02) += panel-samsung-s6evr02.o
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obj-$(CONFIG_DRM_PANEL_SAMSUNG_SOFEF00) += panel-samsung-sofef00.o
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obj-$(CONFIG_DRM_PANEL_SEIKO_43WVF1G) += panel-seiko-43wvf1g.o
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obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o
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diff --git a/drivers/gpu/drm/panel/panel-samsung-s6evr02.c b/drivers/gpu/drm/panel/panel-samsung-s6evr02.c
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new file mode 100644
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index 000000000000..037b4364cdd4
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--- /dev/null
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+++ b/drivers/gpu/drm/panel/panel-samsung-s6evr02.c
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@@ -0,0 +1,762 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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+/*
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+ * MIPI-DSI based S6EVR02 AMOLED LCD 5.5 inch panel driver.
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+ *
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+ * Copyright (c) 2017 Simon Shields, <simon@lineageos.org>
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+ *
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+ * Based on the s6e8aa0 panel driver,
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+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
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+ *
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+ * Inki Dae, <inki.dae@samsung.com>
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+ * Donghwa Lee, <dh09.lee@samsung.com>
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+ * Joongmock Shin <jmock.shin@samsung.com>
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+ * Eunchul Kim <chulspro.kim@samsung.com>
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+ * Tomasz Figa <t.figa@samsung.com>
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+ * Andrzej Hajda <a.hajda@samsung.com>
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+*/
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+
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+#include <linux/delay.h>
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+#include <linux/gpio/consumer.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/regulator/consumer.h>
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+
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+#include <linux/backlight.h>
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+#include <video/mipi_display.h>
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+#include <video/of_videomode.h>
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+#include <video/videomode.h>
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+
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+#include <drm/drm_mipi_dsi.h>
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+#include <drm/drm_modes.h>
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+#include <drm/drm_panel.h>
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+
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+#define UB_VERSION 0x10
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+
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+#define LDI_MTP_LENGTH 24
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+#define GAMMA_LEVEL_NUM 33
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+#define GAMMA_TABLE_LEN 34
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+
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+typedef u8 s6evr02_gamma_table[GAMMA_TABLE_LEN];
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+
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+#define S6EVR02_STATE_BIT_ENABLED 0
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+
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+struct s6evr02 {
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+ struct device *dev;
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+ struct drm_panel panel;
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+
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+ struct regulator_bulk_data supplies[2];
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+ struct gpio_desc *reset_gpio;
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+ u32 power_on_delay;
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+ u32 reset_delay;
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+ u32 init_delay;
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+ struct videomode vm;
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+ u32 width_mm;
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+ u32 height_mm;
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+
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+ unsigned long state;
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+ u8 version;
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+ u8 id;
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+ int brightness;
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+
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+ /* This field is tested by functions directly accessing DSI bus before
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+ * transfer, transfer is skipped if it is set. In case of transfer
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+ * failure or unexpected response the field is set to error value.
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+ * Such construct allows to eliminate many checks in higher level
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+ * functions.
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+ */
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+ int error;
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+};
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+
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+static const s6evr02_gamma_table s6evr02_gamma_tables[GAMMA_LEVEL_NUM] = {
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+ {
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+ /* 20cd */
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+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x86, 0x87, 0x87,
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+ 0x86, 0x86, 0x85, 0x88, 0x8a, 0x88, 0x86, 0x85, 0x88, 0x75,
|
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+ 0x63, 0x83, 0x63, 0x60, 0x7d, 0x78, 0x85, 0xb8, 0x33, 0x3f,
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+ 0x2c, 0x02, 0x03, 0x02
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+ }, {
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+ /* 30cd */
|
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+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x86, 0x87, 0x87,
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+ 0x86, 0x85, 0x84, 0x88, 0x8a, 0x87, 0x85, 0x84, 0x87, 0x80,
|
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+ 0x76, 0x85, 0x68, 0x60, 0x76, 0x78, 0x85, 0xb0, 0x33, 0x3f,
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+ 0x2c, 0x02, 0x03, 0x02
|
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+ }, {
|
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+ /* 40cd */
|
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+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x85, 0x86, 0x87,
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+ 0x86, 0x86, 0x85, 0x87, 0x88, 0x86, 0x86, 0x85, 0x89, 0x80,
|
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+ 0x80, 0x83, 0x6a, 0x5c, 0x71, 0x77, 0x81, 0xaa, 0x37, 0x45,
|
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+ 0x2f, 0x02, 0x03, 0x02
|
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+ }, {
|
||||
+ /* 50cd */
|
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+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x85, 0x86, 0x87,
|
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+ 0x85, 0x85, 0x84, 0x88, 0x89, 0x87, 0x84, 0x82, 0x86, 0x83,
|
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+ 0x84, 0x85, 0x6f, 0x63, 0x71, 0x7d, 0x81, 0xa5, 0x37, 0x45,
|
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+ 0x2f, 0x02, 0x03, 0x02
|
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+ }, {
|
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+ /* 60cd */
|
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+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x85, 0x86, 0x87,
|
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+ 0x85, 0x85, 0x84, 0x86, 0x88, 0x85, 0x83, 0x81, 0x85, 0x81,
|
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+ 0x80, 0x83, 0x77, 0x69, 0x76, 0x7f, 0x81, 0xa0, 0x37, 0x45,
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+ 0x2f, 0x02, 0x03, 0x02
|
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+ }, {
|
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+ /* 70cd */
|
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+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
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+ 0x85, 0x85, 0x84, 0x87, 0x89, 0x87, 0x83, 0x81, 0x85, 0x81,
|
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+ 0x80, 0x83, 0x71, 0x64, 0x6f, 0x89, 0x88, 0xa3, 0x37, 0x45,
|
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+ 0x2f, 0x02, 0x03, 0x02
|
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+ }, {
|
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+ /* 80cd */
|
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+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
|
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+ 0x85, 0x85, 0x84, 0x86, 0x87, 0x85, 0x84, 0x82, 0x87, 0x81,
|
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+ 0x80, 0x83, 0x73, 0x66, 0x6f, 0x8a, 0x88, 0xa0, 0x37, 0x45,
|
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+ 0x2f, 0x02, 0x03, 0x02
|
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+ }, {
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+ /* 90cd */
|
||||
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
|
||||
+ 0x85, 0x85, 0x84, 0x86, 0x87, 0x85, 0x81, 0x7f, 0x85, 0x7e,
|
||||
+ 0x7c, 0x80, 0x7a, 0x6d, 0x75, 0x8b, 0x88, 0x9e, 0x37, 0x45,
|
||||
+ 0x2f, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 100cd */
|
||||
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
|
||||
+ 0x84, 0x83, 0x83, 0x87, 0x88, 0x86, 0x81, 0x7f, 0x85, 0x7e,
|
||||
+ 0x7c, 0x80, 0x7a, 0x70, 0x75, 0x86, 0x7d, 0x98, 0x3b, 0x4b,
|
||||
+ 0x33, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 102cd */
|
||||
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
|
||||
+ 0x85, 0x85, 0x84, 0x86, 0x87, 0x85, 0x81, 0x7f, 0x85, 0x7e,
|
||||
+ 0x7c, 0x80, 0x7a, 0x70, 0x75, 0x94, 0x93, 0xa1, 0x33, 0x3f,
|
||||
+ 0x2c, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 104cd */
|
||||
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
|
||||
+ 0x85, 0x85, 0x84, 0x86, 0x87, 0x85, 0x84, 0x82, 0x87, 0x81,
|
||||
+ 0x80, 0x83, 0x74, 0x6a, 0x6f, 0x94, 0x92, 0xa7, 0x33, 0x3f,
|
||||
+ 0x2c, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 106cd */
|
||||
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
|
||||
+ 0x85, 0x85, 0x84, 0x87, 0x89, 0x87, 0x83, 0x81, 0x85, 0x81,
|
||||
+ 0x80, 0x83, 0x74, 0x6a, 0x6f, 0x95, 0x92, 0x9d, 0x33, 0x3f,
|
||||
+ 0x2c, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 108cd */
|
||||
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x85, 0x86, 0x87,
|
||||
+ 0x84, 0x84, 0x83, 0x87, 0x89, 0x87, 0x83, 0x81, 0x85, 0x81,
|
||||
+ 0x80, 0x83, 0x74, 0x6a, 0x6f, 0x95, 0x91, 0x9d, 0x33, 0x3f,
|
||||
+ 0x2c, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 110cd */
|
||||
+ 0xca, 0x00, 0xd8, 0x00, 0xd4, 0x00, 0xd3, 0x82, 0x84, 0x85,
|
||||
+ 0x82, 0x82, 0x81, 0x84, 0x85, 0x84, 0x82, 0x80, 0x83, 0x81,
|
||||
+ 0x82, 0x83, 0x7b, 0x75, 0x78, 0x85, 0x80, 0x8e, 0x2f, 0x39,
|
||||
+ 0x29, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 120cd */
|
||||
+ 0xca, 0x00, 0xdf, 0x00, 0xdb, 0x00, 0xda, 0x82, 0x83, 0x84,
|
||||
+ 0x81, 0x81, 0x80, 0x83, 0x83, 0x82, 0x82, 0x81, 0x83, 0x80,
|
||||
+ 0x80, 0x82, 0x7e, 0x7a, 0x7b, 0x86, 0x83, 0x8d, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 130cd */
|
||||
+ 0xca, 0x00, 0xe4, 0x00, 0xe0, 0x00, 0xe0, 0x82, 0x83, 0x84,
|
||||
+ 0x81, 0x80, 0x7f, 0x82, 0x82, 0x81, 0x83, 0x82, 0x84, 0x7e,
|
||||
+ 0x7f, 0x80, 0x7b, 0x76, 0x79, 0x86, 0x83, 0x8d, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 140cd */
|
||||
+ 0xca, 0x00, 0xe8, 0x00, 0xe5, 0x00, 0xe5, 0x81, 0x82, 0x82,
|
||||
+ 0x80, 0x80, 0x7f, 0x82, 0x82, 0x82, 0x81, 0x80, 0x82, 0x7f,
|
||||
+ 0x7f, 0x81, 0x7e, 0x7a, 0x7c, 0x81, 0x7d, 0x88, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 150cd */
|
||||
+ 0xca, 0x00, 0xec, 0x00, 0xea, 0x00, 0xe9, 0x81, 0x82, 0x82,
|
||||
+ 0x80, 0x80, 0x7f, 0x81, 0x82, 0x81, 0x81, 0x80, 0x81, 0x80,
|
||||
+ 0x80, 0x81, 0x7a, 0x77, 0x79, 0x87, 0x86, 0x8d, 0x84, 0x86,
|
||||
+ 0x83, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 160cd */
|
||||
+ 0xca, 0x00, 0xf1, 0x00, 0xef, 0x00, 0xef, 0x80, 0x80, 0x81,
|
||||
+ 0x80, 0x80, 0x7f, 0x80, 0x81, 0x80, 0x82, 0x81, 0x82, 0x7f,
|
||||
+ 0x7f, 0x7f, 0x7d, 0x7b, 0x7c, 0x82, 0x80, 0x88, 0x84, 0x86,
|
||||
+ 0x83, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 170cd */
|
||||
+ 0xca, 0x00, 0xf5, 0x00, 0xf3, 0x00, 0xf3, 0x80, 0x80, 0x81,
|
||||
+ 0x7f, 0x7f, 0x7f, 0x82, 0x82, 0x82, 0x80, 0x80, 0x80, 0x80,
|
||||
+ 0x80, 0x80, 0x80, 0x7f, 0x7f, 0x7d, 0x7b, 0x83, 0x84, 0x86,
|
||||
+ 0x83, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 180cd */
|
||||
+ 0xca, 0x00, 0xf9, 0x00, 0xf8, 0x00, 0xf8, 0x80, 0x80, 0x80,
|
||||
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x80, 0x81, 0x80, 0x81, 0x81,
|
||||
+ 0x81, 0x81, 0x7d, 0x7c, 0x7d, 0x83, 0x83, 0x87, 0x7f, 0x7f,
|
||||
+ 0x7f, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 182cd */
|
||||
+ 0xca, 0x00, 0xf2, 0x00, 0xf1, 0x00, 0xf0, 0x80, 0x81, 0x81,
|
||||
+ 0x80, 0x7f, 0x7f, 0x81, 0x81, 0x81, 0x81, 0x80, 0x81, 0x7f,
|
||||
+ 0x7f, 0x7f, 0x7d, 0x7b, 0x7c, 0x83, 0x81, 0x87, 0x84, 0x86,
|
||||
+ 0x83, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 184cd */
|
||||
+ 0xca, 0x00, 0xec, 0x00, 0xea, 0x00, 0xe9, 0x81, 0x82, 0x82,
|
||||
+ 0x7f, 0x7f, 0x7f, 0x81, 0x81, 0x81, 0x82, 0x81, 0x83, 0x7d,
|
||||
+ 0x7d, 0x7f, 0x7e, 0x7a, 0x7c, 0x82, 0x7f, 0x86, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 186cd */
|
||||
+ 0xca, 0x00, 0xe8, 0x00, 0xe4, 0x00, 0xe4, 0x81, 0x82, 0x83,
|
||||
+ 0x80, 0x80, 0x7f, 0x82, 0x82, 0x81, 0x80, 0x80, 0x81, 0x7e,
|
||||
+ 0x7f, 0x80, 0x7b, 0x76, 0x79, 0x87, 0x85, 0x8a, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 188cd */
|
||||
+ 0xca, 0x00, 0xe4, 0x00, 0xe0, 0x00, 0xe0, 0x81, 0x82, 0x83,
|
||||
+ 0x80, 0x80, 0x7f, 0x81, 0x82, 0x81, 0x80, 0x7f, 0x82, 0x80,
|
||||
+ 0x80, 0x82, 0x78, 0x72, 0x75, 0x8c, 0x8b, 0x90, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 190cd */
|
||||
+ 0xca, 0x00, 0xde, 0x00, 0xda, 0x00, 0xda, 0x81, 0x82, 0x83,
|
||||
+ 0x81, 0x81, 0x80, 0x83, 0x84, 0x82, 0x81, 0x80, 0x83, 0x7f,
|
||||
+ 0x7f, 0x81, 0x7b, 0x75, 0x78, 0x86, 0x82, 0x8b, 0x2f, 0x39,
|
||||
+ 0x29, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 200cd */
|
||||
+ 0xca, 0x00, 0xe3, 0x00, 0xdf, 0x00, 0xdf, 0x81, 0x82, 0x83,
|
||||
+ 0x80, 0x80, 0x7f, 0x81, 0x82, 0x81, 0x82, 0x81, 0x83, 0x80,
|
||||
+ 0x80, 0x82, 0x78, 0x72, 0x75, 0x86, 0x82, 0x8b, 0x2f, 0x39,
|
||||
+ 0x29, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 210cd */
|
||||
+ 0xca, 0x00, 0xe6, 0x00, 0xe3, 0x00, 0xe3, 0x81, 0x82, 0x82,
|
||||
+ 0x80, 0x7f, 0x7f, 0x81, 0x81, 0x81, 0x81, 0x80, 0x82, 0x7d,
|
||||
+ 0x7e, 0x7f, 0x7e, 0x7a, 0x7b, 0x87, 0x85, 0x8a, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 220cd */
|
||||
+ 0xca, 0x00, 0xea, 0x00, 0xe7, 0x00, 0xe6, 0x80, 0x80, 0x81,
|
||||
+ 0x80, 0x80, 0x7f, 0x81, 0x81, 0x81, 0x80, 0x80, 0x81, 0x7e,
|
||||
+ 0x7f, 0x80, 0x7b, 0x76, 0x79, 0x87, 0x85, 0x8a, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 230cd */
|
||||
+ 0xca, 0x00, 0xec, 0x00, 0xea, 0x00, 0xe9, 0x80, 0x81, 0x82,
|
||||
+ 0x7f, 0x7f, 0x7f, 0x80, 0x81, 0x80, 0x81, 0x80, 0x82, 0x7f,
|
||||
+ 0x7f, 0x81, 0x78, 0x73, 0x76, 0x87, 0x85, 0x8a, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 240cd */
|
||||
+ 0xca, 0x00, 0xef, 0x00, 0xed, 0x00, 0xed, 0x80, 0x80, 0x81,
|
||||
+ 0x80, 0x7f, 0x7f, 0x80, 0x81, 0x80, 0x7e, 0x7e, 0x7f, 0x7f,
|
||||
+ 0x7f, 0x81, 0x7e, 0x7a, 0x7c, 0x82, 0x7f, 0x85, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 250cd */
|
||||
+ 0xca, 0x00, 0xf2, 0x00, 0xf1, 0x00, 0xf0, 0x80, 0x80, 0x81,
|
||||
+ 0x7e, 0x7e, 0x7e, 0x80, 0x80, 0x80, 0x7f, 0x7f, 0x80, 0x80,
|
||||
+ 0x80, 0x81, 0x7a, 0x77, 0x79, 0x82, 0x7f, 0x85, 0x2b, 0x34,
|
||||
+ 0x27, 0x02, 0x03, 0x02
|
||||
+ }, {
|
||||
+ /* 300cd */
|
||||
+ 0xca, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x80, 0x7f, 0x7f,
|
||||
+ 0x7e, 0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x7f, 0x7f,
|
||||
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x7f, 0x7f, 0x7f,
|
||||
+ 0x7f, 0x02, 0x03, 0x02
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static inline struct s6evr02 *panel_to_s6evr02(struct drm_panel *panel)
|
||||
+{
|
||||
+ return container_of(panel, struct s6evr02, panel);
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_clear_error(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ int ret = ctx->error;
|
||||
+
|
||||
+ ctx->error = 0;
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_dcs_write(struct s6evr02 *ctx, const void *data, size_t len)
|
||||
+{
|
||||
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
|
||||
+ ssize_t ret;
|
||||
+
|
||||
+ if (ctx->error < 0)
|
||||
+ return;
|
||||
+
|
||||
+ ret = mipi_dsi_dcs_write_buffer(dsi, data, len);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(ctx->dev, "error %zd writing dcs seq: %*ph\n", ret,
|
||||
+ (int)len, data);
|
||||
+ ctx->error = ret;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_read(struct s6evr02 *ctx, u8 cmd, void *data, size_t len)
|
||||
+{
|
||||
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
|
||||
+ int ret;
|
||||
+
|
||||
+ if (ctx->error < 0)
|
||||
+ return ctx->error;
|
||||
+
|
||||
+ ret = mipi_dsi_generic_read(dsi, &cmd, 1, data, len);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(ctx->dev, "error %d reading dcs seq(%#x)\n", ret, cmd);
|
||||
+ ctx->error = ret;
|
||||
+ }
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+#define s6evr02_dcs_write_seq_static(ctx, seq...) \
|
||||
+({\
|
||||
+ static const u8 d[] = { seq };\
|
||||
+ s6evr02_dcs_write(ctx, d, ARRAY_SIZE(d));\
|
||||
+})
|
||||
+
|
||||
+static void s6evr02_apply_level_2_key(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_dcs_write_seq_static(ctx, 0xf0, 0x5a, 0x5a);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_etc_elvss_control(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_dcs_write_seq_static(ctx, 0xb6, 0x08, 0x07);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_aid_set(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ u8 aid_cmd[] = {
|
||||
+ 0x51, 0xff, 0x00,
|
||||
+ };
|
||||
+
|
||||
+ const u8 aid_arg[GAMMA_LEVEL_NUM] = {
|
||||
+ 0x28, 0x3c, 0x51, 0x66, 0x7d, 0x93, 0xab, 0xc2, /* 20-90cd */
|
||||
+ 0xda, 0xcd, 0xc0, 0xb3, 0xa6, 0x99, 0x99, 0x99, /* 100-130cd */
|
||||
+ 0x99, 0x99, 0x99, 0x99, 0x99, 0xad, 0xc2, 0xd6, /* 140-186cd */
|
||||
+ 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 188-250cd */
|
||||
+ 0xff, /* 300cd */
|
||||
+ };
|
||||
+
|
||||
+ if (ctx->error)
|
||||
+ return;
|
||||
+
|
||||
+ aid_cmd[2] = aid_arg[ctx->brightness];
|
||||
+
|
||||
+ s6evr02_dcs_write(ctx, aid_cmd, ARRAY_SIZE(aid_cmd));
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_acl_set(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ u8 acl_seq[] = {0x55, 0x02, 0x00};
|
||||
+ if (ctx->error)
|
||||
+ return;
|
||||
+
|
||||
+ switch (ctx->brightness) {
|
||||
+ case 0:
|
||||
+ acl_seq[1] = 0x00;
|
||||
+ break;
|
||||
+ case 1:
|
||||
+ acl_seq[1] = 0x01;
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ s6evr02_dcs_write(ctx, acl_seq, ARRAY_SIZE(acl_seq));
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_elvss_set(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ u8 elvss_cmd[] = {
|
||||
+ 0xb6, 0x08, 0x00,
|
||||
+ };
|
||||
+
|
||||
+ const u8 elvss_arg[GAMMA_LEVEL_NUM] = {
|
||||
+ 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1f, 0x1e, 0x1c, /* 20-100cd */
|
||||
+ 0x1c, 0x1c, 0x1c, 0x1c, 0x1b, 0x19, 0x17, 0x16, /* 102-140cd */
|
||||
+ 0x14, 0x12, 0x10, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, /* 150-188cd */
|
||||
+ 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x10, 0x0b, /* 190-300cd */
|
||||
+ };
|
||||
+
|
||||
+ if (ctx->error)
|
||||
+ return;
|
||||
+
|
||||
+ elvss_cmd[2] = elvss_arg[ctx->brightness];
|
||||
+
|
||||
+ s6evr02_dcs_write(ctx, elvss_cmd, ARRAY_SIZE(elvss_cmd));
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static void s6evr02_brightness_set(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ const u8 *gamma;
|
||||
+
|
||||
+ if (ctx->error)
|
||||
+ return;
|
||||
+
|
||||
+ gamma = s6evr02_gamma_tables[ctx->brightness];
|
||||
+
|
||||
+ s6evr02_dcs_write(ctx, gamma, GAMMA_TABLE_LEN);
|
||||
+
|
||||
+ /* apply gamma table update. */
|
||||
+ s6evr02_dcs_write_seq_static(ctx, 0xf7, 0x03, 0x00);
|
||||
+
|
||||
+ s6evr02_aid_set(ctx);
|
||||
+ s6evr02_acl_set(ctx);
|
||||
+ s6evr02_elvss_set(ctx);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_gamma_cond_set(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_dcs_write_seq_static(ctx,
|
||||
+ 0xca, 0x01, 0x27, 0x01, 0x3d, 0x01, 0x47, 0xd1, 0xd7, 0xd1,
|
||||
+ 0xca, 0xce, 0xcc, 0xc4, 0xb3, 0xb1, 0xa1, 0xb9, 0xb8, 0xa2,
|
||||
+ 0xce, 0xba, 0xc8, 0xc9, 0xad, 0x9b, 0x85, 0x53, 0x6a, 0x7e,
|
||||
+ 0xe3, 0x09, 0x09, 0x0b);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_gamma_update(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_dcs_write_seq_static(ctx, 0xf7, 0x03, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_brightness_control_on(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_dcs_write_seq_static(ctx, 0x53, 0x20, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_aor_control(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_dcs_write_seq_static(ctx, 0x51, 0xff, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_acl_off(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_dcs_write_seq_static(ctx, 0x55, 0x00, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_panel_init(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_apply_level_2_key(ctx);
|
||||
+ s6evr02_dcs_write_seq_static(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
|
||||
+ msleep(20);
|
||||
+
|
||||
+ if (ctx->version == UB_VERSION) {
|
||||
+ s6evr02_gamma_cond_set(ctx);
|
||||
+ s6evr02_gamma_update(ctx);
|
||||
+ }
|
||||
+
|
||||
+ s6evr02_brightness_control_on(ctx);
|
||||
+ s6evr02_aor_control(ctx);
|
||||
+ s6evr02_etc_elvss_control(ctx);
|
||||
+ s6evr02_acl_off(ctx);
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_set_maximum_return_packet_size(struct s6evr02 *ctx,
|
||||
+ u16 size)
|
||||
+{
|
||||
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
|
||||
+ int ret;
|
||||
+
|
||||
+ if (ctx->error < 0)
|
||||
+ return;
|
||||
+
|
||||
+ ret = mipi_dsi_set_maximum_return_packet_size(dsi, size);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(ctx->dev,
|
||||
+ "error %d setting maximum return packet size to %d\n",
|
||||
+ ret, size);
|
||||
+ ctx->error = ret;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_read_mtp_id(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ u8 id[3] = {0, 0, 0};
|
||||
+ int ret;
|
||||
+
|
||||
+ /* the panel seems not to respond properly
|
||||
+ * to read commands until we write something to it
|
||||
+ */
|
||||
+ s6evr02_apply_level_2_key(ctx);
|
||||
+
|
||||
+ ret = s6evr02_read(ctx, 0xd7, id, ARRAY_SIZE(id));
|
||||
+ if (ret < 0 || ret < ARRAY_SIZE(id) || id[0] == 0x00) {
|
||||
+ dev_err(ctx->dev, "failed to read ID from panel\n");
|
||||
+ ctx->error = -EIO;
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ dev_info(ctx->dev, "ID: 0x%2x, 0x%2x, 0x%2x\n", id[0], id[1], id[2]);
|
||||
+
|
||||
+ ctx->version = id[1];
|
||||
+ ctx->id = id[2];
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_set_sequence(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ s6evr02_set_maximum_return_packet_size(ctx, 3);
|
||||
+ s6evr02_read_mtp_id(ctx);
|
||||
+ s6evr02_panel_init(ctx);
|
||||
+ s6evr02_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_power_on(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ msleep(ctx->power_on_delay);
|
||||
+
|
||||
+ gpiod_set_value(ctx->reset_gpio, 0);
|
||||
+ usleep_range(5000, 6000);
|
||||
+ gpiod_set_value(ctx->reset_gpio, 1);
|
||||
+ usleep_range(5000, 6000);
|
||||
+
|
||||
+ msleep(ctx->reset_delay);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_power_off(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_disable(struct drm_panel *panel)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_unprepare(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct s6evr02 *ctx = panel_to_s6evr02(panel);
|
||||
+
|
||||
+ clear_bit(S6EVR02_STATE_BIT_ENABLED, &ctx->state);
|
||||
+ s6evr02_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_OFF);
|
||||
+ s6evr02_dcs_write_seq_static(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
|
||||
+ msleep(40);
|
||||
+
|
||||
+ s6evr02_clear_error(ctx);
|
||||
+
|
||||
+ return s6evr02_power_off(ctx);
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_prepare(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct s6evr02 *ctx = panel_to_s6evr02(panel);
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = s6evr02_power_on(ctx);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ s6evr02_set_sequence(ctx);
|
||||
+ ret = ctx->error;
|
||||
+
|
||||
+ if (ret < 0)
|
||||
+ s6evr02_unprepare(panel);
|
||||
+ else
|
||||
+ set_bit(S6EVR02_STATE_BIT_ENABLED, &ctx->state);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_enable(struct drm_panel *panel)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_get_modes(struct drm_panel *panel,
|
||||
+ struct drm_connector *connector)
|
||||
+{
|
||||
+ struct s6evr02 *ctx = panel_to_s6evr02(panel);
|
||||
+ struct drm_display_mode *mode;
|
||||
+
|
||||
+ mode = drm_mode_create(connector->dev);
|
||||
+ if (!mode) {
|
||||
+ dev_err(panel->dev, "failed to create a new display mode\n");
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ drm_display_mode_from_videomode(&ctx->vm, mode);
|
||||
+ mode->width_mm = ctx->width_mm;
|
||||
+ mode->height_mm = ctx->height_mm;
|
||||
+ connector->display_info.width_mm = mode->width_mm;
|
||||
+ connector->display_info.height_mm = mode->height_mm;
|
||||
+
|
||||
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
||||
+ drm_mode_probed_add(connector, mode);
|
||||
+
|
||||
+ return 1;
|
||||
+}
|
||||
+
|
||||
+static const struct drm_panel_funcs s6evr02_drm_funcs = {
|
||||
+ .disable = s6evr02_disable,
|
||||
+ .unprepare = s6evr02_unprepare,
|
||||
+ .prepare = s6evr02_prepare,
|
||||
+ .enable = s6evr02_enable,
|
||||
+ .get_modes = s6evr02_get_modes,
|
||||
+};
|
||||
+
|
||||
+static int s6evr02_get_brightness(struct backlight_device *bd)
|
||||
+{
|
||||
+ return bd->props.brightness;
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_set_brightness(struct backlight_device *bd)
|
||||
+{
|
||||
+ struct s6evr02 *ctx = bl_get_data(bd);
|
||||
+
|
||||
+ bd->props.power = FB_BLANK_UNBLANK;
|
||||
+ if (ctx->brightness != bd->props.brightness) {
|
||||
+ ctx->brightness = bd->props.brightness;
|
||||
+ if (test_bit(S6EVR02_STATE_BIT_ENABLED, &ctx->state))
|
||||
+ s6evr02_brightness_set(ctx);
|
||||
+ }
|
||||
+
|
||||
+ return s6evr02_clear_error(ctx);
|
||||
+}
|
||||
+
|
||||
+static const struct backlight_ops s6evr02_backlight_ops = {
|
||||
+ .get_brightness = s6evr02_get_brightness,
|
||||
+ .update_status = s6evr02_set_brightness,
|
||||
+};
|
||||
+
|
||||
+static void s6evr02_backlight_register(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ struct backlight_properties props = {
|
||||
+ .type = BACKLIGHT_RAW,
|
||||
+ .brightness = ctx->brightness,
|
||||
+ .max_brightness = GAMMA_LEVEL_NUM - 1
|
||||
+ };
|
||||
+ struct device *dev = ctx->dev;
|
||||
+ struct backlight_device *bd;
|
||||
+
|
||||
+ bd = devm_backlight_device_register(dev, "panel", dev, ctx,
|
||||
+ &s6evr02_backlight_ops, &props);
|
||||
+ if (IS_ERR(bd))
|
||||
+ dev_err(dev, "error registering backlight device (%ld)\n",
|
||||
+ PTR_ERR(bd));
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_parse_dt(struct s6evr02 *ctx)
|
||||
+{
|
||||
+ struct device *dev = ctx->dev;
|
||||
+ struct device_node *np = dev->of_node;
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = of_get_videomode(np, &ctx->vm, 0);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ of_property_read_u32(np, "power-on-delay", &ctx->power_on_delay);
|
||||
+ of_property_read_u32(np, "reset-delay", &ctx->reset_delay);
|
||||
+ of_property_read_u32(np, "init-delay", &ctx->init_delay);
|
||||
+ of_property_read_u32(np, "panel-width-mm", &ctx->width_mm);
|
||||
+ of_property_read_u32(np, "panel-height-mm", &ctx->height_mm);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int s6evr02_probe(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ struct device *dev = &dsi->dev;
|
||||
+ struct s6evr02 *ctx;
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ ctx = devm_kzalloc(dev, sizeof(struct s6evr02), GFP_KERNEL);
|
||||
+ if (!ctx)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ pr_err("s6evr02 probing\n");
|
||||
+
|
||||
+ mipi_dsi_set_drvdata(dsi, ctx);
|
||||
+
|
||||
+ ctx->dev = dev;
|
||||
+
|
||||
+ dsi->lanes = 4;
|
||||
+ dsi->format = MIPI_DSI_FMT_RGB888;
|
||||
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST
|
||||
+ | MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP
|
||||
+ | MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET
|
||||
+ | MIPI_DSI_MODE_VSYNC_FLUSH | MIPI_DSI_MODE_VIDEO_AUTO_VERT;
|
||||
+
|
||||
+ ret = s6evr02_parse_dt(ctx);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ ctx->supplies[0].supply = "vdd3";
|
||||
+ ctx->supplies[1].supply = "vci";
|
||||
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
|
||||
+ ctx->supplies);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "failed to get regulators: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
|
||||
+ if (IS_ERR(ctx->reset_gpio)) {
|
||||
+ dev_err(dev, "cannot get reset-gpios %ld\n",
|
||||
+ PTR_ERR(ctx->reset_gpio));
|
||||
+ return PTR_ERR(ctx->reset_gpio);
|
||||
+ }
|
||||
+
|
||||
+ ctx->brightness = GAMMA_LEVEL_NUM - 1;
|
||||
+
|
||||
+ drm_panel_init(&ctx->panel, dev, &s6evr02_drm_funcs,
|
||||
+ DRM_MODE_CONNECTOR_DSI);
|
||||
+
|
||||
+ drm_panel_add(&ctx->panel);
|
||||
+
|
||||
+ ret = mipi_dsi_attach(dsi);
|
||||
+ if (ret < 0)
|
||||
+ drm_panel_remove(&ctx->panel);
|
||||
+
|
||||
+ s6evr02_backlight_register(ctx);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void s6evr02_remove(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ struct s6evr02 *ctx = mipi_dsi_get_drvdata(dsi);
|
||||
+
|
||||
+ mipi_dsi_detach(dsi);
|
||||
+ drm_panel_remove(&ctx->panel);
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id s6evr02_of_match[] = {
|
||||
+ { .compatible = "samsung,s6evr02" },
|
||||
+ { }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, s6evr02_of_match);
|
||||
+
|
||||
+static struct mipi_dsi_driver s6evr02_driver = {
|
||||
+ .probe = s6evr02_probe,
|
||||
+ .remove = s6evr02_remove,
|
||||
+ .driver = {
|
||||
+ .name = "panel-samsung-s6evr02",
|
||||
+ .of_match_table = s6evr02_of_match,
|
||||
+ },
|
||||
+};
|
||||
+module_mipi_dsi_driver(s6evr02_driver);
|
||||
+
|
||||
+MODULE_AUTHOR("Simon Shields <simon@lineageos.org>");
|
||||
+MODULE_AUTHOR("Donghwa Lee <dh09.lee@samsung.com>");
|
||||
+MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
|
||||
+MODULE_AUTHOR("Joongmock Shin <jmock.shin@samsung.com>");
|
||||
+MODULE_AUTHOR("Eunchul Kim <chulspro.kim@samsung.com>");
|
||||
+MODULE_AUTHOR("Tomasz Figa <t.figa@samsung.com>");
|
||||
+MODULE_AUTHOR("Andrzej Hajda <a.hajda@samsung.com>");
|
||||
+MODULE_DESCRIPTION("MIPI-DSI based s6evr02 AMOLED LCD Panel Driver");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
--
|
||||
2.30.2
|
||||
|
||||
|
|
@ -0,0 +1,867 @@
|
|||
From 04c8e3ad2d3d287cfdd945c83dc81719cc0aca73 Mon Sep 17 00:00:00 2001
|
||||
From: Simon Shields <simon@lineageos.org>
|
||||
Date: Thu, 16 Nov 2017 22:28:23 +1100
|
||||
Subject: [PATCH 10/13] drm: panel: add Magnachip EA8061 5.5" AMOLED panel
|
||||
driver
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Gamma table values have been dumped from vendor kernel based on
|
||||
Linux 3.0.
|
||||
|
||||
[ bring up to 6.1 and squash with backlight addition patch ]
|
||||
Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
|
||||
---
|
||||
drivers/gpu/drm/panel/Kconfig | 6 +
|
||||
drivers/gpu/drm/panel/Makefile | 1 +
|
||||
.../gpu/drm/panel/panel-magnachip-ea8061.c | 808 ++++++++++++++++++
|
||||
3 files changed, 815 insertions(+)
|
||||
create mode 100644 drivers/gpu/drm/panel/panel-magnachip-ea8061.c
|
||||
|
||||
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
|
||||
index 5ae25fe5bbb9..f80c48c6ac4e 100644
|
||||
--- a/drivers/gpu/drm/panel/Kconfig
|
||||
+++ b/drivers/gpu/drm/panel/Kconfig
|
||||
@@ -357,6 +357,12 @@ config DRM_PANEL_NOVATEK_NT39016
|
||||
Say Y here if you want to enable support for the panels built
|
||||
around the Novatek NT39016 display controller.
|
||||
|
||||
+config DRM_PANEL_MAGNACHIP_EA8061
|
||||
+ tristate "Magnachip EA8061 DSI video mode panel"
|
||||
+ depends on OF
|
||||
+ select DRM_MIPI_DSI
|
||||
+ select VIDEOMODE_HELPERS
|
||||
+
|
||||
config DRM_PANEL_MANTIX_MLAF057WE51
|
||||
tristate "Mantix MLAF057WE51-X MIPI-DSI LCD panel"
|
||||
depends on OF
|
||||
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
|
||||
index b3d149475a38..2d6183d8cc9a 100644
|
||||
--- a/drivers/gpu/drm/panel/Makefile
|
||||
+++ b/drivers/gpu/drm/panel/Makefile
|
||||
@@ -33,6 +33,7 @@ obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o
|
||||
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o
|
||||
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o
|
||||
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT39016) += panel-novatek-nt39016.o
|
||||
+obj-$(CONFIG_DRM_PANEL_MAGNACHIP_EA8061) += panel-magnachip-ea8061.o
|
||||
obj-$(CONFIG_DRM_PANEL_MANTIX_MLAF057WE51) += panel-mantix-mlaf057we51.o
|
||||
obj-$(CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO) += panel-olimex-lcd-olinuxino.o
|
||||
obj-$(CONFIG_DRM_PANEL_ORISETECH_OTM8009A) += panel-orisetech-otm8009a.o
|
||||
diff --git a/drivers/gpu/drm/panel/panel-magnachip-ea8061.c b/drivers/gpu/drm/panel/panel-magnachip-ea8061.c
|
||||
new file mode 100644
|
||||
index 000000000000..ee105606907b
|
||||
--- /dev/null
|
||||
+++ b/drivers/gpu/drm/panel/panel-magnachip-ea8061.c
|
||||
@@ -0,0 +1,808 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0-only
|
||||
+/*
|
||||
+ * MIPI-DSI based ea8061 AMOLED LCD 5.5 inch panel driver.
|
||||
+ *
|
||||
+ * Copyright (c) 2017 Simon Shields, <simon@lineageos.org>
|
||||
+ *
|
||||
+ * Based on the s6e8aa0 panel driver,
|
||||
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
|
||||
+ *
|
||||
+ * Inki Dae, <inki.dae@samsung.com>
|
||||
+ * Donghwa Lee, <dh09.lee@samsung.com>
|
||||
+ * Joongmock Shin <jmock.shin@samsung.com>
|
||||
+ * Eunchul Kim <chulspro.kim@samsung.com>
|
||||
+ * Tomasz Figa <t.figa@samsung.com>
|
||||
+ * Andrzej Hajda <a.hajda@samsung.com>
|
||||
+*/
|
||||
+
|
||||
+#include <linux/delay.h>
|
||||
+#include <linux/gpio/consumer.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of.h>
|
||||
+#include <linux/regulator/consumer.h>
|
||||
+
|
||||
+#include <linux/backlight.h>
|
||||
+#include <video/mipi_display.h>
|
||||
+#include <video/of_videomode.h>
|
||||
+#include <video/videomode.h>
|
||||
+
|
||||
+#include <drm/drm_mipi_dsi.h>
|
||||
+#include <drm/drm_modes.h>
|
||||
+#include <drm/drm_panel.h>
|
||||
+
|
||||
+#define M4_VERSION 0x13
|
||||
+
|
||||
+#define AID_TABLE_LEN 2
|
||||
+#define GAMMA_LEVEL_NUM 33
|
||||
+#define GAMMA_TABLE_LEN 33
|
||||
+
|
||||
+typedef u8 ea8061_gamma_table[GAMMA_TABLE_LEN];
|
||||
+typedef u8 ea8061_aid_table[AID_TABLE_LEN];
|
||||
+
|
||||
+#define EA8061_STATE_BIT_ENABLED 0
|
||||
+
|
||||
+struct ea8061 {
|
||||
+ struct device *dev;
|
||||
+ struct drm_panel panel;
|
||||
+
|
||||
+ struct regulator_bulk_data supplies[2];
|
||||
+ struct gpio_desc *reset_gpio;
|
||||
+ u32 power_on_delay;
|
||||
+ u32 reset_delay;
|
||||
+ u32 init_delay;
|
||||
+ struct videomode vm;
|
||||
+ u32 width_mm;
|
||||
+ u32 height_mm;
|
||||
+
|
||||
+ unsigned long state;
|
||||
+ u8 version;
|
||||
+ u8 id;
|
||||
+ int brightness;
|
||||
+
|
||||
+ /* This field is tested by functions directly accessing DSI bus before
|
||||
+ * transfer, transfer is skipped if it is set. In case of transfer
|
||||
+ * failure or unexpected response the field is set to error value.
|
||||
+ * Such construct allows to eliminate many checks in higher level
|
||||
+ * functions.
|
||||
+ */
|
||||
+ int error;
|
||||
+};
|
||||
+
|
||||
+
|
||||
+static const u8 ea8061_elvss_param[GAMMA_LEVEL_NUM] = {
|
||||
+ 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1f, 0x1e, 0x1e, /* 20-90cd */
|
||||
+ 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1b, 0x19, 0x17, /* 100-130cd */
|
||||
+ 0x16, 0x14, 0x12, 0x10, 0x0f, 0x0f, 0x0f, 0x0f, /* 140-186cd */
|
||||
+ 0x0f, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x10, /* 188-250cd */
|
||||
+ 0x0b, /* 300cd */
|
||||
+};
|
||||
+
|
||||
+static const ea8061_aid_table ea8061_aid_tables[GAMMA_LEVEL_NUM] = {
|
||||
+ {0x04, 0x45}, {0x03, 0xdf}, {0x03, 0x74}, {0x03, 0x0a}, /* 20-50cd */
|
||||
+ {0x02, 0x95}, {0x02, 0x25}, {0x01, 0xab}, {0x01, 0x36}, /* 60-90cd */
|
||||
+ {0x00, 0xbc}, {0x00, 0xfe}, {0x01, 0x40}, {0x01, 0x82}, /* 100-106cd */
|
||||
+ {0x01, 0xc4}, {0x02, 0x06}, {0x02, 0x06}, {0x02, 0x06}, /* 108-130cd */
|
||||
+ {0x02, 0x06}, {0x02, 0x06}, {0x02, 0x06}, {0x02, 0x06}, /* 140-170cd */
|
||||
+ {0x02, 0x06}, {0x01, 0x9f}, {0x01, 0x37}, {0x00, 0xcf}, /* 180-186cd */
|
||||
+ {0x00, 0x68}, {0x00, 0x0a}, {0x00, 0x0a}, {0x00, 0x0a}, /* 188-210cd */
|
||||
+ {0x00, 0x0a}, {0x00, 0x0a}, {0x00, 0x0a}, {0x00, 0x0a}, /* 220-250cd */
|
||||
+ {0x00, 0x0a}, /* 300cd */
|
||||
+};
|
||||
+
|
||||
+static const ea8061_gamma_table ea8061_gamma_tables[GAMMA_LEVEL_NUM] = {
|
||||
+ {
|
||||
+ /* 20cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x87, 0x88, 0x87,
|
||||
+ 0x88, 0x87, 0x88, 0x86, 0x89, 0x88, 0x87, 0x88, 0x89, 0x74,
|
||||
+ 0x65, 0x81, 0x68, 0x66, 0x83, 0x68, 0x6f, 0xa9, 0x37, 0x42,
|
||||
+ 0x2e, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 30cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x87, 0x88, 0x87,
|
||||
+ 0x87, 0x87, 0x87, 0x85, 0x88, 0x87, 0x87, 0x87, 0x88, 0x7e,
|
||||
+ 0x77, 0x83, 0x6d, 0x66, 0x7c, 0x68, 0x6f, 0xa1, 0x37, 0x42,
|
||||
+ 0x2e, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 40cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x87, 0x87,
|
||||
+ 0x88, 0x87, 0x88, 0x84, 0x87, 0x86, 0x88, 0x89, 0x89, 0x7f,
|
||||
+ 0x83, 0x81, 0x70, 0x63, 0x79, 0x65, 0x67, 0x98, 0x3b, 0x48,
|
||||
+ 0x31, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 50cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x87, 0x87,
|
||||
+ 0x87, 0x87, 0x87, 0x85, 0x88, 0x87, 0x86, 0x87, 0x87, 0x81,
|
||||
+ 0x85, 0x83, 0x75, 0x6a, 0x79, 0x6b, 0x67, 0x93, 0x3b, 0x48,
|
||||
+ 0x31, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 60cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x87, 0x87,
|
||||
+ 0x87, 0x87, 0x87, 0x84, 0x87, 0x86, 0x85, 0x86, 0x87, 0x80,
|
||||
+ 0x83, 0x82, 0x7b, 0x6e, 0x7c, 0x6d, 0x67, 0x8e, 0x3b, 0x48,
|
||||
+ 0x31, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 70cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x86, 0x86,
|
||||
+ 0x87, 0x87, 0x87, 0x85, 0x88, 0x87, 0x85, 0x86, 0x87, 0x80,
|
||||
+ 0x83, 0x82, 0x79, 0x6d, 0x78, 0x73, 0x6b, 0x8f, 0x3b, 0x48,
|
||||
+ 0x31, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 80cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x86, 0x86,
|
||||
+ 0x87, 0x87, 0x87, 0x84, 0x86, 0x85, 0x86, 0x87, 0x88, 0x80,
|
||||
+ 0x83, 0x82, 0x7b, 0x6f, 0x78, 0x74, 0x6b, 0x8c, 0x3b, 0x48,
|
||||
+ 0x31, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 90cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x86, 0x86,
|
||||
+ 0x87, 0x87, 0x87, 0x84, 0x86, 0x85, 0x84, 0x85, 0x86, 0x7e,
|
||||
+ 0x81, 0x80, 0x7f, 0x74, 0x7c, 0x75, 0x6b, 0x8a, 0x3b, 0x48,
|
||||
+ 0x31, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 100cd */
|
||||
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x86, 0x86,
|
||||
+ 0x87, 0x86, 0x86, 0x85, 0x87, 0x86, 0x84, 0x85, 0x86, 0x7e,
|
||||
+ 0x81, 0x80, 0x7f, 0x77, 0x7c, 0x70, 0x5f, 0x83, 0x40, 0x4f,
|
||||
+ 0x35, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 102cd */
|
||||
+ 0xca, 0x00, 0xdb, 0x00, 0xd7, 0x00, 0xd6, 0x85, 0x86, 0x86,
|
||||
+ 0x87, 0x86, 0x86, 0x83, 0x85, 0x85, 0x86, 0x87, 0x87, 0x7e,
|
||||
+ 0x81, 0x80, 0x7f, 0x77, 0x7c, 0x7b, 0x73, 0x8a, 0x37, 0x42,
|
||||
+ 0x2e, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 104cd */
|
||||
+ 0xca, 0x00, 0xde, 0x00, 0xda, 0x00, 0xd9, 0x85, 0x86, 0x85,
|
||||
+ 0x87, 0x86, 0x86, 0x84, 0x85, 0x85, 0x85, 0x85, 0x86, 0x7f,
|
||||
+ 0x83, 0x81, 0x7c, 0x73, 0x79, 0x7b, 0x72, 0x8a, 0x37, 0x42,
|
||||
+ 0x2e, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 106cd */
|
||||
+ 0xca, 0x00, 0xe1, 0x00, 0xdd, 0x00, 0xdc, 0x84, 0x85, 0x84,
|
||||
+ 0x86, 0x85, 0x85, 0x83, 0x84, 0x84, 0x84, 0x84, 0x85, 0x7f,
|
||||
+ 0x83, 0x81, 0x7e, 0x76, 0x7a, 0x80, 0x7a, 0x8b, 0x33, 0x3c,
|
||||
+ 0x2b, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 108cd */
|
||||
+ 0xca, 0x00, 0xe4, 0x00, 0xe1, 0x00, 0xe0, 0x84, 0x86, 0x85,
|
||||
+ 0x84, 0x83, 0x84, 0x83, 0x85, 0x84, 0x84, 0x84, 0x84, 0x81,
|
||||
+ 0x84, 0x83, 0x7d, 0x77, 0x7a, 0x7d, 0x74, 0x87, 0x33, 0x3c,
|
||||
+ 0x2b, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 110cd */
|
||||
+ 0xca, 0x00, 0xe7, 0x00, 0xe4, 0x00, 0xe3, 0x84, 0x84, 0x84,
|
||||
+ 0x84, 0x83, 0x84, 0x83, 0x84, 0x84, 0x83, 0x83, 0x84, 0x80,
|
||||
+ 0x83, 0x82, 0x7f, 0x79, 0x7d, 0x7a, 0x70, 0x84, 0x33, 0x3c,
|
||||
+ 0x2b, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 120cd */
|
||||
+ 0xca, 0x00, 0xeb, 0x00, 0xe8, 0x00, 0xe7, 0x83, 0x84, 0x84,
|
||||
+ 0x83, 0x82, 0x83, 0x83, 0x84, 0x83, 0x83, 0x83, 0x83, 0x7f,
|
||||
+ 0x82, 0x81, 0x7d, 0x77, 0x7a, 0x80, 0x7c, 0x89, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 130cd */
|
||||
+ 0xca, 0x00, 0xee, 0x00, 0xec, 0x00, 0xec, 0x83, 0x83, 0x83,
|
||||
+ 0x82, 0x82, 0x82, 0x81, 0x82, 0x82, 0x84, 0x84, 0x84, 0x7f,
|
||||
+ 0x80, 0x7f, 0x7e, 0x7a, 0x7c, 0x7d, 0x78, 0x86, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 140cd */
|
||||
+ 0xca, 0x00, 0xf1, 0x00, 0xef, 0x00, 0xef, 0x82, 0x82, 0x82,
|
||||
+ 0x82, 0x82, 0x82, 0x81, 0x82, 0x82, 0x82, 0x82, 0x82, 0x7f,
|
||||
+ 0x81, 0x80, 0x7f, 0x7c, 0x7e, 0x7b, 0x74, 0x82, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 150cd */
|
||||
+ 0xca, 0x00, 0xf4, 0x00, 0xf2, 0x00, 0xf2, 0x81, 0x82, 0x82,
|
||||
+ 0x82, 0x82, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x80,
|
||||
+ 0x81, 0x80, 0x7d, 0x7b, 0x7c, 0x81, 0x7f, 0x88, 0x85,
|
||||
+ 0x87,0x84, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 160cd */
|
||||
+ 0xca, 0x00, 0xf7, 0x00, 0xf6, 0x00, 0xf5, 0x80, 0x81, 0x81,
|
||||
+ 0x82, 0x81, 0x81, 0x80, 0x81, 0x80, 0x82, 0x82, 0x82, 0x7f,
|
||||
+ 0x80, 0x7f, 0x7f, 0x7d, 0x7e, 0x7e, 0x7b, 0x84, 0x85, 0x87,
|
||||
+ 0x84, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 170cd */
|
||||
+ 0xca, 0x00, 0xf9, 0x00, 0xf9, 0x00, 0xf8, 0x80, 0x81, 0x80,
|
||||
+ 0x81, 0x80, 0x80, 0x81, 0x82, 0x81, 0x80, 0x80, 0x81, 0x80,
|
||||
+ 0x80, 0x80, 0x80, 0x7f, 0x80, 0x7b, 0x77, 0x81, 0x85, 0x87,
|
||||
+ 0x84, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 180cd */
|
||||
+ 0xca, 0x00, 0xfc, 0x00, 0xfb, 0x00, 0xfb, 0x80, 0x80, 0x80,
|
||||
+ 0x80, 0x80, 0x80, 0x7f, 0x80, 0x80, 0x81, 0x81, 0x81, 0x80,
|
||||
+ 0x81, 0x81, 0x7e, 0x7d, 0x7e, 0x81, 0x81, 0x86, 0x7f, 0x80,
|
||||
+ 0x7f, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 182cd */
|
||||
+ 0xca, 0x00, 0xf8, 0x00, 0xf7, 0x00, 0xf6, 0x81, 0x81, 0x81,
|
||||
+ 0x81, 0x81, 0x81, 0x80, 0x81, 0x81, 0x81, 0x81, 0x81, 0x7f,
|
||||
+ 0x80, 0x7f, 0x7f, 0x7d, 0x7e, 0x7f, 0x7c, 0x83, 0x85, 0x87,
|
||||
+ 0x84, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 184cd */
|
||||
+ 0xca, 0x00, 0xf4, 0x00, 0xf2, 0x00, 0xf2, 0x81, 0x82, 0x82,
|
||||
+ 0x81, 0x81, 0x81, 0x80, 0x81, 0x81, 0x82, 0x83, 0x83, 0x7e,
|
||||
+ 0x7f, 0x7f, 0x7f, 0x7c, 0x7e, 0x7c, 0x76, 0x80, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 186cd */
|
||||
+ 0xca, 0x00, 0xf1, 0x00, 0xef, 0x00, 0xee, 0x82, 0x82, 0x82,
|
||||
+ 0x82, 0x82, 0x82, 0x81, 0x82, 0x82, 0x82, 0x82, 0x82, 0x7f,
|
||||
+ 0x80, 0x7f, 0x7e, 0x7a, 0x7c, 0x7e, 0x7a, 0x83, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 188cd */
|
||||
+ 0xca, 0x00, 0xee, 0x00, 0xec, 0x00, 0xec, 0x82, 0x83, 0x82,
|
||||
+ 0x82, 0x82, 0x82, 0x81, 0x82, 0x81, 0x82, 0x82, 0x82, 0x7f,
|
||||
+ 0x82, 0x81, 0x7d, 0x77, 0x7a, 0x81, 0x7e, 0x86, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 190cd */
|
||||
+ 0xca, 0x00, 0xeb, 0x00, 0xe8, 0x00, 0xe8, 0x82, 0x83, 0x83,
|
||||
+ 0x83, 0x82, 0x83, 0x82, 0x83, 0x83, 0x83, 0x83, 0x83, 0x7f,
|
||||
+ 0x82, 0x80, 0x7f, 0x79, 0x7d, 0x7b, 0x72, 0x81, 0x33, 0x3c,
|
||||
+ 0x2b, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 200cd */
|
||||
+ 0xca, 0x00, 0xee, 0x00, 0xec, 0x00, 0xeb, 0x82, 0x83, 0x82,
|
||||
+ 0x82, 0x82, 0x82, 0x80, 0x81, 0x81, 0x83, 0x83, 0x83, 0x7f,
|
||||
+ 0x82, 0x81, 0x7d, 0x77, 0x7a, 0x7b, 0x72, 0x81, 0x33, 0x3c,
|
||||
+ 0x2b, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 210cd */
|
||||
+ 0xca, 0x00, 0xf0, 0x00, 0xee, 0x00, 0xed, 0x82, 0x82, 0x82,
|
||||
+ 0x82, 0x81, 0x81, 0x80, 0x81, 0x81, 0x82, 0x83, 0x83, 0x7e,
|
||||
+ 0x80, 0x7f, 0x80, 0x7c, 0x7e, 0x7e, 0x7a, 0x83, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 220cd */
|
||||
+ 0xca, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xf0, 0x80, 0x81, 0x81,
|
||||
+ 0x82, 0x82, 0x82, 0x80, 0x81, 0x81, 0x82, 0x82, 0x82, 0x7f,
|
||||
+ 0x80, 0x7f, 0x7e, 0x7a, 0x7c, 0x7e, 0x7a, 0x83, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 230cd */
|
||||
+ 0xca, 0x00, 0xf4, 0x00, 0xf2, 0x00, 0xf2, 0x81, 0x81, 0x81,
|
||||
+ 0x81, 0x81, 0x80, 0x80, 0x81, 0x80, 0x82, 0x82, 0x82, 0x7f,
|
||||
+ 0x81, 0x80, 0x7c, 0x78, 0x7a, 0x7e, 0x7a, 0x83, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 240cd */
|
||||
+ 0xca, 0x00, 0xf6, 0x00, 0xf4, 0x00, 0xf4, 0x80, 0x81, 0x81,
|
||||
+ 0x81, 0x81, 0x81, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x7f,
|
||||
+ 0x81, 0x80, 0x7f, 0x7c, 0x7e, 0x7c, 0x76, 0x7f, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 250cd */
|
||||
+ 0xca, 0x00, 0xf8, 0x00, 0xf7, 0x00, 0xf6, 0x80, 0x80, 0x80,
|
||||
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x81, 0x80,
|
||||
+ 0x81, 0x80, 0x7d, 0x7b, 0x7c, 0x7c, 0x76, 0x7f, 0x2e, 0x37,
|
||||
+ 0x28, 0x31, 0x02,
|
||||
+ }, {
|
||||
+ /* 300cd */
|
||||
+ 0xca, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x7f, 0x7f, 0x7f,
|
||||
+ 0x80, 0x80, 0x80, 0x7f, 0x7f, 0x80, 0x7f, 0x7f, 0x7f, 0x80,
|
||||
+ 0x80, 0x7f, 0x7f, 0x80, 0x7f, 0x80, 0x80, 0x80, 0x7f, 0x80,
|
||||
+ 0x7f, 0x31, 0x02,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static inline struct ea8061 *panel_to_ea8061(struct drm_panel *panel)
|
||||
+{
|
||||
+ return container_of(panel, struct ea8061, panel);
|
||||
+}
|
||||
+
|
||||
+static int ea8061_clear_error(struct ea8061 *ctx)
|
||||
+{
|
||||
+ int ret = ctx->error;
|
||||
+
|
||||
+ ctx->error = 0;
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void ea8061_dcs_write(struct ea8061 *ctx, const void *data, size_t len)
|
||||
+{
|
||||
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
|
||||
+ ssize_t ret;
|
||||
+
|
||||
+ if (ctx->error < 0)
|
||||
+ return;
|
||||
+
|
||||
+ ret = mipi_dsi_dcs_write_buffer(dsi, data, len);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(ctx->dev, "error %zd writing dcs seq: %*ph\n", ret,
|
||||
+ (int)len, data);
|
||||
+ ctx->error = ret;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static int ea8061_dcs_read(struct ea8061 *ctx, u8 cmd, void *data, size_t len)
|
||||
+{
|
||||
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
|
||||
+ int ret;
|
||||
+
|
||||
+ if (ctx->error < 0)
|
||||
+ return ctx->error;
|
||||
+
|
||||
+ ret = mipi_dsi_dcs_read(dsi, cmd, data, len);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(ctx->dev, "error %d reading dcs seq(%#x)\n", ret, cmd);
|
||||
+ ctx->error = ret;
|
||||
+ }
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+#define ea8061_dcs_write_seq_static(ctx, seq...) \
|
||||
+({\
|
||||
+ static const u8 d[] = { seq };\
|
||||
+ ea8061_dcs_write(ctx, d, ARRAY_SIZE(d));\
|
||||
+})
|
||||
+
|
||||
+static void ea8061_apply_level_2_key(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xf0, 0x5a, 0x5a);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_panel_cond_set(struct ea8061 *ctx)
|
||||
+{
|
||||
+ if (ctx->version == M4_VERSION)
|
||||
+ ea8061_dcs_write_seq_static(ctx,
|
||||
+ 0xc4, 0x4e, 0xbd, 0x00, 0x00, 0x58, 0xa7,
|
||||
+ 0x0b, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
+ 0x0b, 0x92, 0x0b, 0x92, 0x08, 0x08, 0x07,
|
||||
+ 0x30, 0x50, 0x30, 0x00, 0x00, 0x00, 0x00,
|
||||
+ 0x00, 0x02, 0x04, 0x04);
|
||||
+ else
|
||||
+ ea8061_dcs_write_seq_static(ctx,
|
||||
+ 0xC4, 0x4E, 0xBD, 0x00, 0x00, 0x58, 0xA7,
|
||||
+ 0x0B, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
+ 0x0B, 0x92, 0x0B, 0x92, 0x08, 0x08, 0x07,
|
||||
+ 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00,
|
||||
+ 0x00, 0x02, 0x04, 0x04);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_display_condition_set(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0x36, 0x02, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_etc_power_control(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0x55, 0x00, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_etc_elvss_control(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xb2, 0x0e, 0xb4, 0xa0, 0x00,
|
||||
+ 0x00, 0x00, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_apply_level_3_key(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xfc, 0x5a, 0x5a);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_aid_set(struct ea8061 *ctx)
|
||||
+{
|
||||
+ u8 aid_cmd[AID_TABLE_LEN + 1] = {
|
||||
+ 0xb3, 0x00, 0x00,
|
||||
+ };
|
||||
+ if (ctx->error)
|
||||
+ return;
|
||||
+
|
||||
+ aid_cmd[1] = ea8061_aid_tables[ctx->brightness][0];
|
||||
+ aid_cmd[2] = ea8061_aid_tables[ctx->brightness][1];
|
||||
+
|
||||
+ ea8061_dcs_write(ctx, aid_cmd, ARRAY_SIZE(aid_cmd));
|
||||
+}
|
||||
+
|
||||
+static void ea8061_acl_set(struct ea8061 *ctx)
|
||||
+{
|
||||
+ u8 acl_seq[] = {0x55, 0x02, 0x00};
|
||||
+ if (ctx->error)
|
||||
+ return;
|
||||
+
|
||||
+ switch (ctx->brightness) {
|
||||
+ case 0: /* <30cd */
|
||||
+ acl_seq[1] = 0x00;
|
||||
+ break;
|
||||
+ case 1: /* 30cd */
|
||||
+ acl_seq[1] = 0x01;
|
||||
+ break;
|
||||
+ }
|
||||
+
|
||||
+ ea8061_dcs_write(ctx, acl_seq, ARRAY_SIZE(acl_seq));
|
||||
+}
|
||||
+
|
||||
+static void ea8061_elvss_set(struct ea8061 *ctx)
|
||||
+{
|
||||
+ u8 elvss_cmd[] = {
|
||||
+ 0xb2, 0x00, 0xb4, 0xa0, 0x00, 0x00, 0x00, 0x00,
|
||||
+ };
|
||||
+
|
||||
+ if (ctx->error)
|
||||
+ return;
|
||||
+
|
||||
+ elvss_cmd[1] = ea8061_elvss_param[ctx->brightness];
|
||||
+ ea8061_dcs_write(ctx, elvss_cmd, ARRAY_SIZE(elvss_cmd));
|
||||
+}
|
||||
+
|
||||
+static void ea8061_brightness_set(struct ea8061 *ctx)
|
||||
+{
|
||||
+ const u8 *gamma;
|
||||
+
|
||||
+ if (ctx->error)
|
||||
+ return;
|
||||
+
|
||||
+ gamma = ea8061_gamma_tables[ctx->brightness];
|
||||
+
|
||||
+ /* prepare for gamma table update */
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xf7, 0x5a, 0x5a);
|
||||
+
|
||||
+ ea8061_dcs_write(ctx, gamma, GAMMA_TABLE_LEN);
|
||||
+
|
||||
+ /* apply gamma table update. */
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xf7, 0xa5, 0xa5);
|
||||
+
|
||||
+ ea8061_aid_set(ctx);
|
||||
+ ea8061_acl_set(ctx);
|
||||
+ ea8061_elvss_set(ctx);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_magna_gp(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xb0, 0x0e);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_magna_refresh_disable(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xdd, 0x00, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_ltps_aid(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xb3, 0x0, 0x0a);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_slew(struct ea8061 *ctx)
|
||||
+{
|
||||
+ if (ctx->version == M4_VERSION)
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x0d, 0x00);
|
||||
+ else {
|
||||
+ if (ctx->id == 0x00 || ctx->id == 0x01)
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x0e, 0x00);
|
||||
+ else if (ctx->id == 0x02)
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x09, 0x00);
|
||||
+ else if (ctx->id == 0x03)
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x0d, 0x00);
|
||||
+ else
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x0a, 0x00);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static void ea8061_panel_init(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_apply_level_2_key(ctx);
|
||||
+ ea8061_apply_level_3_key(ctx);
|
||||
+ msleep(20);
|
||||
+
|
||||
+ ea8061_magna_gp(ctx);
|
||||
+ ea8061_magna_refresh_disable(ctx);
|
||||
+
|
||||
+ ea8061_panel_cond_set(ctx);
|
||||
+ ea8061_display_condition_set(ctx);
|
||||
+ ea8061_brightness_set(ctx);
|
||||
+ ea8061_ltps_aid(ctx);
|
||||
+ ea8061_etc_elvss_control(ctx);
|
||||
+ ea8061_etc_power_control(ctx);
|
||||
+ ea8061_slew(ctx);
|
||||
+ msleep(ctx->init_delay);
|
||||
+
|
||||
+ ea8061_dcs_write_seq_static(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
|
||||
+ msleep(40);
|
||||
+
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0x29, 0x00, 0x00);
|
||||
+}
|
||||
+
|
||||
+static void ea8061_set_maximum_return_packet_size(struct ea8061 *ctx,
|
||||
+ u16 size)
|
||||
+{
|
||||
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
|
||||
+ int ret;
|
||||
+
|
||||
+ if (ctx->error < 0)
|
||||
+ return;
|
||||
+
|
||||
+ ret = mipi_dsi_set_maximum_return_packet_size(dsi, size);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(ctx->dev,
|
||||
+ "error %d setting maximum return packet size to %d\n",
|
||||
+ ret, size);
|
||||
+ ctx->error = ret;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static void ea8061_read_mtp_id(struct ea8061 *ctx)
|
||||
+{
|
||||
+ u8 id[3];
|
||||
+ int ret;
|
||||
+
|
||||
+ ea8061_dcs_write_seq_static(ctx, 0xfd, 0xd1);
|
||||
+
|
||||
+ ret = ea8061_dcs_read(ctx, 0xfe, id, ARRAY_SIZE(id));
|
||||
+ if (ret < 0 || ret < ARRAY_SIZE(id) || id[0] == 0x00) {
|
||||
+ dev_err(ctx->dev, "read id failed\n");
|
||||
+ ctx->error = -EIO;
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ dev_info(ctx->dev, "ID: 0x%2x, 0x%2x, 0x%2x\n", id[0], id[1], id[2]);
|
||||
+
|
||||
+ ctx->version = id[1];
|
||||
+ ctx->id = id[2];
|
||||
+}
|
||||
+
|
||||
+static void ea8061_set_sequence(struct ea8061 *ctx)
|
||||
+{
|
||||
+ ea8061_set_maximum_return_packet_size(ctx, 3);
|
||||
+ ea8061_read_mtp_id(ctx);
|
||||
+ ea8061_panel_init(ctx);
|
||||
+ ea8061_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
|
||||
+}
|
||||
+
|
||||
+static int ea8061_power_on(struct ea8061 *ctx)
|
||||
+{
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ msleep(ctx->power_on_delay);
|
||||
+
|
||||
+ gpiod_set_value(ctx->reset_gpio, 0);
|
||||
+ usleep_range(10000, 11000);
|
||||
+ gpiod_set_value(ctx->reset_gpio, 1);
|
||||
+
|
||||
+ msleep(ctx->reset_delay);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int ea8061_power_off(struct ea8061 *ctx)
|
||||
+{
|
||||
+ return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
|
||||
+}
|
||||
+
|
||||
+static int ea8061_disable(struct drm_panel *panel)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int ea8061_unprepare(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct ea8061 *ctx = panel_to_ea8061(panel);
|
||||
+
|
||||
+ clear_bit(EA8061_STATE_BIT_ENABLED, &ctx->state);
|
||||
+ ea8061_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_OFF);
|
||||
+ ea8061_dcs_write_seq_static(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
|
||||
+ msleep(40);
|
||||
+
|
||||
+ ea8061_clear_error(ctx);
|
||||
+
|
||||
+ return ea8061_power_off(ctx);
|
||||
+}
|
||||
+
|
||||
+static int ea8061_prepare(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct ea8061 *ctx = panel_to_ea8061(panel);
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = ea8061_power_on(ctx);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ ea8061_set_sequence(ctx);
|
||||
+ ret = ctx->error;
|
||||
+
|
||||
+ if (ret < 0)
|
||||
+ ea8061_unprepare(panel);
|
||||
+ else
|
||||
+ set_bit(EA8061_STATE_BIT_ENABLED, &ctx->state);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int ea8061_enable(struct drm_panel *panel)
|
||||
+{
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int ea8061_get_modes(struct drm_panel *panel,
|
||||
+ struct drm_connector *connector)
|
||||
+{
|
||||
+ struct ea8061 *ctx = panel_to_ea8061(panel);
|
||||
+ struct drm_display_mode *mode;
|
||||
+
|
||||
+ mode = drm_mode_create(connector->dev);
|
||||
+ if (!mode) {
|
||||
+ dev_err(ctx->dev, "failed to create a new display mode\n");
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ drm_display_mode_from_videomode(&ctx->vm, mode);
|
||||
+ mode->width_mm = ctx->width_mm;
|
||||
+ mode->height_mm = ctx->height_mm;
|
||||
+ connector->display_info.width_mm = mode->width_mm;
|
||||
+ connector->display_info.height_mm = mode->height_mm;
|
||||
+
|
||||
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
||||
+ drm_mode_probed_add(connector, mode);
|
||||
+
|
||||
+ return 1;
|
||||
+}
|
||||
+
|
||||
+static const struct drm_panel_funcs ea8061_drm_funcs = {
|
||||
+ .disable = ea8061_disable,
|
||||
+ .unprepare = ea8061_unprepare,
|
||||
+ .prepare = ea8061_prepare,
|
||||
+ .enable = ea8061_enable,
|
||||
+ .get_modes = ea8061_get_modes,
|
||||
+};
|
||||
+
|
||||
+static int ea8061_get_brightness(struct backlight_device *bd)
|
||||
+{
|
||||
+ return bd->props.brightness;
|
||||
+}
|
||||
+
|
||||
+static int ea8061_set_brightness(struct backlight_device *bd)
|
||||
+{
|
||||
+ struct ea8061 *ctx = bl_get_data(bd);
|
||||
+
|
||||
+ bd->props.power = FB_BLANK_UNBLANK;
|
||||
+ if (ctx->brightness != bd->props.brightness) {
|
||||
+ ctx->brightness = bd->props.brightness;
|
||||
+ if (test_bit(EA8061_STATE_BIT_ENABLED, &ctx->state))
|
||||
+ ea8061_brightness_set(ctx);
|
||||
+ }
|
||||
+
|
||||
+ return ea8061_clear_error(ctx);
|
||||
+}
|
||||
+
|
||||
+static const struct backlight_ops ea8061_backlight_ops = {
|
||||
+ .get_brightness = ea8061_get_brightness,
|
||||
+ .update_status = ea8061_set_brightness,
|
||||
+};
|
||||
+
|
||||
+static void ea8061_backlight_register(struct ea8061 *ctx)
|
||||
+{
|
||||
+ struct backlight_properties props = {
|
||||
+ .type = BACKLIGHT_RAW,
|
||||
+ .brightness = ctx->brightness,
|
||||
+ .max_brightness = GAMMA_LEVEL_NUM - 1
|
||||
+ };
|
||||
+ struct device *dev = ctx->dev;
|
||||
+ struct backlight_device *bd;
|
||||
+
|
||||
+ bd = devm_backlight_device_register(dev, "panel", dev, ctx,
|
||||
+ &ea8061_backlight_ops, &props);
|
||||
+ if (IS_ERR(bd))
|
||||
+ dev_err(dev, "error registering backlight device (%ld)\n",
|
||||
+ PTR_ERR(bd));
|
||||
+}
|
||||
+
|
||||
+static int ea8061_parse_dt(struct ea8061 *ctx)
|
||||
+{
|
||||
+ struct device *dev = ctx->dev;
|
||||
+ struct device_node *np = dev->of_node;
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = of_get_videomode(np, &ctx->vm, 0);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ of_property_read_u32(np, "power-on-delay", &ctx->power_on_delay);
|
||||
+ of_property_read_u32(np, "reset-delay", &ctx->reset_delay);
|
||||
+ of_property_read_u32(np, "init-delay", &ctx->init_delay);
|
||||
+ of_property_read_u32(np, "panel-width-mm", &ctx->width_mm);
|
||||
+ of_property_read_u32(np, "panel-height-mm", &ctx->height_mm);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int ea8061_probe(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ struct device *dev = &dsi->dev;
|
||||
+ struct ea8061 *ctx;
|
||||
+ int ret;
|
||||
+
|
||||
+ ctx = devm_kzalloc(dev, sizeof(struct ea8061), GFP_KERNEL);
|
||||
+ if (!ctx)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ pr_err("ea8061 probing\n");
|
||||
+
|
||||
+ mipi_dsi_set_drvdata(dsi, ctx);
|
||||
+
|
||||
+ ctx->dev = dev;
|
||||
+
|
||||
+ dsi->lanes = 4;
|
||||
+ dsi->format = MIPI_DSI_FMT_RGB888;
|
||||
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST
|
||||
+ | MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP
|
||||
+ | MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET
|
||||
+ | MIPI_DSI_MODE_VSYNC_FLUSH | MIPI_DSI_MODE_VIDEO_AUTO_VERT;
|
||||
+
|
||||
+ ret = ea8061_parse_dt(ctx);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+
|
||||
+ ctx->supplies[0].supply = "vdd3";
|
||||
+ ctx->supplies[1].supply = "vci";
|
||||
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
|
||||
+ ctx->supplies);
|
||||
+ if (ret < 0) {
|
||||
+ dev_err(dev, "failed to get regulators: %d\n", ret);
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
|
||||
+ if (IS_ERR(ctx->reset_gpio)) {
|
||||
+ dev_err(dev, "cannot get reset-gpios %ld\n",
|
||||
+ PTR_ERR(ctx->reset_gpio));
|
||||
+ return PTR_ERR(ctx->reset_gpio);
|
||||
+ }
|
||||
+
|
||||
+ ctx->brightness = GAMMA_LEVEL_NUM - 1;
|
||||
+
|
||||
+ drm_panel_init(&ctx->panel, dev, &ea8061_drm_funcs, DRM_MODE_CONNECTOR_DSI);
|
||||
+
|
||||
+ drm_panel_add(&ctx->panel);
|
||||
+
|
||||
+ ret = mipi_dsi_attach(dsi);
|
||||
+ if (ret < 0)
|
||||
+ drm_panel_remove(&ctx->panel);
|
||||
+
|
||||
+ ea8061_backlight_register(ctx);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void ea8061_remove(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ struct ea8061 *ctx = mipi_dsi_get_drvdata(dsi);
|
||||
+
|
||||
+ mipi_dsi_detach(dsi);
|
||||
+ drm_panel_remove(&ctx->panel);
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id ea8061_of_match[] = {
|
||||
+ { .compatible = "magnachip,ea8061" },
|
||||
+ { }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, ea8061_of_match);
|
||||
+
|
||||
+static struct mipi_dsi_driver ea8061_driver = {
|
||||
+ .probe = ea8061_probe,
|
||||
+ .remove = ea8061_remove,
|
||||
+ .driver = {
|
||||
+ .name = "panel-magnachip-ea8061",
|
||||
+ .of_match_table = ea8061_of_match,
|
||||
+ },
|
||||
+};
|
||||
+module_mipi_dsi_driver(ea8061_driver);
|
||||
+
|
||||
+MODULE_AUTHOR("Simon Shields <simon@lineageos.org>");
|
||||
+MODULE_AUTHOR("Donghwa Lee <dh09.lee@samsung.com>");
|
||||
+MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
|
||||
+MODULE_AUTHOR("Joongmock Shin <jmock.shin@samsung.com>");
|
||||
+MODULE_AUTHOR("Eunchul Kim <chulspro.kim@samsung.com>");
|
||||
+MODULE_AUTHOR("Tomasz Figa <t.figa@samsung.com>");
|
||||
+MODULE_AUTHOR("Andrzej Hajda <a.hajda@samsung.com>");
|
||||
+MODULE_DESCRIPTION("MIPI-DSI based ea8061 AMOLED LCD Panel Driver");
|
||||
+MODULE_LICENSE("GPL v2");
|
||||
--
|
||||
2.30.2
|
||||
|
||||
|
|
@ -0,0 +1,205 @@
|
|||
From 12677ada98ebfa3c857a19c6919361039b80a48e Mon Sep 17 00:00:00 2001
|
||||
From: Simon Shields <simon@lineageos.org>
|
||||
Date: Thu, 16 Nov 2017 22:29:03 +1100
|
||||
Subject: [PATCH 11/13] ARM: dts: exynos4412-n710x: add S6EVR02/EA8061 bindings
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
[ split n710x dts instead of using overlays ]
|
||||
Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
|
||||
[ Sort dts entries alphabetically ]
|
||||
Signed-off-by: Henrik Grimler <henrik@grimler.se>
|
||||
---
|
||||
arch/arm/boot/dts/Makefile | 3 +-
|
||||
arch/arm/boot/dts/exynos4412-n710x-ea8061.dts | 17 ++++
|
||||
.../arm/boot/dts/exynos4412-n710x-s6evr02.dts | 17 ++++
|
||||
...os4412-n710x.dts => exynos4412-n710x.dtsi} | 99 +++++++++++++++++++
|
||||
4 files changed, 135 insertions(+), 1 deletion(-)
|
||||
create mode 100644 arch/arm/boot/dts/exynos4412-n710x-ea8061.dts
|
||||
create mode 100644 arch/arm/boot/dts/exynos4412-n710x-s6evr02.dts
|
||||
rename arch/arm/boot/dts/{exynos4412-n710x.dts => exynos4412-n710x.dtsi} (56%)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
||||
index 6aa7dc4db2fc..afde0e21fc71 100644
|
||||
--- a/arch/arm/boot/dts/Makefile
|
||||
+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -217,7 +217,8 @@ dtb-$(CONFIG_ARCH_EXYNOS4) += \
|
||||
exynos4412-i9300.dtb \
|
||||
exynos4412-i9305.dtb \
|
||||
exynos4412-itop-elite.dtb \
|
||||
- exynos4412-n710x.dtb \
|
||||
+ exynos4412-n710x-ea8061.dtb \
|
||||
+ exynos4412-n710x-s6evr02.dtb \
|
||||
exynos4412-odroidu3.dtb \
|
||||
exynos4412-odroidx.dtb \
|
||||
exynos4412-odroidx2.dtb \
|
||||
diff --git a/arch/arm/boot/dts/exynos4412-n710x-ea8061.dts b/arch/arm/boot/dts/exynos4412-n710x-ea8061.dts
|
||||
new file mode 100644
|
||||
index 000000000000..1b47392eb93b
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/exynos4412-n710x-ea8061.dts
|
||||
@@ -0,0 +1,17 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/dts-v1/;
|
||||
+#include "exynos4412-n710x.dtsi"
|
||||
+
|
||||
+&dsi_in_ea8061 {
|
||||
+ remote-endpoint = <&dsi_out>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&dsi_out {
|
||||
+ remote-endpoint = <&dsi_in_ea8061>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&ea8061 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/exynos4412-n710x-s6evr02.dts b/arch/arm/boot/dts/exynos4412-n710x-s6evr02.dts
|
||||
new file mode 100644
|
||||
index 000000000000..b82df0480fbc
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/exynos4412-n710x-s6evr02.dts
|
||||
@@ -0,0 +1,17 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/dts-v1/;
|
||||
+#include "exynos4412-n710x.dtsi"
|
||||
+
|
||||
+&dsi_in_s6evr02 {
|
||||
+ remote-endpoint = <&dsi_out>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&dsi_out {
|
||||
+ remote-endpoint = <&dsi_in_s6evr02>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&s6evr02 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm/boot/dts/exynos4412-n710x.dts b/arch/arm/boot/dts/exynos4412-n710x.dtsi
|
||||
similarity index 56%
|
||||
rename from arch/arm/boot/dts/exynos4412-n710x.dts
|
||||
rename to arch/arm/boot/dts/exynos4412-n710x.dtsi
|
||||
index 5f2888816e4a..5e6b941f5cb7 100644
|
||||
--- a/arch/arm/boot/dts/exynos4412-n710x.dts
|
||||
+++ b/arch/arm/boot/dts/exynos4412-n710x.dtsi
|
||||
@@ -38,6 +38,104 @@ &cam_io_reg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
+&dsi_0 {
|
||||
+ vddcore-supply = <&ldo8_reg>;
|
||||
+ vddio-supply = <&ldo10_reg>;
|
||||
+ samsung,burst-clock-frequency = <500000000>;
|
||||
+ samsung,esc-clock-frequency = <20000000>;
|
||||
+ samsung,pll-clock-frequency = <24000000>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+
|
||||
+ dsi_out: endpoint@0 {
|
||||
+ samsung,burst-clock-frequency = <500000000>;
|
||||
+ samsung,esc-clock-frequency = <20000000>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+ s6evr02: panel-s6evr02@0 {
|
||||
+ compatible = "samsung,s6evr02";
|
||||
+ reg = <0>;
|
||||
+ vdd3-supply = <&ldo13_reg>;
|
||||
+ vci-supply = <&ldo25_reg>;
|
||||
+ reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>;
|
||||
+ power-on-delay = <50>;
|
||||
+ reset-delay = <100>;
|
||||
+ init-delay = <100>;
|
||||
+ panel-width-mm = <69>;
|
||||
+ panel-height-mm = <123>;
|
||||
+ // HIGH means s6evr02
|
||||
+ present-gpios = <&gpf1 0 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ display-timings {
|
||||
+ timing0_s6evr02: timing-0 {
|
||||
+ clock-frequency = <62614944>;
|
||||
+ hactive = <720>;
|
||||
+ vactive = <1280>;
|
||||
+ hfront-porch = <70>;
|
||||
+ hback-porch = <40>;
|
||||
+ hsync-len = <3>;
|
||||
+ vfront-porch = <13>;
|
||||
+ vback-porch = <1>;
|
||||
+ vsync-len = <2>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ port {
|
||||
+ dsi_in_s6evr02: endpoint {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ ea8061: panel-ea8061@0 {
|
||||
+ compatible = "magnachip,ea8061";
|
||||
+ reg = <0>;
|
||||
+ vdd3-supply = <&ldo13_reg>;
|
||||
+ vci-supply = <&ldo25_reg>;
|
||||
+ reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>;
|
||||
+ power-on-delay = <50>;
|
||||
+ reset-delay = <100>;
|
||||
+ init-delay = <100>;
|
||||
+ panel-width-mm = <69>;
|
||||
+ panel-height-mm = <123>;
|
||||
+ // LOW means ea8061
|
||||
+ present-gpios = <&gpf1 0 GPIO_ACTIVE_LOW>;
|
||||
+ status = "disabled";
|
||||
+
|
||||
+ display-timings {
|
||||
+ timing0_ea8061: timing-0 {
|
||||
+ clock-frequency = <67425696>;
|
||||
+ hactive = <720>;
|
||||
+ vactive = <1280>;
|
||||
+ hfront-porch = <52>;
|
||||
+ hback-porch = <121>;
|
||||
+ hsync-len = <4>;
|
||||
+ vfront-porch = <13>;
|
||||
+ vback-porch = <1>;
|
||||
+ vsync-len = <2>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ port {
|
||||
+ dsi_in_ea8061: endpoint {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
&i2c_3 {
|
||||
samsung,i2c-sda-delay = <100>;
|
||||
samsung,i2c-slave-addr = <0x10>;
|
||||
@@ -55,6 +153,7 @@ touchscreen@48 {
|
||||
touchscreen-size-y = <1280>;
|
||||
avdd-supply = <&ldo23_reg>;
|
||||
vdd-supply = <&ldo24_reg>;
|
||||
+
|
||||
};
|
||||
};
|
||||
|
||||
--
|
||||
2.30.2
|
||||
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
From c5fb774025229eae5660a2690273edd6a5936acf Mon Sep 17 00:00:00 2001
|
||||
From 27e9aab52565740c4845565c4a307884ef86a082 Mon Sep 17 00:00:00 2001
|
||||
From: Newbyte <newbie13xd@gmail.com>
|
||||
Date: Thu, 24 Mar 2022 11:25:26 +0100
|
||||
Subject: [PATCH 10/11] drm: Allow DRM_IOCTL_MODE_CREATE_DUMB on render nodes
|
||||
Subject: [PATCH 12/13] drm: Allow DRM_IOCTL_MODE_CREATE_DUMB on render nodes
|
||||
|
||||
Due to a change in Mesa, the render node ends up being picked
|
||||
instead of the primary node when using Exynos DRM kmsro. In turn,
|
||||
|
|
@ -28,5 +28,5 @@ index ca2a6e6101dc..233b218f8cc8 100644
|
|||
DRM_IOCTL_DEF(DRM_IOCTL_MODE_DESTROY_DUMB, drm_mode_destroy_dumb_ioctl, 0),
|
||||
DRM_IOCTL_DEF(DRM_IOCTL_MODE_OBJ_GETPROPERTIES, drm_mode_obj_get_properties_ioctl, 0),
|
||||
--
|
||||
2.38.1
|
||||
2.30.2
|
||||
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
From 19e91cc7749e0e96486f0bef43a5b5661f2899be Mon Sep 17 00:00:00 2001
|
||||
From c000bea377de54d5df8fa1609b2f288b37ef6a7f Mon Sep 17 00:00:00 2001
|
||||
From: Oliver Smith <ollieparanoid@postmarketos.org>
|
||||
Date: Thu, 1 Sep 2022 21:56:03 +0200
|
||||
Subject: [PATCH 11/11] ARM: dts: exynos: disable HDMI on Midas
|
||||
Subject: [PATCH 13/13] ARM: dts: exynos: disable HDMI on Midas
|
||||
|
||||
Disable it as workaround because when unplugged, HDMI appears as
|
||||
DRM_MNODE_CONNECTED with a surface are of 0x0.
|
||||
|
|
@ -59,5 +59,5 @@ index 3d6faa222f1d..41cae9a4f708 100644
|
|||
sleep1: sleep-state {
|
||||
PIN_SLP(gpk0-0, PREV, NONE);
|
||||
--
|
||||
2.38.1
|
||||
2.30.2
|
||||
|
||||
|
|
@ -4,7 +4,7 @@
|
|||
|
||||
pkgname=linux-postmarketos-exynos4
|
||||
pkgver=6.1
|
||||
pkgrel=3
|
||||
pkgrel=4
|
||||
pkgdesc="Mainline kernel fork for Samsung Exynos4 devices"
|
||||
arch="armv7"
|
||||
_carch="arm"
|
||||
|
|
@ -47,9 +47,11 @@ source="
|
|||
0006-mfd-max77693-Add-defines-for-charger-current-control.patch
|
||||
0007-power_supply-max77693-change-the-supply-type-to-POWE.patch
|
||||
0008-samsung-t0lte-add-leds.patch
|
||||
0009-Add-display-support-for-Samsung-Galaxy-Note-2-GT-N71.patch
|
||||
0010-drm-Allow-DRM_IOCTL_MODE_CREATE_DUMB-on-render-nodes.patch
|
||||
0011-ARM-dts-exynos-disable-HDMI-on-Midas.patch
|
||||
0009-drm-panel-add-S6EVR02-panel-driver.patch
|
||||
0010-drm-panel-add-Magnachip-EA8061-5.5-AMOLED-panel-driv.patch
|
||||
0011-ARM-dts-exynos4412-n710x-add-S6EVR02-EA8061-bindings.patch
|
||||
0012-drm-Allow-DRM_IOCTL_MODE_CREATE_DUMB-on-render-nodes.patch
|
||||
0013-ARM-dts-exynos-disable-HDMI-on-Midas.patch
|
||||
initramfs.list
|
||||
init
|
||||
"
|
||||
|
|
@ -93,17 +95,19 @@ package() {
|
|||
sha512sums="
|
||||
6ed2a73c2699d0810e54753715635736fc370288ad5ce95c594f2379959b0e418665cd71bc512a0273fe226fe90074d8b10d14c209080a6466498417a4fdda68 linux-6.1.tar.xz
|
||||
334da503f8b088b0a7f51b9a45a490a8f22fa620c235815d93d2cc9da04c355276a67f5ad32f6e7f4459905b5ecba663c60ff4f325f2fc7fe027b4ea04e90d2a config-postmarketos-exynos4.armv7
|
||||
b65a114f5dd7e62e96e48c5ae59a377999aead19d8dcc79f81e8eb533d97bb131779165b66878135185c6f235a66bd7b1908021b21e713ed79bc3c6e0e3b4d5f 0001-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
|
||||
4de1c0c359b85ba0bb99a17b19fe795c3f3486785f1e14249da07b9f168b2e5b92e61ad5657a0332c95866032598ba0df0795580970ae2b4e73f8a6b1286ba4b 0002-ARM-dts-exynos-Add-reboot-modes-to-midas.patch
|
||||
7956323f9a22e1cd5ed2a877b117ff4bb5ab6188dc7953e6b6a874d66192ea7c34df32969153dabe0070b40de080871b8fd1282b8d49f19014dabc91b267c679 0003-mmc-core-Workaround-VTU00M-0xf1-FTL-metadata-corrupt.patch
|
||||
be042b8a949c26a4c0ee720b8622cf6d06f9532c35bb62a7c349f9306cd750504f8c858e1a5924f0dc261a3d52fb61077e5225f34257e3bd2b623ad014243f2d 0004-drivers-drm-Add-backlight-control-support-for-s6e8aa.patch
|
||||
c35ce1e5619a18ebf9a0f39bfff129e77fb051fe680f01fe2603c64a4f656992f42e3033fa27508caea705b8d5b7fe192ddc6983cc408fe053cf8fe18dda2cc8 0005-power_supply-max77693-Listen-for-cable-events-and-en.patch
|
||||
0301616fb5d4b6ccdca330e7888bbe9ca3cf0c8a448523f361bd3520d9fb3874343fd2c64e2bb5f84a9ab2c3364d86fc948a667a2e367852b46e37f0e2d8bac7 0006-mfd-max77693-Add-defines-for-charger-current-control.patch
|
||||
e23725aae447c847a467a06e8cfeb759fe1b3f9915f61cca6ead8cc2392370015939e9d93e97c88764221bb7ee0b407780308718e199ec779809cffa2319ad77 0007-power_supply-max77693-change-the-supply-type-to-POWE.patch
|
||||
2b991f210505ed430aaa4388069368824a394d55c7f62f20fb7d1fe20a512b785b5ca2208385d636dfc634b16e0ef8164bb95370e5bff43110356efb8f0faf23 0008-samsung-t0lte-add-leds.patch
|
||||
cb8b78a472759fab3fbba22be4969d5e0e6ee67af23a224b51075dcab68bad64e6ac31e159d490bbef10ff5c5dda14cb2b40073ea7da783a29e89a534b4d5606 0009-Add-display-support-for-Samsung-Galaxy-Note-2-GT-N71.patch
|
||||
2b62597047c3f217513803b601923c3556ee51beddf6e24ae25b5b48a51aa1050107bd3fdd963bace0809a5f6d488e2285c8ca43c0ba47b48bad2f439b536fb8 0010-drm-Allow-DRM_IOCTL_MODE_CREATE_DUMB-on-render-nodes.patch
|
||||
40d24ae8fa64c934e688f7473cbdee979b5acab8f7c0bf3434bbc23b4159e29c939d62f0a896301dd15814296270d54454378cd75de5a778d1426f457c9386fb 0011-ARM-dts-exynos-disable-HDMI-on-Midas.patch
|
||||
bfad5fadb442a6d6c7f8a43565c4f706e4c0b47949e8bbe6dbcbe058da3fbebd11df17a567493d263e6b5d6b050fe1bdd3c394c3692c26f3d7ab8c45e1471e79 0001-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
|
||||
28996ef4b8be4dc247b62c4a793336326a5beb6a61f0fba5048082e3363c8876fb5dc118e54a9ea7e63ba803b82f7d2d8ecf67577c76a20823c7e01449f44d7f 0002-ARM-dts-exynos-Add-reboot-modes-to-midas.patch
|
||||
1202c766db844be9c89514cf82a87b2e253d5eeefb1bcaa3e55b8f0bc033eccd11097687cb2780cdc3d09d3790038f8235f5849eee734adc04b5fd739a51bacf 0003-mmc-core-Workaround-VTU00M-0xf1-FTL-metadata-corrupt.patch
|
||||
533e84597f7a6bd0f3b59089017458f5d6b41aff7712676ce7d4ca6ff181432eea9b1122cee569e521a3644f35cdd11c0d7f79a72945c723bae78c428c482488 0004-drivers-drm-Add-backlight-control-support-for-s6e8aa.patch
|
||||
dc132c9ad180439efa2dd3f2085adca6c090fa4f243fcdf7c315d15629825cfa03fb677a1cd361d6b14d1e474340a7461470da90d29667f71ca3cd7cb5cb493b 0005-power_supply-max77693-Listen-for-cable-events-and-en.patch
|
||||
5f8116b7771091d9c89132cb87ffed31fe717e796d4d6b3fc5f691e312a90b2e8be7c47ec7f2ae746f130c8b847a47f17a336d533480ec80e0e0f6430c88bb0b 0006-mfd-max77693-Add-defines-for-charger-current-control.patch
|
||||
2d9123ebb9b6c82d4f947e47a5786ec96691bd930c17acc307af8fd5850e605a1ee7ed1a49c13f65e794684c10d00e1522324a8bff6dce6374c318af944c69c3 0007-power_supply-max77693-change-the-supply-type-to-POWE.patch
|
||||
7cd0a047b6966cc2f15994ac46c3d962385372400ccb049a53343077816bd10765971a48dab3bfe49a3671faf4f8b2d6310d99e7646e4d50da4218398488f22e 0008-samsung-t0lte-add-leds.patch
|
||||
918714bcee7ae6b897a50064ba5498c678d0b85eb0e7b6ee3f0df398fc73380a04cf67fab1824a9991098b41659e00b229f372d9621cd67e5b9dfee251f34904 0009-drm-panel-add-S6EVR02-panel-driver.patch
|
||||
201d75a2a1bd0c3fba0862852c3b159cc754133011ba2fe98f051cdb8f082de9e3826a8ce9f8d2a9e0ee46140b4d00f61d5334cf8aada828b38858aa4fd1b093 0010-drm-panel-add-Magnachip-EA8061-5.5-AMOLED-panel-driv.patch
|
||||
5aedf7fb653c8c5118e0023e6ed31ec6f1a57257a801c042bede671853b8b3f23a07a8a33ec2238cb30044c4a63a017b20c55ba55b1c45e4ad860c977b56a348 0011-ARM-dts-exynos4412-n710x-add-S6EVR02-EA8061-bindings.patch
|
||||
0f5ef8996ca61cb599153d0cf1e2fd021f58d9a6d8ae395e219abdd9384fd998165ceaf70133b9f590d7875c62fa01a8ed015062328060d923bd8d77d85a5a15 0012-drm-Allow-DRM_IOCTL_MODE_CREATE_DUMB-on-render-nodes.patch
|
||||
da44d616c1a4bee9b657d702b54e732965b1c0991a545e35f23163cd3db2e0d1141e519a8aafe7d15372ea1838a88466ab3fef0b13825b862ae99a83a238d8c7 0013-ARM-dts-exynos-disable-HDMI-on-Midas.patch
|
||||
aaff0332b90e1f9f62de1128cace934717336e54ab09de46477369fa808302482d97334e43a85ee8597c1bcab64d3484750103559fea2ce8cd51776156bf7591 initramfs.list
|
||||
09f1f214a24300696809727a7b04378887c06ca6f40803ca51a12bf2176a360b2eb8632139d6a0722094e05cb2038bdb04018a1e3d33fc2697674552ade03bee init
|
||||
"
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue