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linux-postmarketos-mediatek-mt8183: add support for katsu and makomo (MR 3841)

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Anton Bambura 2023-02-03 18:08:18 +02:00 committed by Clayton Craft
parent 210268fc9b
commit 0806bb2487
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GPG key ID: 4A4CED6D7EDF950A
7 changed files with 880 additions and 9 deletions
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device/testing/linux-postmarketos-mediatek-mt8183/0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch Normal file
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@ -0,0 +1,572 @@
From ae92d9b9f1bd0b7c26fb49bc8256356ae3734e97 Mon Sep 17 00:00:00 2001
From: xiazhengqiao <xiazhengqiao@huaqin.corp-partner.google.com>
Date: Mon, 8 Nov 2021 18:06:08 +0800
Subject: [PATCH 1/5] drm/panel: Add inx Himax8279d MIPI-DSI LCD panel driver
Add STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
Signed-off-by: xiazhengqiao <xiazhengqiao@huaqin.corp-partner.google.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile | 1 +
.../gpu/drm/panel/panel-innolux-himax8279d.c | 515 ++++++++++++++++++
3 files changed, 525 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-innolux-himax8279d.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ddf5f38e8731..375a67f69230 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -180,6 +180,15 @@ config DRM_PANEL_INNOLUX_EJ030NA
320x480 3.0" panel as found in the RS97 V2.1, RG300(non-ips)
and LDK handheld gaming consoles.
+config DRM_PANEL_INNOLUX_HIMAX8279D
+ tristate "INX 2081101qfh032011-53g 1200x1920 video panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to support for inx 2081101qfh032011-53g
+ 1200x1920 video panel.
+
config DRM_PANEL_INNOLUX_P079ZCA
tristate "Innolux P079ZCA panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 5740911f637c..a57e72dcbb12 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
+obj-$(CONFIG_DRM_PANEL_INNOLUX_HIMAX8279D) += panel-innolux-himax8279d.o
obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
obj-$(CONFIG_DRM_PANEL_JDI_R63452) += panel-jdi-fhd-r63452.o
diff --git a/drivers/gpu/drm/panel/panel-innolux-himax8279d.c b/drivers/gpu/drm/panel/panel-innolux-himax8279d.c
new file mode 100644
index 000000000000..6840449548e4
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-innolux-himax8279d.c
@@ -0,0 +1,515 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021, Huaqin Telecom Technology Co., Ltd
+ * Author: Zhengqiao Xia <xiazhengqiao@huaqin.corp-partner.google.com>
+ */
+
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drm_connector.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+
+#include <video/mipi_display.h>
+
+struct panel_desc {
+ const struct drm_display_mode *modes;
+ unsigned int bpc;
+
+ /**
+ * @width_mm: width of the panel's active display area
+ * @height_mm: height of the panel's active display area
+ */
+ struct {
+ unsigned int width_mm;
+ unsigned int height_mm;
+ } size;
+
+ unsigned long mode_flags;
+ enum mipi_dsi_pixel_format format;
+ const struct panel_init_cmd *init_cmds;
+ unsigned int lanes;
+ bool discharge_on_disable;
+};
+
+struct inx_panel {
+ struct drm_panel base;
+ struct mipi_dsi_device *dsi;
+
+ const struct panel_desc *desc;
+
+ enum drm_panel_orientation orientation;
+ struct regulator *pp1800;
+ struct regulator *avee;
+ struct regulator *avdd;
+ struct gpio_desc *enable_gpio;
+
+ bool prepared;
+};
+
+enum dsi_cmd_type {
+ INIT_DCS_CMD,
+ DELAY_CMD,
+};
+
+struct panel_init_cmd {
+ enum dsi_cmd_type type;
+ size_t len;
+ const char *data;
+};
+
+#define _INIT_DCS_CMD(...) { \
+ .type = INIT_DCS_CMD, \
+ .len = sizeof((char[]){__VA_ARGS__}), \
+ .data = (char[]){__VA_ARGS__} }
+
+#define _INIT_DELAY_CMD(...) { \
+ .type = DELAY_CMD,\
+ .len = sizeof((char[]){__VA_ARGS__}), \
+ .data = (char[]){__VA_ARGS__} }
+
+static const struct panel_init_cmd starry_qfh032011_53g_init_cmd[] = {
+ _INIT_DCS_CMD(0xB0, 0x01),
+ _INIT_DCS_CMD(0xC3, 0x4F),
+ _INIT_DCS_CMD(0xC4, 0x40),
+ _INIT_DCS_CMD(0xC5, 0x40),
+ _INIT_DCS_CMD(0xC6, 0x40),
+ _INIT_DCS_CMD(0xC7, 0x40),
+ _INIT_DCS_CMD(0xC8, 0x4D),
+ _INIT_DCS_CMD(0xC9, 0x52),
+ _INIT_DCS_CMD(0xCA, 0x51),
+ _INIT_DCS_CMD(0xCD, 0x5D),
+ _INIT_DCS_CMD(0xCE, 0x5B),
+ _INIT_DCS_CMD(0xCF, 0x4B),
+ _INIT_DCS_CMD(0xD0, 0x49),
+ _INIT_DCS_CMD(0xD1, 0x47),
+ _INIT_DCS_CMD(0xD2, 0x45),
+ _INIT_DCS_CMD(0xD3, 0x41),
+ _INIT_DCS_CMD(0xD7, 0x50),
+ _INIT_DCS_CMD(0xD8, 0x40),
+ _INIT_DCS_CMD(0xD9, 0x40),
+ _INIT_DCS_CMD(0xDA, 0x40),
+ _INIT_DCS_CMD(0xDB, 0x40),
+ _INIT_DCS_CMD(0xDC, 0x4E),
+ _INIT_DCS_CMD(0xDD, 0x52),
+ _INIT_DCS_CMD(0xDE, 0x51),
+ _INIT_DCS_CMD(0xE1, 0x5E),
+ _INIT_DCS_CMD(0xE2, 0x5C),
+ _INIT_DCS_CMD(0xE3, 0x4C),
+ _INIT_DCS_CMD(0xE4, 0x4A),
+ _INIT_DCS_CMD(0xE5, 0x48),
+ _INIT_DCS_CMD(0xE6, 0x46),
+ _INIT_DCS_CMD(0xE7, 0x42),
+ _INIT_DCS_CMD(0xB0, 0x03),
+ _INIT_DCS_CMD(0xBE, 0x03),
+ _INIT_DCS_CMD(0xCC, 0x44),
+ _INIT_DCS_CMD(0xC8, 0x07),
+ _INIT_DCS_CMD(0xC9, 0x05),
+ _INIT_DCS_CMD(0xCA, 0x42),
+ _INIT_DCS_CMD(0xCD, 0x3E),
+ _INIT_DCS_CMD(0xCF, 0x60),
+ _INIT_DCS_CMD(0xD2, 0x04),
+ _INIT_DCS_CMD(0xD3, 0x04),
+ _INIT_DCS_CMD(0xD4, 0x01),
+ _INIT_DCS_CMD(0xD5, 0x00),
+ _INIT_DCS_CMD(0xD6, 0x03),
+ _INIT_DCS_CMD(0xD7, 0x04),
+ _INIT_DCS_CMD(0xD9, 0x01),
+ _INIT_DCS_CMD(0xDB, 0x01),
+ _INIT_DCS_CMD(0xE4, 0xF0),
+ _INIT_DCS_CMD(0xE5, 0x0A),
+ _INIT_DCS_CMD(0xB0, 0x00),
+ _INIT_DCS_CMD(0xCC, 0x08),
+ _INIT_DCS_CMD(0xC2, 0x08),
+ _INIT_DCS_CMD(0xC4, 0x10),
+ _INIT_DCS_CMD(0xB0, 0x02),
+ _INIT_DCS_CMD(0xC0, 0x00),
+ _INIT_DCS_CMD(0xC1, 0x0A),
+ _INIT_DCS_CMD(0xC2, 0x20),
+ _INIT_DCS_CMD(0xC3, 0x24),
+ _INIT_DCS_CMD(0xC4, 0x23),
+ _INIT_DCS_CMD(0xC5, 0x29),
+ _INIT_DCS_CMD(0xC6, 0x23),
+ _INIT_DCS_CMD(0xC7, 0x1C),
+ _INIT_DCS_CMD(0xC8, 0x19),
+ _INIT_DCS_CMD(0xC9, 0x17),
+ _INIT_DCS_CMD(0xCA, 0x17),
+ _INIT_DCS_CMD(0xCB, 0x18),
+ _INIT_DCS_CMD(0xCC, 0x1A),
+ _INIT_DCS_CMD(0xCD, 0x1E),
+ _INIT_DCS_CMD(0xCE, 0x20),
+ _INIT_DCS_CMD(0xCF, 0x23),
+ _INIT_DCS_CMD(0xD0, 0x07),
+ _INIT_DCS_CMD(0xD1, 0x00),
+ _INIT_DCS_CMD(0xD2, 0x00),
+ _INIT_DCS_CMD(0xD3, 0x0A),
+ _INIT_DCS_CMD(0xD4, 0x13),
+ _INIT_DCS_CMD(0xD5, 0x1C),
+ _INIT_DCS_CMD(0xD6, 0x1A),
+ _INIT_DCS_CMD(0xD7, 0x13),
+ _INIT_DCS_CMD(0xD8, 0x17),
+ _INIT_DCS_CMD(0xD9, 0x1C),
+ _INIT_DCS_CMD(0xDA, 0x19),
+ _INIT_DCS_CMD(0xDB, 0x17),
+ _INIT_DCS_CMD(0xDC, 0x17),
+ _INIT_DCS_CMD(0xDD, 0x18),
+ _INIT_DCS_CMD(0xDE, 0x1A),
+ _INIT_DCS_CMD(0xDF, 0x1E),
+ _INIT_DCS_CMD(0xE0, 0x20),
+ _INIT_DCS_CMD(0xE1, 0x23),
+ _INIT_DCS_CMD(0xE2, 0x07),
+ _INIT_DCS_CMD(0X11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0X29),
+ _INIT_DELAY_CMD(80),
+ {},
+};
+
+static inline struct inx_panel *to_inx_panel(struct drm_panel *panel)
+{
+ return container_of(panel, struct inx_panel, base);
+}
+
+static int inx_panel_init_dcs_cmd(struct inx_panel *inx)
+{
+ struct mipi_dsi_device *dsi = inx->dsi;
+ struct drm_panel *panel = &inx->base;
+ int i, err = 0;
+
+ if (inx->desc->init_cmds) {
+ const struct panel_init_cmd *init_cmds = inx->desc->init_cmds;
+
+ for (i = 0; init_cmds[i].len != 0; i++) {
+ const struct panel_init_cmd *cmd = &init_cmds[i];
+
+ switch (cmd->type) {
+ case DELAY_CMD:
+ msleep(cmd->data[0]);
+ err = 0;
+ break;
+
+ case INIT_DCS_CMD:
+ err = mipi_dsi_dcs_write(dsi, cmd->data[0],
+ cmd->len <= 1 ? NULL :
+ &cmd->data[1],
+ cmd->len - 1);
+ break;
+
+ default:
+ err = -EINVAL;
+ }
+
+ if (err < 0) {
+ dev_err(panel->dev,
+ "failed to write command %u\n", i);
+ return err;
+ }
+ }
+ }
+ return 0;
+}
+
+static int inx_panel_enter_sleep_mode(struct inx_panel *inx)
+{
+ struct mipi_dsi_device *dsi = inx->dsi;
+ int ret;
+
+ dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+ ret = mipi_dsi_dcs_set_display_off(dsi);
+ if (ret < 0)
+ return ret;
+
+ ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static int inx_panel_unprepare(struct drm_panel *panel)
+{
+ struct inx_panel *inx = to_inx_panel(panel);
+ int ret;
+
+ if (!inx->prepared)
+ return 0;
+
+ ret = inx_panel_enter_sleep_mode(inx);
+ if (ret < 0) {
+ dev_err(panel->dev, "failed to set panel off: %d\n", ret);
+ return ret;
+ }
+
+ msleep(150);
+
+ if (inx->desc->discharge_on_disable) {
+ regulator_disable(inx->avee);
+ regulator_disable(inx->avdd);
+ usleep_range(5000, 7000);
+ gpiod_set_value(inx->enable_gpio, 0);
+ usleep_range(5000, 7000);
+ regulator_disable(inx->pp1800);
+ } else {
+ gpiod_set_value(inx->enable_gpio, 0);
+ usleep_range(500, 1000);
+ regulator_disable(inx->avee);
+ regulator_disable(inx->avdd);
+ usleep_range(5000, 7000);
+ regulator_disable(inx->pp1800);
+ }
+
+ inx->prepared = false;
+
+ return 0;
+}
+
+static int inx_panel_prepare(struct drm_panel *panel)
+{
+ struct inx_panel *inx = to_inx_panel(panel);
+ int ret;
+
+ if (inx->prepared)
+ return 0;
+
+ gpiod_set_value(inx->enable_gpio, 0);
+ usleep_range(1000, 1500);
+
+ ret = regulator_enable(inx->pp1800);
+ if (ret < 0)
+ return ret;
+
+ usleep_range(3000, 5000);
+
+ ret = regulator_enable(inx->avdd);
+ if (ret < 0)
+ goto poweroff1v8;
+ ret = regulator_enable(inx->avee);
+ if (ret < 0)
+ goto poweroffavdd;
+
+ usleep_range(5000, 10000);
+
+ gpiod_set_value(inx->enable_gpio, 1);
+ usleep_range(1000, 2000);
+ gpiod_set_value(inx->enable_gpio, 0);
+ usleep_range(1000, 2000);
+ gpiod_set_value(inx->enable_gpio, 1);
+ usleep_range(6000, 10000);
+
+ ret = inx_panel_init_dcs_cmd(inx);
+ if (ret < 0) {
+ dev_err(panel->dev, "failed to init panel: %d\n", ret);
+ goto poweroff;
+ }
+
+ inx->prepared = true;
+
+ return 0;
+
+poweroff:
+ regulator_disable(inx->avee);
+poweroffavdd:
+ regulator_disable(inx->avdd);
+poweroff1v8:
+ usleep_range(5000, 7000);
+ regulator_disable(inx->pp1800);
+ gpiod_set_value(inx->enable_gpio, 0);
+
+ return ret;
+}
+
+static int inx_panel_enable(struct drm_panel *panel)
+{
+ msleep(130);
+ return 0;
+}
+
+static const struct drm_display_mode starry_qfh032011_53g_default_mode = {
+ .clock = 165731,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 100,
+ .hsync_end = 1200 + 100 + 10,
+ .htotal = 1200 + 100 + 10 + 100,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 14,
+ .vsync_end = 1920 + 14 + 10,
+ .vtotal = 1920 + 14 + 10 + 15,
+};
+
+static const struct panel_desc starry_qfh032011_53g_desc = {
+ .modes = &starry_qfh032011_53g_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 135,
+ .height_mm = 216,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_qfh032011_53g_init_cmd,
+ .discharge_on_disable = false,
+};
+
+static int inx_panel_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ struct inx_panel *inx = to_inx_panel(panel);
+ const struct drm_display_mode *m = inx->desc->modes;
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_duplicate(connector->dev, m);
+ if (!mode) {
+ dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
+ m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
+ return -ENOMEM;
+ }
+
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+ drm_mode_set_name(mode);
+ drm_mode_probed_add(connector, mode);
+
+ connector->display_info.width_mm = inx->desc->size.width_mm;
+ connector->display_info.height_mm = inx->desc->size.height_mm;
+ connector->display_info.bpc = inx->desc->bpc;
+ drm_connector_set_panel_orientation(connector, inx->orientation);
+
+ return 1;
+}
+
+static const struct drm_panel_funcs inx_panel_funcs = {
+ .unprepare = inx_panel_unprepare,
+ .prepare = inx_panel_prepare,
+ .enable = inx_panel_enable,
+ .get_modes = inx_panel_get_modes,
+};
+
+static int inx_panel_add(struct inx_panel *inx)
+{
+ struct device *dev = &inx->dsi->dev;
+ int err;
+
+ inx->avdd = devm_regulator_get(dev, "avdd");
+ if (IS_ERR(inx->avdd))
+ return PTR_ERR(inx->avdd);
+
+ inx->avee = devm_regulator_get(dev, "avee");
+ if (IS_ERR(inx->avee))
+ return PTR_ERR(inx->avee);
+
+ inx->pp1800 = devm_regulator_get(dev, "pp1800");
+ if (IS_ERR(inx->pp1800))
+ return PTR_ERR(inx->pp1800);
+
+ inx->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
+ if (IS_ERR(inx->enable_gpio)) {
+ dev_err(dev, "cannot get reset-gpios %ld\n",
+ PTR_ERR(inx->enable_gpio));
+ return PTR_ERR(inx->enable_gpio);
+ }
+
+ gpiod_set_value(inx->enable_gpio, 0);
+
+ drm_panel_init(&inx->base, dev, &inx_panel_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+ err = of_drm_get_panel_orientation(dev->of_node, &inx->orientation);
+ if (err < 0) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
+ return err;
+ }
+
+ err = drm_panel_of_backlight(&inx->base);
+ if (err)
+ return err;
+
+ inx->base.funcs = &inx_panel_funcs;
+ inx->base.dev = &inx->dsi->dev;
+
+ drm_panel_add(&inx->base);
+
+ return 0;
+}
+
+static int inx_panel_probe(struct mipi_dsi_device *dsi)
+{
+ struct inx_panel *inx;
+ int ret;
+ const struct panel_desc *desc;
+
+ inx = devm_kzalloc(&dsi->dev, sizeof(*inx), GFP_KERNEL);
+ if (!inx)
+ return -ENOMEM;
+
+ desc = of_device_get_match_data(&dsi->dev);
+ dsi->lanes = desc->lanes;
+ dsi->format = desc->format;
+ dsi->mode_flags = desc->mode_flags;
+ inx->desc = desc;
+ inx->dsi = dsi;
+ ret = inx_panel_add(inx);
+ if (ret < 0)
+ return ret;
+
+ mipi_dsi_set_drvdata(dsi, inx);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret)
+ drm_panel_remove(&inx->base);
+
+ return ret;
+}
+
+static void inx_panel_shutdown(struct mipi_dsi_device *dsi)
+{
+ struct inx_panel *inx = mipi_dsi_get_drvdata(dsi);
+
+ drm_panel_disable(&inx->base);
+ drm_panel_unprepare(&inx->base);
+}
+
+static int inx_panel_remove(struct mipi_dsi_device *dsi)
+{
+ struct inx_panel *inx = mipi_dsi_get_drvdata(dsi);
+ int ret;
+
+ inx_panel_shutdown(dsi);
+
+ ret = mipi_dsi_detach(dsi);
+ if (ret < 0)
+ dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
+
+ if (inx->base.dev)
+ drm_panel_remove(&inx->base);
+
+ return 0;
+}
+
+static const struct of_device_id inx_of_match[] = {
+ { .compatible = "starry,2081101qfh032011-53g",
+ .data = &starry_qfh032011_53g_desc
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, inx_of_match);
+
+static struct mipi_dsi_driver inx_panel_driver = {
+ .driver = {
+ .name = "panel-innolux-himax8279d",
+ .of_match_table = inx_of_match,
+ },
+ .probe = inx_panel_probe,
+ .remove = inx_panel_remove,
+ .shutdown = inx_panel_shutdown,
+};
+module_mipi_dsi_driver(inx_panel_driver);
+
+MODULE_AUTHOR("Zhengqiao Xia <xiazhengqiao@huaqin.corp-partner.google.com>");
+MODULE_DESCRIPTION("INNOLUX HIMAX8279D 1200x1920 video mode panel driver");
+MODULE_LICENSE("GPL v2");
--
2.39.1

124
device/testing/linux-postmarketos-mediatek-mt8183/0002-arm64-dts-mt8183-Add-katsu-board.patch Normal file
View file

@ -0,0 +1,124 @@
From 61ddff1482c49b9720849647937a22e47b225c4f Mon Sep 17 00:00:00 2001
From: Hsin-Yi Wang <hsinyi@chromium.org>
Date: Mon, 13 Dec 2021 15:23:52 +0800
Subject: [PATCH 2/5] arm64: dts: mt8183: Add katsu board
Katsu is known as ASUS Chromebook Detachable CZ1.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
arch/arm64/boot/dts/mediatek/Makefile | 2 +
.../dts/mediatek/mt8183-kukui-katsu-sku32.dts | 38 +++++++++++++++++
.../dts/mediatek/mt8183-kukui-katsu-sku38.dts | 42 +++++++++++++++++++
3 files changed, 82 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index 8c1e18032f9f..cb8d563d079f 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -30,6 +30,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu-sku22.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-katsu-sku32.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-katsu-sku38.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts
new file mode 100644
index 000000000000..f923b8c3c49c
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-kakadu.dtsi"
+#include "mt8183-kukui-audio-da7219-rt1015p.dtsi"
+
+/ {
+ model = "MediaTek katsu board";
+ compatible = "google,katsu-sku32", "google,katsu", "mediatek,mt8183";
+};
+
+&i2c0 {
+ status = "okay";
+
+ /delete-node/touchscreen@10;
+ touchscreen1: touchscreen@5d {
+ compatible = "goodix,gt7375p";
+ reg = <0x5d>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&open_touch>;
+
+ interrupt-parent = <&pio>;
+ interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
+
+ reset-gpios = <&pio 156 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&panel {
+ compatible = "starry,2081101qfh032011-53g";
+};
+
+&qca_wifi {
+ qcom,ath10k-calibration-variant = "GO_KATSU";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts
new file mode 100644
index 000000000000..1ab14096a279
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-kakadu.dtsi"
+#include "mt8183-kukui-audio-rt1015p.dtsi"
+
+/ {
+ model = "MediaTek katsu sku38 board";
+ compatible = "google,katsu-sku38", "google,katsu", "mediatek,mt8183";
+};
+
+&i2c0 {
+ status = "okay";
+
+ /delete-node/touchscreen@10;
+ touchscreen1: touchscreen@5d {
+ compatible = "goodix,gt7375p";
+ reg = <0x5d>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&open_touch>;
+
+ interrupt-parent = <&pio>;
+ interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
+
+ reset-gpios = <&pio 156 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&panel {
+ compatible = "starry,2081101qfh032011-53g";
+};
+
+&qca_wifi {
+ qcom,ath10k-calibration-variant = "GO_KATSU";
+};
+
+&sound {
+ compatible = "mediatek,mt8183_mt6358_ts3a227_rt1015p";
+};
--
2.39.1

92
device/testing/linux-postmarketos-mediatek-mt8183/0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch Normal file
View file

@ -0,0 +1,92 @@
From 873c0534790f2f367c5a1851d16c37c3368bcd7f Mon Sep 17 00:00:00 2001
From: Hsin-Yi Wang <hsinyi@chromium.org>
Date: Mon, 13 Dec 2021 15:23:53 +0800
Subject: [PATCH 3/5] arm64: dts: mt8183: Add kukui-jacuzzi-makomo board
Makomo is known as Lenovo 100e Gen 2.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
arch/arm64/boot/dts/mediatek/Makefile | 2 ++
.../mt8183-kukui-jacuzzi-makomo-sku0.dts | 24 +++++++++++++++++++
.../mt8183-kukui-jacuzzi-makomo-sku1.dts | 24 +++++++++++++++++++
3 files changed, 50 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index cb8d563d079f..57b33de22981 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -26,6 +26,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel14-sku2.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kenzo.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-makomo-sku0.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-makomo-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts
new file mode 100644
index 000000000000..51bf2893ec03
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-fennel.dtsi"
+#include "mt8183-kukui-audio-da7219-rt1015p.dtsi"
+
+/ {
+ model = "Google makomo sku0 board";
+ compatible = "google,makomo-rev4-sku0", "google,makomo-rev5-sku0",
+ "google,makomo", "mediatek,mt8183";
+};
+
+&qca_wifi {
+ qcom,ath10k-calibration-variant = "GO_FENNEL14";
+};
+
+&mmc1_pins_uhs {
+ pins_clk {
+ drive-strength = <MTK_DRIVE_6mA>;
+ };
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts
new file mode 100644
index 000000000000..c3b7e9bb0c89
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2021 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-fennel.dtsi"
+#include "mt8183-kukui-audio-ts3a227e-rt1015p.dtsi"
+
+/ {
+ model = "Google makomo sku1 board";
+ compatible = "google,makomo-rev4-sku1", "google,makomo-rev5-sku1",
+ "google,makomo", "mediatek,mt8183";
+};
+
+&qca_wifi {
+ qcom,ath10k-calibration-variant = "GO_FENNEL14";
+};
+
+&mmc1_pins_uhs {
+ pins_clk {
+ drive-strength = <MTK_DRIVE_6mA>;
+ };
+};
--
2.39.1

33
device/testing/linux-postmarketos-mediatek-mt8183/0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch Normal file
View file

@ -0,0 +1,33 @@
From 2201a9e503a183c00c46b68313583539f82c377a Mon Sep 17 00:00:00 2001
From: Hsin-Yi Wang <hsinyi@chromium.org>
Date: Mon, 13 Dec 2021 15:23:54 +0800
Subject: [PATCH 4/5] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-katsu
Katsu is known as ASUS Chromebook Detachable CZ1.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml
index ab0593c77321..1fdb9a91635d 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek.yaml
@@ -187,6 +187,13 @@ properties:
items:
- const: google,kappa
- const: mediatek,mt8183
+ - description: Google Katsu (ASUS Chromebook Detachable CZ1)
+ items:
+ - enum:
+ - google,katsu-sku32
+ - google,katsu-sku38
+ - const: google,katsu
+ - const: mediatek,mt8183
- description: Google Kodama (Lenovo 10e Chromebook Tablet)
items:
- enum:
--
2.39.1

41
device/testing/linux-postmarketos-mediatek-mt8183/0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch Normal file
View file

@ -0,0 +1,41 @@
From 01a91263c79ec7730e3c6eb4ed71436f2e14639d Mon Sep 17 00:00:00 2001
From: Hsin-Yi Wang <hsinyi@chromium.org>
Date: Mon, 13 Dec 2021 15:23:55 +0800
Subject: [PATCH 5/5] dt-bindings: arm64: dts: mediatek: Add
mt8183-kukui-jacuzzi-makomo
Makomo is known as Lenovo 100e Gen 2 Chromebook.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
.../devicetree/bindings/arm/mediatek.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml
index 1fdb9a91635d..f13c7c66cfbb 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek.yaml
@@ -203,6 +203,20 @@ properties:
- google,kodama-sku32
- const: google,kodama
- const: mediatek,mt8183
+ - description: Google Makomo (Lenovo 100e Gen 2)
+ items:
+ - enum:
+ - const: google,makomo-rev4-sku0
+ - const: google,makomo-rev5-sku0
+ - const: google,makomo
+ - const: mediatek,mt8183
+ - description: Google Makomo (Lenovo 100e Gen 2)
+ items:
+ - enum:
+ - const: google,makomo-rev4-sku1
+ - const: google,makomo-rev5-sku1
+ - const: google,makomo
+ - const: mediatek,mt8183
- description: Google Willow (Acer Chromebook 311 C722/C722T)
items:
- enum:
--
2.39.1

18
device/testing/linux-postmarketos-mediatek-mt8183/APKBUILD
View file

@ -2,7 +2,7 @@
# Co-Maintainer: Jenneron <jenneron@protonmail.com>
pkgname=linux-postmarketos-mediatek-mt8183
pkgver=5.18
pkgrel=1
pkgrel=2
pkgdesc="Mainline kernel for mediatek mt8183"
arch="aarch64"
_flavor="${pkgname#linux-}"
@ -17,7 +17,7 @@ makedepends="
devicepkg-dev
findutils
flex
installkernel
postmarketos-installkernel
openssl-dev
perl
rsync
@ -26,8 +26,6 @@ makedepends="
gmp-dev
mpc1-dev
mpfr-dev
u-boot-tools
vboot-utils
lz4
zstd
"
@ -44,6 +42,11 @@ esac
source="
https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-$_kernver.tar.xz
0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch
0002-arm64-dts-mt8183-Add-katsu-board.patch
0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch
0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch
0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch
mt8183-cadmium-improved-kukui.gpu.patch
mt8183-cadmium-kukui.move-gpu-opp-to-3.patch
mt8183-cadmium-improved-kukui.opp-multi-regulator.patch
@ -99,6 +102,11 @@ package() {
sha512sums="
dbbc9d1395898a498fa4947fceda1781344fa5d360240f753810daa4fa88e519833e2186c4e582a8f1836e6413e9e85f6563c7770523b704e8702d67622f98b5 linux-5.18.tar.xz
3c2b433fc1e3514f4d32e2ddd811f5536958857da55ab22f98278b91733b8b1a06945665df0deadaf57a0458d248dc659e1dcdf5a196ce49d7a3c704cb313878 0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch
c0b38b2d4b827cf34b8474d78f588528e1aa665ed091301c0bd970ae10aba642551d7eff9fbea4b7accf0906b41c00f4e1108e1c7573041fea4f2fcd13045c65 0002-arm64-dts-mt8183-Add-katsu-board.patch
385fe4f278f16af63ad416c195366974d0fad6ca3eaa63e4ccf052175f183ec0da263d4b5964273420bd4e1e5d1a0761f170f38e7c941ee617a8ccab84d6cf21 0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch
2748f1f3ec84de63a2d4a7a254cefdd88ccd52d70193d268f55df8a0b51b4d288ffa3153e16d15a27d60eaa4552132090901633b49d0b062f8a3b11447efe8f9 0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch
912519749bcdac4ee13178078e3bcef5a3a64d9527a368dd39e387224c21c01f3d54586728585f434147cbc507e5906c41e5f3597f2a975dca7468b0e7e96b90 0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch
efbb379c2c0e14116a4a941993fb4df243dde9d7477177e903b283356ebaa57ee78a685632effbb43208f25a5e490779385a36dcb1b19e96eadb46547b2c85db mt8183-cadmium-improved-kukui.gpu.patch
e79b5b652bfb44e7fc293d08c3b5355a8f6456389c05c29167cfaf5bf45cf19555f2b2e50aca8e93e8876f64ed09d63e0483f5b8c492a47d9d2e3e72413c4e45 mt8183-cadmium-kukui.move-gpu-opp-to-3.patch
0252db7a1e3b6b041b351aaa17323e45e286b41b369945be483b4ce2be2fa6600124d12b8871e3bea50ca07949e12e90e9cc7c8a3a37ad19cd02677eb7bebd89 mt8183-cadmium-improved-kukui.opp-multi-regulator.patch
@ -121,5 +129,5 @@ f0e78266b8d5db67476ca47fc115830d4296182486d88744d714b05bed35c4976b82a59a7aa4fb36
e9a128a8ddd98c6c8957ba45186afa2ea8ebeac83d4f2db3ff9ee8a5dd8027af90868c334a7b456bfe7dce793517f27ad63efa220bc933e3407f6362da6d7b2a mt8183-kukui-jacuzzi-hack-dpms-resume.patch
8ab89b0845d3aaee9ae5d244e7880601f21b85b159677464960c1e08cf20038db2a8ad1b57c9ed99d817735ad450d0e4d4fe9051cb1808dd08a00e2f68af5028 mt8183-cadmium-kukui.gpu-vsram.patch
863966b986c3680d013ba81e02e2d0a5f092d95ef6d3b60cb6991ca7acc3c4ce5323e528b3190b95e594f72c1b0ae26f7b8db20e118557850161777a90e2b45f mt8183-panel-orientation.patch
39e8bcd5eb1552ed3ea348e6947212947dd3d02dff22f8874a535d071cfc7bacb143699c15bcda516fa341039220f81b143a07c83c1a39be4df02234e93a2020 config-postmarketos-mediatek-mt8183.aarch64
5dd10e26aa90b9610a3ac9fa643aed72b727860cfcc949e087bbd1a963256aeb51b8d9785f778c7a766df8d421442c767da9e9b7da0be67a4dc02ff98de7dd8c config-postmarketos-mediatek-mt8183.aarch64
"

9
device/testing/linux-postmarketos-mediatek-mt8183/config-postmarketos-mediatek-mt8183.aarch64
View file

@ -2,14 +2,14 @@
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 5.18.0 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="gcc (Alpine 12.2.1_git20220924-r4) 12.2.1 20220924"
CONFIG_CC_VERSION_TEXT="gcc (Alpine 12.2.1_git20220924-r8) 12.2.1 20220924"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=120201
CONFIG_CLANG_VERSION=0
CONFIG_AS_IS_GNU=y
CONFIG_AS_VERSION=23900
CONFIG_AS_VERSION=24000
CONFIG_LD_IS_BFD=y
CONFIG_LD_VERSION=23900
CONFIG_LD_VERSION=24000
CONFIG_LLD_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_CAN_LINK_STATIC=y
@ -4565,6 +4565,7 @@ CONFIG_DRM_PANEL_EDP=y
# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set
# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set
CONFIG_DRM_PANEL_INNOLUX_HIMAX8279D=y
CONFIG_DRM_PANEL_INNOLUX_P079ZCA=y
# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
# CONFIG_DRM_PANEL_JDI_R63452 is not set
@ -5326,7 +5327,7 @@ CONFIG_USB_HID=y
# I2C HID support
#
CONFIG_I2C_HID_OF=m
# CONFIG_I2C_HID_OF_GOODIX is not set
CONFIG_I2C_HID_OF_GOODIX=m
# end of I2C HID support
CONFIG_I2C_HID_CORE=m