56 lines
1.9 KiB
Diff
56 lines
1.9 KiB
Diff
|
From 91ceaa78ab678743d5b998657160dc3f82a99944 Mon Sep 17 00:00:00 2001
|
||
|
From: Andre Przywara <andre.przywara@arm.com>
|
||
|
Date: Wed, 28 Apr 2021 23:53:04 +0100
|
||
|
Subject: [PATCH 19/29] sunxi: H616: Enable full 4GB of DRAM
|
||
|
|
||
|
The H616 is our first supported Allwinner SoC which goes beyond the 4GB
|
||
|
address space "barrier", by having more than 32 address bits.
|
||
|
|
||
|
Lift the preliminary 3GB DRAM limit for the H616, and update the page
|
||
|
table setup on the way, to actually map that last GB as well.
|
||
|
|
||
|
This will presumably break the EMAC, as the DMA descriptors only hold
|
||
|
32 bits worth of addresses, but this is no problem for now, as all
|
||
|
boards with 4GB of DRAM cannot use the EMAC at the moment (missing
|
||
|
PHY support).
|
||
|
|
||
|
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
||
|
---
|
||
|
arch/arm/mach-sunxi/Kconfig | 4 ++--
|
||
|
arch/arm/mach-sunxi/board.c | 2 +-
|
||
|
2 files changed, 3 insertions(+), 3 deletions(-)
|
||
|
|
||
|
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
|
||
|
index d409ab3051..b0191d0080 100644
|
||
|
--- a/arch/arm/mach-sunxi/Kconfig
|
||
|
+++ b/arch/arm/mach-sunxi/Kconfig
|
||
|
@@ -191,10 +191,10 @@ config MACH_SUNXI_H3_H5
|
||
|
select SUPPORT_SPL
|
||
|
|
||
|
# TODO: try out A80's 8GiB DRAM space
|
||
|
-# TODO: H616 supports 4 GiB DRAM space
|
||
|
config SUNXI_DRAM_MAX_SIZE
|
||
|
hex
|
||
|
- default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6 || MACH_SUN50I_H616
|
||
|
+ default 0x100000000 if MACH_SUN50I_H616
|
||
|
+ default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6
|
||
|
default 0x80000000
|
||
|
|
||
|
choice
|
||
|
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
|
||
|
index 8147f250f8..fe9d292e8e 100644
|
||
|
--- a/arch/arm/mach-sunxi/board.c
|
||
|
+++ b/arch/arm/mach-sunxi/board.c
|
||
|
@@ -56,7 +56,7 @@ static struct mm_region sunxi_mem_map[] = {
|
||
|
/* RAM */
|
||
|
.virt = 0x40000000UL,
|
||
|
.phys = 0x40000000UL,
|
||
|
- .size = 0xC0000000UL,
|
||
|
+ .size = CONFIG_SUNXI_DRAM_MAX_SIZE,
|
||
|
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||
|
PTE_BLOCK_INNER_SHARE
|
||
|
}, {
|
||
|
--
|
||
|
2.31.1
|
||
|
|