2021-05-26 00:17:37 +00:00
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From 8d4a1c39146442252ac5666889eab7f0160779b0 Mon Sep 17 00:00:00 2001
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2021-05-07 07:15:58 +00:00
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From: Angus Ainslie <angus@akkea.ca>
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Date: Sun, 25 Apr 2021 07:49:49 -0700
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Subject: [PATCH] arm64: dts: imx8mq-librem5.dtsi: adjust the usdhc bus speeds
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Limit the usdhc2 bus speed
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Match usdhc1 and usdhs2 bus clocks
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Signed-off-by: Angus Ainslie <angus@akkea.ca>
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---
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arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
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2021-05-26 00:17:37 +00:00
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index b2345dd6cc17..8b3d310f976d 100644
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2021-05-07 07:15:58 +00:00
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--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
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+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
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2021-05-26 00:17:37 +00:00
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@@ -1723,7 +1723,7 @@ mass-storage@1 {
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2021-05-07 07:15:58 +00:00
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&usdhc1 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
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- assigned-clock-rates = <400000000>;
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+ assigned-clock-rates = <200000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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2021-05-26 00:17:37 +00:00
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@@ -1750,6 +1750,7 @@ &usdhc2 {
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2021-05-07 07:15:58 +00:00
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cap-sdio-irq;
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keep-power-in-suspend;
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wakeup-source;
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+ max-frequency = <50000000>;
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status = "okay";
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};
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--
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2.31.1
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