74 lines
2 KiB
Diff
74 lines
2 KiB
Diff
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From af0ac30c08414e65f299149285dc81de664fc3f0 Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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Date: Fri, 18 Dec 2020 22:02:11 +0000
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Subject: [PATCH 01/29] mmc: sunxi: Avoid #ifdefs in delay and width setup
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The delay and bus-width setup are slightly different across the
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Allwinner SoC generations, and we covered this so far with some
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preprocessor conditionals.
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Use the more readable IS_ENABLE() instead.
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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---
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drivers/mmc/sunxi_mmc.c | 33 +++++++++++++++------------------
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1 file changed, 15 insertions(+), 18 deletions(-)
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diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
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index 3503ccdb2e..87b79fcf5e 100644
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--- a/drivers/mmc/sunxi_mmc.c
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+++ b/drivers/mmc/sunxi_mmc.c
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@@ -156,23 +156,19 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
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} else if (hz <= 25000000) {
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oclk_dly = 0;
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sclk_dly = 5;
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-#ifdef CONFIG_MACH_SUN9I
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- } else if (hz <= 52000000) {
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- oclk_dly = 5;
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- sclk_dly = 4;
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- } else {
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- /* hz > 52000000 */
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- oclk_dly = 2;
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- sclk_dly = 4;
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-#else
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- } else if (hz <= 52000000) {
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- oclk_dly = 3;
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- sclk_dly = 4;
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} else {
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- /* hz > 52000000 */
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- oclk_dly = 1;
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+ if (IS_ENABLED(CONFIG_MACH_SUN9I)) {
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+ if (hz <= 52000000)
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+ oclk_dly = 5;
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+ else
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+ oclk_dly = 2;
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+ } else {
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+ if (hz <= 52000000)
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+ oclk_dly = 3;
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+ else
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+ oclk_dly = 1;
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+ }
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sclk_dly = 4;
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-#endif
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}
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if (new_mode) {
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@@ -521,10 +517,11 @@ struct mmc *sunxi_mmc_init(int sdc_no)
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cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
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cfg->host_caps = MMC_MODE_4BIT;
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-#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I) || defined(CONFIG_SUN50I_GEN_H6)
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- if (sdc_no == 2)
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+
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+ if ((IS_ENABLED(CONFIG_MACH_SUN50I) || IS_ENABLED(CONFIG_MACH_SUN8I) ||
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+ IS_ENABLED(CONFIG_SUN50I_GEN_H6)) && (sdc_no == 2))
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cfg->host_caps = MMC_MODE_8BIT;
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-#endif
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+
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cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
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cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
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--
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2.31.1
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