From 7ce7e9354cd7509fd1264d4a7ad6762023ff352e Mon Sep 17 00:00:00 2001
From: Alicja Michalska <ahplka19@gmail.com>
Date: Sun, 26 Nov 2023 23:32:20 +0100
Subject: [PATCH] arm64: dts: mediatek: mt8183: Add register names and syscon
 pointer

Based on patch from Collabora, it seems like we missed it.
Another node exists for vencsys, so adding that as well.

Signed-off-by: Alicja Michalska <ahplka19@gmail.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index d4506fe54a8b..07ca7448adfd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -2162,6 +2162,8 @@ vcodec_dec: vcodec@16000000 {
 				 <0 0x16027000 0 0x800>,		/* VP6_VD */
 				 <0 0x16027800 0 0x800>,		/* VP8_VL */
 				 <0 0x16028400 0 0x400>;		/* VP9_VD */
+			reg-names = "misc", "ld", "top", "cm", "ad", "av", "pp",
+				"hwd", "hwq", "hwb", "hwg";
 			interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_LOW>;
 			mediatek,larb = <&larb1>;
 			iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>,
@@ -2172,6 +2174,7 @@ vcodec_dec: vcodec@16000000 {
 				 <&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>,
 				 <&iommu M4U_PORT_HW_VDEC_PPWRAP_EXT>;
 			mediatek,scp = <&scp>;
+			mediatek,vdecsys = <&vdecsys>;
 			power-domains = <&spm MT8183_POWER_DOMAIN_VDEC>;
 			clocks = <&vdecsys CLK_VDEC_VDEC>;
 			clock-names = "vdec";
@@ -2227,6 +2230,7 @@ vcodec_enc: vcodec@17020000 {
 				 <&iommu M4U_PORT_VENC_REF_LUMA>,
 				 <&iommu M4U_PORT_VENC_REF_CHROMA>;
 			mediatek,scp = <&scp>;
+			mediatek,vencsys = <&vencsys>;
 			power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
 			clocks = <&vencsys CLK_VENC_VENC>;
 			clock-names = "venc";
-- 
2.43.0

