Lina Iyer e35a6ae0eb pinctrl/msm: Setup GPIO chip in hierarchy ... Some GPIOs are marked as wakeup capable and are routed to another interrupt controller that is an always-domain and can detect interrupts even when most of the SoC is powered off. The wakeup interrupt controller wakes up the GIC and replays the interrupt at the GIC. Setup the TLMM irqchip in hierarchy with the wakeup interrupt controller and ensure the wakeup GPIOs are handled correctly. Co-developed-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1573855915-9841-9-git-send-email-ilina@codeaurora.org ---- Changes in v2: - Address review comments - Fix Co-developed-by tag Changes in v1: - Address minor review comments - Remove redundant call to set irq handler - Move irq_domain_qcom_handle_wakeup() to this patch Changes in RFC v2: - Rebase on top of GPIO hierarchy support in linux-next - Set the chained irq handler for summary line		2019-11-16 10:23:15 +00:00
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apr.h	soc: qcom: Add APR bus driver	2018-05-11 12:13:26 +09:00
irq.h	pinctrl/msm: Setup GPIO chip in hierarchy	2019-11-16 10:23:15 +00:00
llcc-qcom.h	qcom: soc: llcc-slice: Clear the global drv_data pointer on error	2019-02-12 15:27:14 -06:00
mdt_loader.h	soc: qcom: mdt_loader: Support loading non-split images	2019-07-01 19:02:28 -07:00
qmi.h	soc: qcom: qmi_interface: Limit txn ids to U16_MAX	2018-11-14 10:02:07 -08:00
smd-rpm.h	regulator: qcom: smd: Add pm8998 and pmi8998 regulators	2018-03-28 10:10:22 +08:00
smem.h	soc: qcom: smem: introduce qcom_smem_virt_to_phys()	2018-05-25 15:53:59 -05:00
smem_state.h
wcnss_ctrl.h