linux-uconsole/drivers/gpu
Zhenyu Wang df74e70ffe drm/i915/gvt: Fix MI_FLUSH_DW parsing with correct index check
commit 13bcb80b7e upstream.

When MI_FLUSH_DW post write hw status page in index mode, the index
value is in dword step and turned into address offset in cmd dword1.
As status page size is 4K, so can't exceed that.

This fixed upper bound check in cmd parser code which incorrectly
stopped VM for reason of invalid MI_FLUSH_DW write index.

v2:
- Fix upper bound as 4K page size because index value is address offset.

Fixes: be1da7070a ("drm/i915/gvt: vGPU command scanner")
Cc: stable@vger.kernel.org # v4.10+
Cc: "Zhao, Yan Y" <yan.y.zhao@intel.com>
Reviewed-by: Yan Zhao <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-03 06:26:26 +02:00
..
drm drm/i915/gvt: Fix MI_FLUSH_DW parsing with correct index check 2019-04-03 06:26:26 +02:00
host1x gpu: host1x: Check whether size of unpin isn't 0 2018-07-09 10:31:30 +02:00
ipu-v3 gpu: ipu-v3: Fix CSI offsets for imx53 2019-03-23 20:09:41 +01:00
vga vga_switcheroo: Fix missing gpu_bound call at audio client registration 2018-11-13 11:09:00 -08:00
Makefile