linux-uconsole/drivers/phy
Meng Dongyang f6fac8b68a phy: rockchip: rockchip-inno-usb2: flush otg work when exit
The controller will be reinit when suspend and resume in device
mode if not connect to PC. And the U2PHY must be keep in power
on state during the init process. But The 'otg_sm_work' may be
schedule immediately and power off the U2PHY if system suspend
and resume between the delay time of schedule 'otg_sm_work', so
it will result in the error when init controller as below:

dwc2_core_reset() HANG! Soft Reset GRSTCTL=80000001

So flush the otg work in exit function to finish power control
of U2PHY.

Change-Id: I79c4b6a877196abd2f2201b2f984c9ea22e48fec
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2018-06-07 09:22:50 +08:00
..
rockchip phy: rockchip: rockchip-inno-usb2: flush otg work when exit 2018-06-07 09:22:50 +08:00
Kconfig UPSTREAM: usb: gadget: move gadget API functions to udc-core 2018-04-27 10:27:04 +08:00
Makefile UPSTREAM: phy: Group vendor specific phy drivers 2017-09-28 14:12:47 +08:00
phy-armada375-usb2.c
phy-bcm-cygnus-pcie.c
phy-bcm-kona-usb2.c
phy-berlin-sata.c
phy-berlin-usb.c
phy-brcmstb-sata.c
phy-core.c LSK 18.02 v4.4-android 2018-02-07 20:59:20 +08:00
phy-dm816x-usb.c
phy-exynos-dp-video.c
phy-exynos-mipi-video.c
phy-exynos4x12-usb2.c
phy-exynos5-usbdrd.c
phy-exynos4210-usb2.c
phy-exynos5250-sata.c
phy-exynos5250-usb2.c
phy-hix5hd2-sata.c
phy-lpc18xx-usb-otg.c
phy-miphy28lp.c
phy-miphy365x.c
phy-mt65xx-usb3.c
phy-mvebu-sata.c
phy-omap-control.c
phy-omap-usb2.c
phy-pistachio-usb.c
phy-pxa-28nm-hsic.c
phy-pxa-28nm-usb2.c
phy-qcom-apq8064-sata.c
phy-qcom-ipq806x-sata.c
phy-qcom-ufs-i.h
phy-qcom-ufs-qmp-14nm.c
phy-qcom-ufs-qmp-14nm.h
phy-qcom-ufs-qmp-20nm.c
phy-qcom-ufs-qmp-20nm.h
phy-qcom-ufs.c
phy-rcar-gen2.c
phy-s5pv210-usb2.c
phy-samsung-usb2.c
phy-samsung-usb2.h
phy-spear1310-miphy.c
phy-spear1340-miphy.c
phy-stih41x-usb.c
phy-stih407-usb.c
phy-sun4i-usb.c
phy-sun9i-usb.c
phy-ti-pipe3.c
phy-tusb1210.c
phy-twl4030-usb.c
phy-xgene.c
ulpi_phy.h