Allow DisplayPort PHYs to be configured through the generic
functions through a custom structure added to the generic union.
The configuration structure is used for reconfiguration of
DisplayPort PHYs during link training operation.
The parameters added here are the ones defined in the DisplayPort
spec v1.4 which include link rate, number of lanes, voltage swing
and pre-emphasis.
Add the DisplayPort phy mode to the generic phy_mode enum.
Change-Id: Id68cbd69c0938bd64402b8af7b6b37b168472848
Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
(cherry picked from commit
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|---|---|---|
| .. | ||
| tegra | ||
| omap_control_phy.h | ||
| omap_usb.h | ||
| phy-dp.h | ||
| phy-mipi-dphy.h | ||
| phy-qcom-ufs.h | ||
| phy-rockchip-typec.h | ||
| phy-sun4i-usb.h | ||
| phy.h | ||
| ulpi_phy.h | ||