Thierry Reding 4bc567dd60 of: Add NVIDIA Tegra memory controller binding ... The memory controller on NVIDIA Tegra exposes various knobs that can be used to tune the behaviour of the clients attached to it. In addition, the memory controller implements an SMMU (IOMMU) which can translate I/O virtual addresses to physical addresses for clients. This is useful for scatter-gather operation on devices that don't support it natively and for virtualization or process separation. Signed-off-by: Thierry Reding <treding@nvidia.com>		2014-11-26 09:43:25 +01:00
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bindings	of: Add NVIDIA Tegra memory controller binding	2014-11-26 09:43:25 +01:00
00-INDEX
booting-without-of.txt	dt/documentation: add specification of dma bus information	2014-09-26 11:18:05 -05:00
changesets.txt	of: Transactional DT support.	2014-07-23 17:29:15 -06:00
dynamic-resolution-notes.txt	of: Introduce Device Tree resolve support.	2014-10-04 21:24:26 +01:00
of_selftest.txt	To remove non-ascii characters in of_selftest.txt	2014-10-06 09:52:39 +01:00
todo.txt	of: Add todo tasklist for Devicetree	2014-07-23 17:33:01 -06:00
usage-model.txt