linux-uconsole/arch/arm/include
Marc Zyngier e83a28c521 arm/arm64: KVM: Enforce unconditional flush to PoC when mapping to stage-2
commit 8f36ebaf21 upstream.

When we fault in a page, we flush it to the PoC (Point of Coherency)
if the faulting vcpu has its own caches off, so that it can observe
the page we just brought it.

But if the vcpu has its caches on, we skip that step. Bad things
happen when *another* vcpu tries to access that page with its own
caches disabled. At that point, there is no garantee that the
data has made it to the PoC, and we access stale data.

The obvious fix is to always flush to PoC when a page is faulted
in, no matter what the state of the vcpu is.

Fixes: 2d58b733c8 ("arm64: KVM: force cache clean on page fault when caches are off")
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-03-12 06:37:28 +01:00
..
asm arm/arm64: KVM: Enforce unconditional flush to PoC when mapping to stage-2 2017-03-12 06:37:28 +01:00
debug ARM: at91: debug: use DEBUG_UART_PHYS 2015-09-21 16:31:15 +02:00
uapi/asm ARM: wire up mlock2 syscall 2015-11-18 11:20:24 +00:00