Paul Burton 4ee24ae83c MIPS: Boston: Disable EG20T prefetch ... [ Upstream commit 5ec17af7ea ] The Intel EG20T Platform Controller Hub used on the MIPS Boston development board supports prefetching memory to optimize DMA transfers. Unfortunately for unknown reasons this doesn't work well with some MIPS CPUs such as the P6600, particularly when using an I/O Coherence Unit (IOCU) to provide cache-coherent DMA. In these systems it is common for DMA data to be lost, resulting in broken access to EG20T devices such as the MMC or SATA controllers. Support for a DT property to configure the prefetching was added a while back by commit 549ce8f134 ("misc: pch_phub: Read prefetch value from device tree if passed") but we never added the DT snippet to make use of it. Add that now in order to disable the prefetching & fix DMA on the affected systems. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21068/ Cc: linux-mips@linux-mips.org Signed-off-by: Sasha Levin <sashal@kernel.org>		2019-02-12 19:46:59 +01:00
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compressed	MIPS: Align kernel load address to 64KB	2019-01-09 17:38:48 +01:00
dts	MIPS: Boston: Disable EG20T prefetch	2019-02-12 19:46:59 +01:00
tools	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
.gitignore	.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore	2017-11-08 11:20:24 -06:00
ecoff.h	MIPS: Make elf2ecoff work on 64bit host machines	2018-06-24 09:25:24 -07:00
elf2ecoff.c	MIPS: Make elf2ecoff work on 64bit host machines	2018-06-24 09:25:24 -07:00
Makefile	MIPS: boot: merge build rules of vmlinux.*.itb by using pattern rule	2018-06-24 09:27:27 -07:00