f134fbbb4f
Winbond spi-nor flash 32MB and larger have an 'Extended Address Register' as one option for addressing beyond 16MB (Macronix has the same concept, Spansion has EXTADD bits in the Bank Address Register). According to section 8.2.7 Write Extended Address Register (C5h) of the Winbond W25Q256FV data sheet (256M-BIT SPI flash) The Extended Address Register is only effective when the device is in the 3-Byte Address Mode. When the device operates in the 4-Byte Address Mode (ADS=1), any command with address input of A31-A24 will replace the Extended Address Register values. It is recommended to check and update the Extended Address Register if necessary when the device is switched from 4-Byte to 3-Byte Address Mode. So the documentation suggests clearing the EAR after switching to 3-byte mode. Experimentation shows that the EAR is *always* one after the switch to 3-byte mode, so clearing the EAR is mandatory at shutdown for a subsequent 3-byte-addressed reboot to work. Note that some SOCs (e.g. MT7621) do not assert a reset line at normal reboot, so we cannot rely on hardware reset. The MT7621 does assert a reset line at watchdog-reset. Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: NeilBrown <neil@brown.name> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> |
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| .. | ||
| bbm.h | ||
| blktrans.h | ||
| cfi.h | ||
| cfi_endian.h | ||
| concat.h | ||
| doc2000.h | ||
| flashchip.h | ||
| ftl.h | ||
| gen_probe.h | ||
| inftl.h | ||
| latch-addr-flash.h | ||
| lpc32xx_mlc.h | ||
| lpc32xx_slc.h | ||
| map.h | ||
| mtd.h | ||
| mtdram.h | ||
| nand-gpio.h | ||
| nand.h | ||
| nand_bch.h | ||
| nand_ecc.h | ||
| ndfc.h | ||
| nftl.h | ||
| onenand.h | ||
| onenand_regs.h | ||
| partitions.h | ||
| pfow.h | ||
| physmap.h | ||
| pismo.h | ||
| plat-ram.h | ||
| qinfo.h | ||
| rawnand.h | ||
| sh_flctl.h | ||
| sharpsl.h | ||
| spear_smi.h | ||
| spi-nor.h | ||
| super.h | ||
| ubi.h | ||
| xip.h | ||